IRF9Z24S (Vishay)
Power MOSFET

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IRF9Z24S, SiHF9Z24S, IRF9Z24L, SiHF9Z24L
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V)
RDS(on) ()
Qg (Max.) (nC)
- 60
VGS = - 10 V
19
Qgs (nC)
5.4
Qgd (nC)
11
Configuration
Single
0.28
S
I2PAK (TO-262)
D2PAK (TO-263)
G
G
SD
D
G
S
D
P-Channel MOSFET
FEATURES
Halogen-free According to IEC 61249-2-21
Definition
• Advanced Process Technology
• Surface Mount (IRF9Z24S, SiHF9Z24S)
• Low-Profile Through-Hole (IRF9Z24L, SiHF9Z24L)
• 175 °C Operating Temperature
• Fast Switching
• P-Channel
• Fully Avalanche Rated
• Compliant to RoHS Directive 2002/95/EC
DESCRIPTION
Third generation Power MOSFETs from Vishay utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
Power MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use in a
wide variety of applications.
The D2PAK is a surface mount power package capable of
accommodating die size up to HEX-4. It provides the
highest power capability and the lowest possible
on-resistance in any existing surface mount package. The
D2PAK is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0 W in a typical surface mount application.
The through-hole version (IR9Z24L, SiH9Z24L) is available
for low-profile applications.
ORDERING INFORMATION
Package
D2PAK (TO-263)
Lead (Pb)-free and Halogen-free SiHF9Z24S-GE3
Lead (Pb)-free
Note
a. See device orientation.
IRF9Z24SPbF
SiHF9Z24S-E3
D2PAK (TO-263)
SiHF9Z24STRL-GE3a
IRF9Z24STRLPbFa
SiHF9Z24STL-E3a
D2PAK (TO-263)
SiHF9Z24STRR-GE3a
IRF9Z24STRRPbFa
SiHF9Z24STR-E3a
I2PAK (TO-262)
-
IRF9Z24LPbF
SiHF9Z24L-E3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
Drain-Source Voltage
Gate-Source Voltage
VDS
VGS
Continuous Drain Currente
Pulsed Drain Currenta, e
VGS at - 10 V
TC = 25 °C
TC = 100 °C
ID
IDM
Linear Derating Factor
Single Pulse Avalanche Energyb, e
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
EAS
IAR
EAR
Maximum Power Dissipation
Peak Diode Recovery dV/dtc, e
Operating Junction and Storage Temperature Range
TA = 25 °C
TC = 25 °C
PD
dV/dt
TJ, Tstg
Soldering Recommendations (Peak Temperature)
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = - 25 V, starting TJ = 25 °C, L = 2.3 mH, Rg = 25 , IAS = - 11 A (see fig. 12).
c. ISD - 11 A, dI/dt 140 A/μs, VDD VDS, TJ 175 °C.
d. 1.6 mm from case.
e. Uses IRF9Z24, SiHF9Z24 data and test conditions.
LIMIT
- 60
± 20
- 11
- 7.7
- 44
0.40
240
- 11
6.0
3.7
60
- 4.5
- 55 to + 175
300d
UNIT
V
A
W/°C
mJ
A
mJ
W
W
V/ns
°C
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91091
S11-1063-Rev. C, 30-May-11
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1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000


IRF9Z24S (Vishay)
Power MOSFET

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IRF9Z24S, SiHF9Z24S, IRF9Z24L, SiHF9Z24L
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
Maximum Junction-to-Ambient
(PCB Mount)a
RthJA
Maximum Junction-to-Case (Drain)
RthJC
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
MIN.
-
-
TYP.
-
-
MAX.
40
2.5
UNIT
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
VDS
VDS/TJ
VGS(th)
IGSS
IDSS
RDS(on)
gfs
VGS = 0, ID = - 250 μA
Reference to 25 °C, ID = - 1 mAc
VDS = VGS, ID = - 250 μA
VGS = ± 20 V
VDS = - 60 V, VGS = 0 V
VDS = - 48 V, VGS = 0 V, TJ = 150 °C
VGS = - 10 V
ID = - 6.6 Ab
VDS = - 25 V, ID = - 6.6 Ac
- 60
-
- 2.0
-
-
-
-
1.4
-
- 0.056
-
-
-
-
-
-
-
-
- 4.0
± 100
- 100
- 500
0.28
-
V
V/°C
V
nA
μA
S
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Drain-Source Body Diode Characteristics
Ciss
Coss
Crss
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
VGS = 0 V,
VDS = - 25 V,
f = 1.0 MHz, see fig. 5c
VGS = - 10 V
ID = - 11 A, VDS = - 48 V,
see fig. 6 and 13b, c
VDD = - 30 V, ID = - 11 A,
Rg = 18 , RD = 2.5 , see fig. 10b
-
-
-
-
-
-
-
-
-
-
570 -
360 - pF
65 -
- 19
- 5.4 nC
- 11
13 -
68 -
ns
15 -
29 -
Continuous Source-Drain Diode Current
IS
MOSFET symbol
showing the
integral reverse
Pulsed Diode Forward Currenta
ISM p - n junction diode
D
G
S
- - - 11
A
- - - 44
Body Diode Voltage
Drain-Source Body Diode Characteristics
VSD
TJ = 25 °C, IS = - 11 A, VGS = 0 Vb
-
-
- 6.3
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
trr
Qrr
TJ = 25 °C, IF = -11 A, dI/dt = 100 A/μsb, c
-
-
100 200 ns
320 640 nC
ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 300 μs; duty cycle 2 %.
c. Uses IRF9Z24, SiHF9Z24 data and test conditions.
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Document Number: 91091
S11-1063-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000


IRF9Z24S (Vishay)
Power MOSFET

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IRF9Z24S, SiHF9Z24S, IRF9Z24L, SiHF9Z24L
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
VGS
Top - 15 V
- 10 V
- 8.0 V
- 7.0 V
101 - 6.0 V
- 5.5 V
- 5.0 V
Bottom - 4.5 V
100 - 4.5 V
20 µs Pulse Width
TC = 25 °C
10-1 100 101
91091_01
- VDS, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
101
25 °C
175 °C
100
20 µs Pulse Width
VDS = - 25 V
4 5 6 7 8 9 10
91091_03
- VGS, Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
VGS
Top - 15 V
- 10 V
- 8.0 V
101 - 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
Bottom - 4.5 V
100
- 4.5 V
20 µs Pulse Width
TC = 175 °C
10-1 100 101
91091_02
- VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
3.0
ID = - 11 A
VGS = - 10 V
2.5
2.0
1.5
1.0
0.5
0.0
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160 180
91091_04
TJ, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91091
S11-1063-Rev. C, 30-May-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000


IRF9Z24S (Vishay)
Power MOSFET

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IRF9Z24S, SiHF9Z24S, IRF9Z24L, SiHF9Z24L
Vishay Siliconix
1250
1000
750
500
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
Ciss
Coss
250
0
100
91091_05
Crss
101
- VDS, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
101
175 °C
25 °C
100
10-1
0.5
91091_07
VGS = 0 V
1.5 2.5 3.5 4.5 5.5
- VSD, Source-to-Drain Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
20 ID = - 11 A
16
VDS = - 48 V
VDS = - 30 V
12
8
4
0
0
91091_06
For test circuit
see figure 13
5 10 15 20 25
QG, Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
102
Operation in this area limited by RDS(on)
5 10 µs
2 100 µs
10
1 ms
5
2 10 ms
1
5
2
0.1
0.1 2
51
TC = 25 °C
TJ = 175 °C
Single Pulse
2 5 10 2
5 102 2
5 103
91091_08
- VDS, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
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Document Number: 91091
S11-1063-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000


IRF9Z24S (Vishay)
Power MOSFET

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IRF9Z24S, SiHF9Z24S, IRF9Z24L, SiHF9Z24L
Vishay Siliconix
15
12
9
6
3
0
25
91091_09
50 75 100 125 150
TC, Case Temperature (°C)
175
Fig. 9 - Maximum Drain Current vs. Case Temperature
10
VDS
VGS
Rg
RD
D.U.T.
- 10 V
Pulse width 1 µs
Duty factor 0.1 %
-
+VDD
Fig. 10a - Switching Time Test Circuit
VGS
10 %
td(on) tr
td(off) tf
90 %
VDS
Fig. 10b - Switching Time Waveforms
1 D = 0.50
0.2
0.1
0.05
0.1 0.02
0.01
10-2
10-5
91091_11
Single Pulse
(Thermal Response)
10-4
10-3
10-2
0.1
t1, Rectangular Pulse Duration (s)
PDM
t1
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
1 10
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
Vary tp to obtain
required IAS
Rg
- 10 V
tp
L
D.U.T.
IAS
0.01 Ω
-
+
V
DD
IAS
VDS
VDD
tp
VDS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
Document Number: 91091
S11-1063-Rev. C, 30-May-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000


IRF9Z24S (Vishay)
Power MOSFET

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IRF9Z24S, SiHF9Z24S, IRF9Z24L, SiHF9Z24L
Vishay Siliconix
800 ID
Top - 4.5 A
- 7.8 A
600 Bottom - 11 A
400
200
0 VDD = - 25 V
25 50 75
100 125 150 175
91091_12c
Starting TJ, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
- 10 V
QGS
VG
QG
QGD
Charge
Fig. 13a - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
12 V
50 kΩ
0.2 µF
0.3 µF
-
D.U.T. + VDS
VGS
- 3 mA
IG ID
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
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Document Number: 91091
S11-1063-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000


IRF9Z24S (Vishay)
Power MOSFET

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IRF9Z24S, SiHF9Z24S, IRF9Z24L, SiHF9Z24L
Vishay Siliconix
D.U.T.
+
-
Peak Diode Recovery dV/dt Test Circuit
+
Circuit layout considerations
Low stray inductance
Ground plane
Low leakage inductance
current transformer
-
-+
Rg
dV/dt controlled by Rg
+
ISD controlled by duty factor “D”
D.U.T. - device under test
- VDD
Note
Compliment N-Channel of D.U.T. for driver
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = - 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Body diode forward drop
Inductor current
Ripple 5 %
Note
a. VGS = - 5 V for logic level and - 3 V drive devices
Fig. 14 - For P-Channel
VDD
ISD
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91091.
Document Number: 91091
S11-1063-Rev. C, 30-May-11
www.vishay.com
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000


IRF9Z24S (Vishay)
Power MOSFET

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Package Information
Vishay Siliconix
TO-263AB (HIGH VOLTAGE)
(Datum A)
4 L1
34
E
4
A
A
AB
c2
D5
H
CC
123
L2
BB
Detail A
2xe
2 x b2
2xb
0.010 M A M B
Plating
(c)
A
c
± 0.004 M B
5
b1, b3
Base
metal
c1 5
Gauge
plane
0° to 8°
H
B
Seating plane
L3 L L4
A1
Detail “A”
Rotated 90° CW
scale 8:1
E
D1 4
Lead tip
(b, b2)
Section B - B and C - C
Scale: none
E1
View A - A
4
MILLIMETERS
INCHES
MILLIMETERS
INCHES
DIM.
MIN.
MAX.
MIN.
MAX.
DIM.
MIN.
MAX.
MIN.
MAX.
A
4.06
4.83
0.160
0.190
D1 6.86
- 0.270 -
A1
0.00
0.25
0.000
0.010
E
9.65
10.67
0.380
0.420
b
0.51
0.99
0.020
0.039
E1 6.22
- 0.245 -
b1
0.51
0.89
0.020
0.035
e 2.54 BSC
0.100 BSC
b2
1.14
1.78
0.045
0.070
H
14.61
15.88
0.575
0.625
b3
1.14
1.73
0.045
0.068
L
1.78
2.79
0.070
0.110
c
0.38
0.74
0.015
0.029
L1 - 1.65 - 0.066
c1
0.38
0.58
0.015
0.023
L2 - 1.78 - 0.070
c2
1.14
1.65
0.045
0.065
L3 0.25 BSC
0.010 BSC
D
8.38
9.65
0.330
0.380
L4
4.78
5.28
0.188
0.208
ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.
4. Thermal PAD contour optional within dimension E, L1, D1 and E1.
5. Dimension b1 and c1 apply to base metal only.
6. Datum A and B to be determined at datum plane H.
7. Outline conforms to JEDEC outline to TO-263AB.
Document Number: 91364
Revision: 15-Sep-08
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IRF9Z24S (Vishay)
Power MOSFET

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Legal Disclaimer Notice
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please
contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
Material Category Policy
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
1 Document Number: 91000




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