70N06 (Fairchild Semiconductor)
RFP70N06

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Data Sheet
September 2013
RFP70N06
N-Channel Power MOSFET
60V, 70A, 14 m
These are N-Channel power MOSFETs manufactured using
the MegaFET process. This process, which uses feature
sizes approaching those of LSI circuits, gives optimum
utilization of silicon, resulting in outstanding performance.
They were designed for use in applications such as
switching regulators, switching converters, motor drivers and
relay drivers. These transistors can be operated directly from
integrated circuits.
Formerly developmental type TA78440.
Ordering Information
PART NUMBER
RFP70N06
PACKAGE
TO-220AB
BRAND
RFP70N06
NOTE: When ordering use the entire part number. Add the suffix 9A to
obtain the TO-263AB variant in tape and reel, e.g. RF1S70N06SM9A.
Features
• 70A, 60V
• rDS(on) = 0.014
• Temperature Compensated PSPICE® Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve (Single Pulse)
• 175oC Operating Temperature
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
Packaging
JEDEC TO-220AB
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
©2005 Fairchild Semiconductor Corporation
RFP70N06 Rev. D1


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RFP70N06
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
RFP70N06
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Single Pulse Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
60
60
70
Refer to Peak Current Curve
±20
Refer to UIS Curve
150
1.0
-55 to 175
300
260
V
V
A
V
A
W
W/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
Drain to Source Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
Total Gate Charge
Gate Charge at 10V
Threshold Gate Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
BVDSS
VGS(TH)
IDSS
IGSS
rDS(ON)
t(ON)
td(ON)
tr
td(OFF)
tf
t(OFF)
Qg(TOT)
Qg(10)
Qg(TH)
CISS
COSS
CRSS
RθJC
RθJA
ID = 250µA, VGS = 0V (Figure 11)
VGS = VDS, ID = 250µA (Figure 10)
VDS = 60V, VGS = 0V
VDS = 0.8 x Rated BVDSS, TC = 150oC
VGS = ±20V
ID = 70A, VGS = 10V (Figure 9)
VDD = 30V, ID 70A, RL = 0.43,
VGS = 10V, RGS = 2.5
(Figure 13)
VGS = 0V to 20V
VGS = 0V to 10V
VGS = 0V to 2V
VDD = 48V, ID = 70A,
RL = 0.68
Ig(REF) = 2.2mA
(Figure 13)
VDS = 25V, VGS = 0V, f = 1MHz
(Figure 12)
TO-220
-
MIN TYP MAX UNITS
60 -
-
V
2 -4
V
- - 1 µA
- - 25 µA
- - ±100 nA
- - 0.014
- - 190 ns
- 10 -
ns
- 137 -
ns
- 32 -
ns
- 24 -
ns
- - 73 ns
- 120 156 nC
- 65 85 nC
- 5.0 6.5 nC
- 2250 -
pF
- 792 -
pF
- 206 -
pF
- - 1.0 oC/W
- - 62 oC/W
- --
-
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Source to Drain Diode Voltage
VSD
ISD = 70A
- 1.5 V
Reverse Recovery Time
trr ISD = 70A, dISD/dt = 100A/µs
- 52 ns
NOTES:
2. Pulse test: pulse width 300ms, duty cycle 2%.
3. Repetitive rating: pulse width is limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3) and Peak Current
Capability Curve (Figure 5).
©2005 Fairchild Semiconductor Corporation
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Typical Performance Curves TC = 25oC, Unless Otherwise Specified
1.2
1.0
0.8
0.6
0.4
0.2
0
0 25 50 75 100 125 150 175
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
80
70
60
50
40
30
20
10
0
25
50 75 100 125
TC, CASE TEMPERATURE (oC)
150
175
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
1
0.5
0.2
0.1 0.1
0.05
0.02
0.01
0.01
10-5
PDM
SINGLE PULSE
10-4
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
10-3
10-2
10-1
100
t, RECTANGULAR PULSE DURATION (s)
101
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
500
100µs
100
OPERATION IN THIS
AREA MAY BE
10 LIMITED BY rDS(ON)
1ms
10ms
TC = 25oC
TJ = MAX RATED
SINGLE PULSE
1
1
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
100
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
©2005 Fairchild Semiconductor Corporation
1000
VGS = 10V
TC = 25oC
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
I
=
I25
1----7---51----5---0--T----C---
100 TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
50
10-5
10-4
10-3
10-2
10-1
t, PULSE WIDTH (s)
100
FIGURE 5. PEAK CURRENT CAPABILITY
101
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RFP70N06
Typical Performance Curves TC = 25oC, Unless Otherwise Specified (Continued)
300 If R = 0
tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)
If R 0
tAV = (L/R) ln [(IAS*R)/(1.3*RATED BVDSS-VDD) +1]
100 STARTING TJ = 25oC
STARTING TJ = 150oC
10
0.01
0.1 1
tAV, TIME IN AVALANCHE (ms)
10
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
200
160
120
80
40
0
0
VGS = 20V VGS = 10V
VGS = 8V
VGS = 7V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
TC = 25oC
VGS = 6V
VGS = 5V
VGS = 4.5V
1 234
VDS, DRAIN TO SOURCE VOLTAGE (V)
5
FIGURE 7. SATURATION CHARACTERISTICS
200
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
160 VDD = 15V
-55oC
120
25oC
175oC
2.5
PULSE DURATION = 250µs
DUTY CYCLE = 0.5% MAX
2 VGS = 10V, ID = 70A
1.5
80 1
40 0.5
0
02468
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 8. TRANSFER CHARACTERISTICS
10
0
-80 -40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
2.0
VGS = VDS, ID = 250µA
1.5
2.0
ID = 250µA
1.5
1.0 1.0
0.5
0
-80 -40
0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
0.5
0
-80 -40
0
40 80 120 160 200
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
©2005 Fairchild Semiconductor Corporation
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RFP70N06
Typical Performance Curves TC = 25oC, Unless Otherwise Specified (Continued)
5000
4000
3000
CISS
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGS
2000
1000
0
0
COSS
CRSS
5
10 15
20
VDS, DRAIN TO SOURCE VOLTAGE (V)
25
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
60
VDD = BVDSS
45
VDD = BVDSS
RL = 0.86
30
IG(REF) = 2.2mA
VGS = 10V
0.75 BVDSS
0.50 BVDSS
15 0.25 BVDSS
10
7.5
5
2.5
0
20 IG(REF)
IG(ACT)
t, TIME (µs)
80 IG(REF)
IG(ACT)
0
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
VDS
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
L
DUT
+
VDD
-
IAS
0.01
0
tP
IAS
BVDSS
VDS
VDD
tAV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
VDS
VGS
RGS
RL
DUT
+
VDD
-
VGS
FIGURE 16. SWITCHING TIME TEST CIRCUIT
©2005 Fairchild Semiconductor Corporation
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
10%
0
VGS
10%
0
50%
PULSE WIDTH
10%
90%
50%
FIGURE 17. SWITCHING WAVEFORMS
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RFP70N06
Test Circuits and Waveforms (Continued)
VGS
Ig(REF)
VDS
RL
DUT
+
VDD
-
FIGURE 18. GATE CHARGE TEST CIRCUIT
VDD
Qg(TOT)
VDS
VGS
VGS = 2V
0
Qg(10)
Qg(TH)
VGS = 10V
VGS = 20V
Ig(REF)
0
FIGURE 19. GATE CHARGE WAVEFORM
©2005 Fairchild Semiconductor Corporation
RFP70N06 Rev. D1


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RFP70N06
PSPICE Electrical Model
.SUBCKT RFG70N06 2 1 3 ; rev 3/20/92
CA 12 8 5.56e-9
CB 15 14 5.30e-9
CIN 6 8 2.63e-9
DBODY 7 5 DBDMOD
DBREAK 5 11 DBKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 65.18
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTO 20 6 18 8 1
IT 8 17 1
GATE
1
LDRAIN 2 5 1e-9
LGATE 1 9 3.10e-9
LSOURCE 3 7 1.82e-9
MOS1 16 6 8 8 MOSMOD M = 0.99
MOS2 16 21 8 8 MOSMOD M = 0.01
RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 4.66e-3
RLDRAIN 2 5 10
RGATE 9 20 1.21
RLGATE 1 9 31
RIN 6 8 1e9
RSOURCE 8 7 RDSMOD 3.92e-3
RLSOURCE 3 7 18.2
RVTO 18 19 RVTOMOD 1
DPLCAP 5
10
RSCL2
RSCL1
+ 51
5
51 ESCL
-
6
ESG 8
+
RLGATE
EVTO
9 20 + 18 -
RGATE
8
LGATE
6
RIN
16
VTO
-
+
CIN
50
RDRAIN
21
MOS1
8
S1A
12 13
8
S2A
14 15
13
S1B
S2B
CA 13
+
EGS
6
8
-
CB
+ 14
EDS
5
8
-
DBREAK
RLDRAIN
2
DRAIN
LDRAIN
11
+
EBREAK 17
18
MOS2
-
DBODY
RSOURCE
RLSOURCE
7
3
SOURCE
LSOURCE
RBREAK
17 18
RVTO
19
IT
VBAT
+
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 0.605
.MODEL DBDMOD D (IS = 7.91e-12 RS = 3.87e-3 TRS1 = 2.71e-3 TRS2 = 2.50e-7 CJO = 4.84e-9 TT = 4.51e-8)
.MODEL DBKMOD D (RS = 3.9e-2 TRS1 =1.05e-4 TRS2 = 3.11e-5)
.MODEL DPLCAPMOD D (CJO = 4.8e-9 IS = 1e-30 N = 10)
.MODEL MOSMOD NMOS (VTO = 3.46 KP = 47 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL RBKMOD RES (TC1 = 8.46e-4 TC2 = -8.48e-7)
.MODEL RDSMOD RES (TC1 = 2.23e-3 TC2 = 6.56e-6)
.MODEL RVTOMOD RES (TC1 = -3.29e-3 TC2 = 3.49e-7)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -8.35 VOFF= -6.35)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -6.35 VOFF= -8.35)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.0 VOFF= 3.0)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 3.0 VOFF= -2.0)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global
Temperature Options; written by William J. Hepp and C. Frank Wheatley.
©2005 Fairchild Semiconductor Corporation
RFP70N06 Rev. D1


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RFP70N06
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
AccuPower™
AX-CAP®*
BitSiC™
Build it Now™
CorePLUS™
CorePOWER™
CROSSVOLT
CTL™
Current Transfer Logic™
DEUXPEED®
Dual Cool™
EcoSPARK®
EfficentMax™
ESBC™
®
Fairchild®
Fairchild Semiconductor®
FACT Quiet Series™
FACT®
FAST®
FastvCore™
FETBench™
FPS™
F-PFS™
FRFET®
Global Power ResourceSM
GreenBridge™
Green FPS™
Green FPS™ e-Series™
Gmax
GTO™
IntelliMAX™
ISOPLANAR™
Marking Small Speakers Sound Louder
and Better™
MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
MicroPak2™
MillerDrive™
MotionMax™
mWSaver®
OptoHiT™
OPTOLOGIC®
OPTOPLANAR®
®
tm
PowerTrench®
PowerXS™
Programmable Active Droop™
QFET®
QS™
Quiet Series™
RapidConfigure™
Saving our world, 1mW/W/kW at a time™
SignalWise™
SmartMax™
SMART START™
Solutions for Your Success™
SPM®
STEALTH™
SuperFET®
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SupreMOS®
SyncFET™
Sync-Lock™
®*
TinyBoost®
TinyBuck®
TinyCalc™
TinyLogic®
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
TranSiC™
TriFault Detect™
TRUECURRENT®*
SerDes™
UHC®
Ultra FRFET™
UniFET™
VCX™
VisualMax™
VoltagePlus™
XS™
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY
THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used here in:
1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
2. A critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.
ANTI-COUNTERFEITING POLICY
Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website,
www.Fairchildsemi.com, under Sales Support.
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their
parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed
application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the
proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild
Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild
Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of
up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and
warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is
committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Advance Information
Formative / In Design
Preliminary
First Production
No Identification Needed
Obsolete
Full Production
Not In Production
©2005 Fairchild Semiconductor Corporation
Definition
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
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