PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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PIC24FV16KM204 FAMILY
General Purpose, 16-Bit Flash Microcontroller
with XLP Technology Data Sheet
Analog Peripheral Features
• Up to Two 8-Bit Digital-to-Analog Converters
(DAC):
- Soft Reset disable function allows DAC to
retain its output value through non-VDD
Resets
- Support for Idle mode
- Support for left and right-justified input data
• Two Operational Amplifiers (Op Amps):
- Differential inputs
- Selectable power/speed levels:
- Low power/low speed
- High power/high speed
• Up to 22-Channel, 10/12-Bit Analog-to-Digital
Converter:
- 100k samples/second at 12-bit conversion
rate (single Sample-and-Hold)
- Auto-scan with Threshold Detect
- Can operate during Sleep
- Dedicated band gap reference and
temperature sensor input
• Up to Three Rail-to-Rail Analog Comparators:
- Programmable reference voltage for
comparators
- Band gap reference input
- Flexible input multiplexing
- Low-power or high-speed selection options
• Charge Time Measurement Unit (CTMU):
- Capacitive measurement, up to 22 channels
- Time measurement down to 200 ps
resolution
- Up to 16 external Trigger pairs
• Internal Temperature Sensor with Dedicated A/D
Converter Input
Multiple/Single Capture Compare
Peripheral (MCCP/SCCP) Features
• 16 or 32-Bit Time Base
• 16 or 32-Bit Capture
- 4-Deep Capture Buffer
• 16 or 32-Bit Compare:
- Single Edge Compare modes
- Dual Edge Compare/PWM modes
- Center-Aligned Compare mode
- Variable Frequency Pulse mode
• Fully Asynchronous Operation, Available in
Sleep modes
• Single Output Steerable mode (MCCP only)
• Brush DC Forward and Reverse modes
(MCCP only)
• Half-Bridge with Dead-Time Delay (MCCP only)
• Push-Pull PWM mode (MCCP only)
• Auto-Shutdown with Programmable Source and
Shutdown State
• Programmable Output Polarity
2013 Microchip Technology Inc.
Advance Information
DS33030A-page 1


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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PIC24FV16KM204 FAMILY
Memory
Peripherals
Device
FV16KM204
FV16KM202
FV08KM204
FV08KM202
FV16KM104
FV16KM102
FV08KM102
FV08KM101
44
28
44
28
44
28
28
20
16K
16K
8K
8K
16K
16K
8K
8K
F16KM204
F16KM202
F08KM204
F08KM202
F16KM104
F16KM102
F08KM102
F08KM101
44
28
44
28
44
28
28
20
16K
16K
8K
8K
16K
16K
8K
8K
5V Devices
2K 512 2.0-5.5 1 3/2 2 2 22 2 2 3 Yes Yes 2 3
2K 512 2.0-5.5 1 3/2 2 2 19 2 2 3 Yes Yes 2 3
2K 512 2.0-5.5 1 3/2 2 2 22 2 2 3 Yes Yes 2 3
2K 512 2.0-5.5 1 3/2 2 2 19 2 2 3 Yes Yes 2 3
1K 512 2.0-5.5 1 1/1 1 1 22 — — 1 Yes — 1 3
1K 512 2.0-5.5 1 1/1 1 1 19 — — 1 Yes — 1 3
1K 512 2.0-5.5 1 1/1 1 1 19 — — 1 Yes — 1 3
1K 512 2.0-5.5 1 1/1 1 1 16 — — 1 Yes — 1 3
3V Devices
2K 512 1.8-3.6 1 3/2 2 2 22 2 2 3 Yes Yes 2 3
2K 512 1.8-3.6 1 3/2 2 2 19 2 2 3 Yes Yes 2 3
2K 512 1.8-3.6 1 3/2 2 2 22 2 2 3 Yes Yes 2 3
2K 512 1.8-3.6 1 3/2 2 2 19 2 2 3 Yes Yes 2 3
1K 512 1.8-3.6 1 1/1 1 1 22 — — 1 Yes — 1 3
1K 512 1.8-3.6 1 1/1 1 1 19 — — 1 Yes — 1 3
1K 512 1.8-3.6 1 1/1 1 1 19 — — 1 Yes — 1 3
1K 512 1.8-3.6 1 1/1 1 1 16 — — 1 Yes — 1 3
DS33030A-page 2
Advance Information
2013 Microchip Technology Inc.


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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PIC24FV16KM204 FAMILY
Special Microcontroller Features
• Wide Operating Voltage Range Options:
- 1.8V to 3.6V (PIC24F devices)
- 2.0V to 5.0V (PIC24FV devices)
• Selectable Power Management modes:
- Idle: CPU shuts down, allowing for significant
power reduction
- Sleep: CPU and peripherals shut down for
substantial power reduction and fast wake-up
- Retention Sleep mode: PIC24FV devices can
enter Sleep mode, employing the
retention regulator, further reducing power
consumption
- Doze: CPU can run at a lower frequency than
peripherals, a user-programmable feature
- Alternate Clock modes allow on-the-fly
switching to a lower clock speed for selective
power reduction
• Fail-Safe Clock Monitor:
- Detects clock failure and switches to on-chip,
low-power RC oscillator
• Ultra Low-Power Wake-up Pin Provides an
External Trigger for Wake from Sleep
• 10,000 Erase/Write Cycle Endurance Flash
Program Memory, Typical
• 100,000 Erase/Write Cycle Endurance
Data EEPROM, Typical
• Flash and Data EEPROM Data Retention: 20 Years
Minimum
• Self-Programmable under Software Control
• Power-on Reset (POR), Power-up Timer (PWRT)
and Oscillator Start-up Timer (OST)
• Watchdog Timer (WDT) with its Own On-Chip
RC Oscillator for Reliable Operation
• On-Chip Regulator for 5V Operation
• Selectable Windowed WDT Feature
• Selectable Oscillator Options including:
- 4x Phase Locked Loop (PLL)
• 8 MHz (FRC) Internal RC Oscillator:
- HS/EC, high-speed crystal/resonator
oscillator or external clock
• In-Circuit Serial Programming™ (ICSP™) and
In-Circuit Emulation (ICE) – via Two Pins
• In-Circuit Debugging
• Programmable High/Low-Voltage
Detect (HLVD) module
• Programmable Brown-out Reset (BOR):
- Software enable feature
- Configurable shutdown in Sleep
- Auto-configures power mode and sensitivity
based on device operating speed
- LPBOR available for re-arming of the POR
High-Performance RISC CPU
• Modified Harvard Architecture
• Operating Speed:
- DC – 32 MHz clock input
- 16 MIPS at 32 MHz clock input
• 8 MHz Internal Oscillator:
- 4x PLL option
- Multiple clock divide options
- Fast start-up
• 17-Bit x 17-Bit Single-Cycle Hardware
Fractional/Integer Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16 x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set Architecture
• 24-Bit-Wide Instructions
• 16-Bit-Wide Data Path
• Linear Program Memory Addressing, up to
6 Mbytes
• Linear Data Memory Addressing, up to 64 Kbytes
• Two Address Generation Units (AGUs) for Separate
Read and Write Addressing of Data Memory
Peripheral Features
• High-Current Sink/Source, 18 mA/18 mA All Ports
• Independent Ultra Low-Power, 32 kHz
Timer Oscillator
• Up to Two Master Synchronous Serial Ports
(MSSPs) with SPI and I2C™ modes:
In SPI mode:
- User-configurable SCKx and SDOx pin outputs
- Daisy-chaining of SPI slave devices
In I2C mode:
- Serial clock synchronization (clock stretching)
- Bus collision detection and will arbitrate
accordingly
- Support for 16-bit read/write interface
• Up to Two Enhanced Addressable UARTs:
- LIN/J2602 bus support (auto-wake-up,
Auto-Baud Detect, Break character support)
- High and low speed (SCI)
- IrDA® mode (hardware encoder/decoder
function)
• Two External Interrupt Pins
• Hardware Real-Time Clock and Calendar (RTCC)
• Configurable Reference Clock Output (REFO)
• Two Configurable Logic Cells (CLC)
• Up to Two Single Output Capture/Compare/PWM
(SCCP) modules and up to Three Multiple Output
Capture/Compare/PWM (MCCP) modules
2013 Microchip Technology Inc.
Advance Information
DS33030A-page 3


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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PIC24FV16KM204 FAMILY
Pin Diagrams
20-Pin SPDIP/SSOP/SOIC
RA5
RA0
RA1
RB0
RB1
RB2
RA2
RA3
RB4
RA4
1
2
3
4
5
6
7
8
9
10
20 VDD
19 VSS
18 RB15
17 RB14
16 RB13
15 RB12
14 RA6 OR VDDCORE
13 RB9
12 RB8
11 RB7
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin Features
PIC24F08KM101
PIC24FVKM08KM101
MCLR/VPP/RA5
PGC2/CVREF+/VREF+/AN0/CN2/RA0
PGD2/CVREF-/VREF-/AN1/CN3/RA1
PGD1/AN2/CTCMP/ULPWU/C1IND/OC2A/CN4/RB0
PGC1/AN3/C1INC/CTED12/CN5/RB1
AN4/U1RX/TCKIB/CTED13/CN6/RB2
OSCI/CLKI/AN13/C1INB/CN30/RA2
OSCO/CLKO/AN14/C1INA/CN29/RA3
PGD3/SOSCI/AN15/CLCINA/CN1/RB4
PGC3/SOSCO/SCLKI/AN16/PWRLCLK/CLCINB/CN0/RA4
AN19/U1TX/CTED1/INT0/CN23/RB7
AN19/U1TX/IC1/OC1A/CTED1/INT0/CN23/RB7
AN20/SCL1/U1CTS/OC1B/CTED10/CN22/RB8
AN21/SDA1/T1CK/U1RTS/U1BCLK/IC2/CLC1O/CTED4/CN21/RB9
IC1/OC1A/INT2/CN8/RA6
VCAP OR VDDCORE
AN12/HLVDIN/SCK1/OC1C/CTED2/CN14/RB12
AN12/HLVDIN/SCK1/OC1C/CTED2/INT2/CN14/RB12
AN11/SDO1/OCFB/OC1D/CTPLS/CN13/RB13
CVREF/AN10/SDI1/C1OUT/OCFA/CTED5/INT1/CN12/RB14
AN9/REFO/SS1/TCKIA/CTED6/CN11/RB15
VSS/AVSS
VDD/AVDD
DS33030A-page 4
Advance Information
2013 Microchip Technology Inc.


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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PIC24FV16KM204 FAMILY
Pin Diagrams (Continued)
20-Pin QFN
20 19 18 17 16
RB0 1
15 RB15
RB1 2
14 RB14
RB2 3 PIC24F08KM101 13 RB13
RA2 4
12 RB12
RA3 5 6 7 8 9 10 11 RA6 or VDDCORE
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin Features
PIC24F08KM101
PIC24FV08KM101
PGD1/AN2/CTCMP/ULPWU/C1IND/OC2A/CN4/RB0
PGC1/AN3/C1INC/CTED12/CN5/RB1
AN4/U1RX/TCKIB/CTED13/CN6/RB2
OSCI/CLKI/AN13/C1INB/CN30/RA2
OSCO/CLKO/AN14/C1INA/CN29/RA3
PGD3/SOSCI/AN15/CLCINA/CN1/RB4
PGC3/SOSCO/SCLKI/AN16/PWRLCLK/CLCINB/CN0/RA4
AN19/U1TX/CTED1/INT0/CN23/RB7
AN19/U1TX/IC1/OC1A/CTED1/INT0/CN23/RB7
AN20/SCL1/U1CTS/OC1B/CTED10/CN22/RB8
AN21/SDA1/T1CK/U1RTS/U1BCLK/IC2/CLC1O/CTED4/CN21/RB9
IC1/OC1A/INT2/CN8/RA6
VCAP OR VDDCORE
AN12/HLVDIN/SCK1/OC1C/CTED2/CN14/RB12
AN12/HLVDIN/SCK1/OC1C/CTED2/INT2/CN14/RB12
AN11/SDO1/OCFB/OC1D/CTPLS/CN13/RB13
CVREF/AN10/SDI1/C1OUT/OCFA/CTED5/INT1/CN12/RB14
AN9/REFO/SS1/TCKIA/CTED6/CN11/RB15
VSS/AVSS
VDD/AVDD
MCLR/VPP/RA5
MCLR/VPP/RA5
PGC2/CVREF+ /VREF+/AN0/CN2/RA0
PGC2/CVREF+ /VREF+/AN0/CN2/RA0
PGD2/CVREF-/VREF-/AN1/CN3/RA1
PGD2/CVREF-/VREF-/AN1/CN3/RA1
2013 Microchip Technology Inc.
Advance Information
DS33030A-page 5


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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PIC24FV16KM204 FAMILY
Pin Diagrams (Continued)
28-Pin SPDIP/SSOP/SOIC
MCLR/RA5
RA0
RA1
RB0
RB1
RB2
RB3
VSS
RA2
RA3
RB4
RA4
VDD
RB5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 AVDD
27 AVSS
26 RB15
25 RB14
24 RB13
23 RB12
22 RB11
21 RB10
20 RA6 or VDDCORE
19 RA7
18 RB9
17 RB8
16 RB7
15 RB6
Pin Features
Pin
PIC24FXXKMX02
PIC24FVXXKMX02
1 MCLR/VPP/RA5
2 CVREF+/VREF+/DAC1REF+/AN0/C3INC/CN2/RA0
3 CVREF-/VREF-/AN1/CN3/RA1
CVREF-/VREF-/AN1/RA1
4 PGD1/AN2/CTCMP/ULPWU/C1IND/C2INB/C3IND/U2TX/CN4/RB0
5 PGC1/OA1INA/OA2INA/AN3/C1INC/C2INA/U2RX/CTED12/CN5/RB1
6 OA1INB/OA2INB/AN4/C1INB/C2IND/SDA2/U1RX/TCKIB/CTED13/CN6/RB2
7 OA1OUT/AN5/C1INA/C2INC/SCL2/CN7/RB3
8 VSS
9 OSCI/CLKI/AN13/CN30/RA2
10 OSCO/CLKO/AN14/CN29/RA3
11 SOSCI/AN15/U2RTS/U2BCLK/CN1/RB4
12 SOSCO/SCLKI/AN16/PWRLCLK/U2CTS/CN0/RA4
13 VDD
14 PGD3/AN17/ASDA1/SCK2/IC4/OC1E/CLCINA/CN27/RB5
15 PGC3/AN18/ASCL1/SDO2/IC5/OC1F/CLCINB/CN24/RB6
16 AN19/U1TX/INT0/CN23/RB7
AN19/U1TX/C2OUT/OC1A/INT0/CN23/RB7
17 AN20/SCL1/U1CTS/C3OUT/OC1B/CTED10/CN22/RB8
18 AN21/SDA1/T1CK/U1RTS/U1BCLK/IC2/OC4/CLC1O/CTED4/CN21/RB9
19 SDI2/IC1/OC5/CLC2O/CTED3/CN9/RA7
20 C2OUT/OC1A/CTED1/INT2/CN8/RA6
VCAP OR VDDCORE
21 PGD2/SDI1/OC3A/OC1C/CTED11/CN16/RB10
22 PGC2/SCK1/OC2A/CTED9/CN15/RB11
23 DAC1OUT/AN12/HLVDIN/SS2/IC3/OC2B/CTED2/CN14/RB12
DAC1OUT/AN12/HLVDIN/SS2/IC3/OC2B/CTED2/INT2/CN14/
RB12
24 OA1INC/OA2INC/AN11/SDO1/OCFB/OC3B/OC1D/CTPLS/CN13/RB13
25 DAC2OUT/CVREF/OA1IND/OA2IND/AN10/C3INB/RTCC/C1OUT/OCFA/CTED5/INT1/CN12/RB14
26 DAC2REF+/OA2OUT/AN9/C3INA/REFO/SS1/TCKIA/CTED6/CN11/RB15
27 VSS/AVSS
28 VDD/AVDD
Legend: Values in red indicate pin function differences between PIC24F(V)XXKM202 and PIC24F(V)XXKM102 devices.
DS33030A-page 6
Advance Information
2013 Microchip Technology Inc.


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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PIC24FV16KM204 FAMILY
Pin Diagrams (Continued)
28-Pin QFN(1)
28 27 26 25 24 23 22
RB0 1
21
RB1 2
20
RB2 3 PIC24F16KMX02 19
RB3 4
18
VSS 5
17
RA2 6
16
RA3 7
15
8 9 10 11 12 13 14
RB13
RB12
RB11
RB10
RA6 OR VDDCORE
RA7
RB9
Pin Features
Pin
PIC24FXXKMX02
Pin Features
PIC24FVXXKMX02
1 PGD1/AN2/CTCMP/ULPWU/C1IND/C2INB/C3IND/U2TX/CN4/RB0
2 PGC1/OA1INA/OA2INA/AN3/C1INC/C2INA/U2RX/CTED12/CN5/RB1
3 OA1INB/OA2INB/AN4/C1INB/C2IND/SDA2/U1RX/TCKIB/CTED13/CN6/RB2
4 OA1OUT/AN5/C1INA/C2INC/SCL2/CN7/RB3
5 VSS
6 OSCI/CLKI/AN13/CN30/RA2
7 OSCO/CLKO/AN14/CN29/RA3
8 SOSCI/AN15/U2RTS/U2BCLK/CN1/RB4
9 SOSCO/SCLKI/AN16/PWRLCLK/U2CTS/CN0/RA4
10 VDD
11 PGD3/AN17/ASDA1/SCK2/IC4/OC1E/CLCINA/CN27/RB5
12 PGC3/AN18/ASCL1/SDO2/IC5/OC1F/CLCINB/CN24/RB6
13 AN19/U1TX/INT0/CN23/RB7
AN19/U1TX/C2OUT/OC1A/INT0/CN23/RB7
14 AN20/SCL1/U1CTS/C3OUT/OC1B/CTED10/CN22/RB8
15 AN21/SDA1/T1CK/U1RTS/U1BCLK/IC2/OC4/CLC1O/CTED4/CN21/RB9
16 SDI2/IC1/OC5/CLC2O/CTED3/CN9/RA7
17 C2OUT/OC1A/CTED1/INT2/CN8/RA6
VDDCORE/VCAP
18 PGD2/SDI1/OC3A/OC1C/CTED11/CN16/RB10
19 PGC2/SCK1/OC2A/CTED9/CN15/RB11
20 DAC1OUT/AN12/HLVDIN/SS2/IC3/OC2B/CTED2/CN14/RB12 DAC1OUT/AN12/HLVDIN/SS2/IC3/OC2B/CTED2/INT2/CN14/RB12
21 OA1INC/OA2INC/AN11/SDO1/OCFB/OC3B/OC1D/CTPLS/CN13/RB13
22 DAC2OUT/CVREF/OA1IND/OA2IND/AN10/C3INB/RTCC/C1OUT/OCFA/CTED5/INT1/CN12/RB14
23 DAC2REF+/OA2OUT/AN9/C3INA/REFO/SS1/TCKIA/CTED6/CN11/RB15
24 VSS
25 VDD
26 MCLR/VPP/RA5
27 CVREF+/VREF+/DAC1REF+/AN0/C3INC/CN2/RA0
CVREF+/VREF+/DAC1REF+/AN0/C3INC/CTED1/CN2/RA0
28 CVREF-/VREF-/AN1/CN3/RA1
CVREF-/VREF-/AN1/CN3/RA1
Legend: Values in red indicate pin function differences between PIC24F(V)XXKM202 and PIC24F(V)XXKM102 devices.
Note 1: Exposed pad on underside of device is connected to VSS.
2013 Microchip Technology Inc.
Advance Information
DS33030A-page 7


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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PIC24FV16KM204 FAMILY
Pin Diagrams (Continued)
44-Pin TQFP/QFN(1)
Pin
PIC24FXXKMX04
Pin Features
PIC24FVXXKMX04
RB9 1
RC6 2
RC7 3
RC8 4
RC9 5
RA7 6
RA6 7
RB10 8
RB11 9
RB12 10
RB13 11
PIC24FXXKMX04
33 RB4
32 RA8
31 RA3
30 RA2
29 VSS
28 VDD
27 RC2
26 RC1
25 RC0
24 RB3
23 RB2
Legend: Values in red indicate pin
function differences between
PIC24F(V)XXKM202 and
PIC24F(V)XXKM102 devices.
Note 1: Exposed pad on underside of
device is connected to VSS.
1 AN21/SDA1/T1CK/U1RTS/U1BCLK/IC2/OC4/CLC1O/CTED4/CN21/RB9
2 U1RX/OC2C/CN18/RC6
3 U1TX/OC2D/CN17/RC7
4 OC2E/CN20/RC8
5 IC4/OC2F/CTED7/CN19/RC9
6 IC1/OC5/CLC2O/CTED3/CN9/RA7
7 C2OUT/OC1A/CTED1/INT2/CN8/RA6
VCAP or VDDCORE
8 PGD2/SDI1/OC1C/CTED11/CN16/RB10
9 PGC2/SCK1/OC2A/CTED9/CN15/RB11
10 DAC1OUT/AN12/HLVDIN/OC2B/CTED2/
CN14/RB12
DAC1OUT/AN12/HLVDIN/OC2B/CTED2/INT2/
CN14/RB12
11 OA1INC/OA2INC/AN11/SDO1/OC1D/CTPLS/CN13/RB13
12 IC5/OC3A/CN35/RA10
13 IC3/OC3B/CTED8/CN36/RA11
14 DAC2OUT/CVREF/OA1IND/OA2IND/AN10/C3INB/RTCC/C1OUT/OCFA/CTED5/INT1/CN12/
RB14
15 DAC2REF+/OA2OUT/AN9/C3INA/REFO/SS1/TCKIA/CTED6/CN11/RB15
16 AVSS
17 AVDD
18 MCLR/VPP/RA5
19 CVREF+/VREF+/DAC1REF+/AN0/C3INC/CN2/ CVREF+/VREF+/DAC1REF+/AN0/C3INC/
RA0 CTED1/CN2/RA0
20 CVREF-/VREF-/AN1/CN3/RA1
21 PGD1/AN2/CTCMP/ULPWU/C1IND/C2INB/C3IND/U2TX/CN4/RB0
22 PGC1/OA1INA/OA2INA/AN3/C1INC/C2INA/ OA1INA/OA2INA/AN3/C1INC/C2INA/U2RX/
U2RX/CTED12/CN5//RB1
CTED12/CN5/RB1
23 OA1INB/OA2INB/AN4/C1INB/C2IND/SDA2/TCKIB/CTED13/CN6/RB2
24 OA1OUT/AN5/C1INA/C2INC/SCL2/CN7/RB3
25 AN6/CN32/RC0
26 AN7/CN31/RC1
27 AN8/CN10/RC2
28 VDD
29 VSS
30 OSCI/CLKI/AN13/CN30/RA2
31 OSCO/CLKO/AN14/CN29/RA3
32 OCFB/CN33/RA8
33 SOSCI/AN15/U2RTS/U2BCLK/CN1/RB4
34 SOSCO/SCLKI/AN16/PWRLCLK/U2CTS/CN0/RA4
35 SS2/CN34/RA9
36 SDI2/CN28/RC3
37 SDO2/CN25/RC4
38 SCK2/CN26/RC5
39 VSS
40 VDD
41 PGD3/AN17/ASDA1/OC1E/CLCINA/CN27/RB5
42 PGC3/AN18/ASCL1/OC1F/CLCINB/CN24/RB6
43 AN19/INT0/CN23/RB7
AN19/C2OUT/OC1A/INT0/CN23/RB7
44 AN20/SCL1/U1CTS/C3OUT/OC1B/CTED10/CN22/RB8
DS33030A-page 8
Advance Information
2013 Microchip Technology Inc.


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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PIC24FV16KM204 FAMILY
Pin Diagrams (Continued)
48-Pin UQFN(1)
Pin Features
Pin
PIC24FXXKMX04
PIC24FVXXKMX04
RB9
RC6
RC7
RC8
RC9
RA7
RA6
n/c
RB10
RB11
RB12
RB13
1
2
3
4
5
6
7
8
9
10
11
12
PIC24FXXKMX04
PIC24FVXXKMX04
1
2
3
36
35
RB4
RA8
4
34 RA3 5
33
32
RA2
n/c
6
31 VSS 7
30
29
VDD
RC2
8
28 RC1 9
27
26
RC0
RB3
10
25 RB2 11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Legend: Values in red indicate pin
function differences between
PIC24F(V)XXKM202 and
PIC24F(V)XXKM102 devices.
Note 1: Exposed pad on underside of
device is connected to VSS.
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
AN21/SDA1/T1CK/U1RTS/U1BCLK/IC2/OC4/CLC1O/CTED4/CN21/RB9
U1RX/OC2C/CN18/RC6
U1TX/OC2D/CN17/RC7
OC2/CN20/RC8
IC4/OC2F/CTED7/CN19/RC9
IC1/OC5/CLC2O/CTED3/CN9/RA7
VDDCORE or VCAP
C2OUT/OC1A/CTED1/INT2/CN8/RA6
n/c n/c
PGD2/SDI1/OC1C/CTED11/CN16/RB10
PGC2/SCK1/OC2A/CTED9/CN15/RB11
DAC1OUT/AN12/HLVDIN/OC2B/CTED2/
CN14/RB12
DAC1OUT/AN12/HLVDIN/OC2B/CTED2/
INT2/CN14/RB12
OA1INC/OA2INC/AN11/SDO1/OC1D/CTPLS/CN13/RB13
IC5/OC3A/CN35/RA10
IC3/OC3B/CTED8/CN36/RA11
DAC2OUT/CVREF/OA1IND/OA2IND/AN10/C3INB/RTCC/C1OUT/OCFA/CTED5/INT1/
CN12/RB14
DAC2REF+/OA2OUT/AN9/C3INA/REFO/SS1/TCKIA/CTED6/CN11/RB15
VSS/AVSS
VDD/AVDD
MCLR/VPP/RA5
n/c
CVREF+/VREF+/DAC1REF+/AN0/C3INC/
CN2/RA0
CVREF+/VREF+/DAC1REF+/AN0/C3INC/
CTED1/CN2/RA0
CVREF-/VREF-/AN1/CN3/RA1
CVREF-/VREF-/AN1/CN3/RA1
PGD1/AN2/CTCMP/ULPWU/C1IND/C2INB/C3IND/U2TX/CN4/RB0
PGC1/OA1INA/OA2INA/AN3/C1INC/C2INA/U2RX/CTED12/CN5/RB1
OA1INB/OA2INB/AN4/C1INB/C2IND/SDA2/ AN4/C1INB/C2IND/SDA2/T5CK/
TCKIB/CTED13/CN6/RB2
T4CK/CTED13/CN6/RB2
OA1OUT/AN5/C1INA/C2INC/SCL2/CN7/RB3
AN6/CN32/RC0
AN7/CN31/RC1
AN8/CN10/RC2
VDD
VSS
n/c
OSCI/AN13/CLKI/CN30/RA2
OSCO/CLKO/AN14/CN29/RA3
OCFB/CN33/RA8
SOSCI/AN15/U2RTS/U2BCLK/CN1/RB4
SOSCO/SCLKI/AN16/PWRLCLK/U2CTS/CN0/RA4
SS2/CN34/RA9
SDI2/CN28/RC3
SDO2/CN25/RC4
SCK2/CN26/RC5
VSS
VDD
n/c
PGD3/AN17/ASDA1/OC1E/CLCINA/CN27/RB5
PGC3/AN18/ASCL1/OC1F/CLCINB/CN24/RB6
AN19/C2OUT/INT0/CN23/RB7
AN19/OC1A/INT0/CN23/RB7
AN20/SCL1/U1CTS/C3OUT/OC1B/CTED10/CN22/RB8
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Table of Contents
1.0 Device Overview ........................................................................................................................................................................ 13
2.0 Guidelines for Getting Started with 16-Bit Microcontrollers ........................................................................................................ 29
3.0 CPU ........................................................................................................................................................................................... 35
4.0 Memory Organization ................................................................................................................................................................. 41
5.0 Flash Program Memory .............................................................................................................................................................. 67
6.0 Data EEPROM Memory ............................................................................................................................................................. 73
7.0 Resets ........................................................................................................................................................................................ 79
8.0 Interrupt Controller ..................................................................................................................................................................... 85
9.0 Oscillator Configuration ............................................................................................................................................................ 121
10.0 Power-Saving Features ............................................................................................................................................................ 131
11.0 I/O Ports ................................................................................................................................................................................... 137
12.0 Timer1 ..................................................................................................................................................................................... 141
13.0 Capture/Compare/PWM/Timer Modules (MCCP and SCCP) .................................................................................................. 143
14.0 Master Synchronous Serial Port (MSSP) ................................................................................................................................. 159
15.0 Universal Asynchronous Receiver Transmitter (UART) ........................................................................................................... 173
16.0 Real-Time Clock and Calendar (RTCC) .................................................................................................................................. 181
17.0 Configurable Logic Cell (CLC).................................................................................................................................................. 195
18.0 High/Low-Voltage Detect (HLVD)............................................................................................................................................. 207
19.0 12-Bit A/D Converter with Threshold Detect ............................................................................................................................ 209
20.0 8-Bit Digital-to-Analog Converter (DAC)................................................................................................................................... 229
21.0 Dual Operational Amplifier Module........................................................................................................................................... 233
22.0 Comparator Module.................................................................................................................................................................. 235
23.0 Comparator Voltage Reference................................................................................................................................................ 239
24.0 Charge Time Measurement Unit (CTMU) ................................................................................................................................ 241
25.0 Special Features ...................................................................................................................................................................... 249
26.0 Development Support............................................................................................................................................................... 261
27.0 Electrical Characteristics .......................................................................................................................................................... 265
28.0 Packaging Information.............................................................................................................................................................. 297
Appendix A: Revision History............................................................................................................................................................. 323
Index ................................................................................................................................................................................................. 325
The Microchip Web Site ..................................................................................................................................................................... 331
Customer Change Notification Service .............................................................................................................................................. 331
Customer Support .............................................................................................................................................................................. 331
Reader Response .............................................................................................................................................................................. 332
Product Identification System............................................................................................................................................................. 333
DS33030A-page 10
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TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at docerrors@microchip.com or fax the Reader Response Form in the back of this data sheet to (480) 792-4150. We
welcome your feedback.
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000A is version A of document DS30000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current
devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision
of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are
using.
Customer Notification System
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NOTES:
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PIC24FV16KM204 FAMILY
1.0 DEVICE OVERVIEW
This document contains device-specific information for
the following devices:
• PIC24FV08KM101
• PIC24FV08KM102
• PIC24FV16KM102
• PIC24FV16KM104
• PIC24FV08KM202
• PIC24FV08KM204
• PIC24FV16KM202
• PIC24FV16KM204
• PIC24F08KM101
• PIC24F08KM102
• PIC24F16KM102
• PIC24F16KM104
• PIC24F08KM202
• PIC24F08KM204
• PIC24F16KM202
• PIC24F16KM204
The PIC24FV16KM204 family introduces many new
analog features to the extreme low-power Microchip
devices. This is a 16-bit microcontroller family with a
broad peripheral feature set and enhanced computa-
tional performance. This family also offers a new
migration option for those high-performance applica-
tions which may be outgrowing their 8-bit platforms, but
do not require the numerical processing power of a
Digital Signal Processor (DSC).
1.1 Core Features
1.1.1 16-BIT ARCHITECTURE
Central to all PIC24F devices is the 16-bit modified
Harvard architecture, first introduced with Microchip’s
dsPIC® Digital Signal Controllers. The PIC24F CPU
core offers a wide range of enhancements, such as:
• 16-bit data and 24-bit address paths with the
ability to move information between data and
memory spaces
• Linear addressing of up to 16 Mbytes (program
space) and 16 Kbytes (data)
• A 16-element working register array with built-in
software stack support
• A 17 x 17 hardware multiplier with support for
integer math
• Hardware support for 32-bit by 16-bit division
• An instruction set that supports multiple address-
ing modes and is optimized for high-level
languages, such as C
• Operational performance up to 16 MIPS
1.1.2 POWER-SAVING TECHNOLOGY
All of the devices in the PIC24FV16KM204 family incor-
porate a range of features that can significantly reduce
power consumption during operation. Key features
include:
• On-the-Fly Clock Switching, to allow the device
clock to be changed under software control to the
Timer1 source or the internal, low-power RC
oscillator during operation, allowing users to
incorporate power-saving ideas into their software
designs.
• Doze Mode Operation, when timing-sensitive
applications, such as serial communications,
require the uninterrupted operation of peripherals,
the CPU clock speed can be selectively reduced,
allowing incremental power savings without
missing a beat.
• Instruction-Based Power-Saving Modes, to allow
the microcontroller to suspend all operations or
selectively shut down its core while leaving its
peripherals active with a single instruction in
software.
1.1.3
OSCILLATOR OPTIONS AND
FEATURES
The PIC24FV16KM204 family offers five different oscil-
lator options, allowing users a range of choices in
developing application hardware. These include:
• Two Crystal modes using crystals or ceramic
resonators.
• Two External Clock modes offering the option of a
divide-by-2 clock output.
• Two Fast Internal oscillators (FRCs), one with a
nominal 8 MHz output and the other with a
nominal 500 kHz output. These outputs can also
be divided under software control to provide clock
speed as low as 31 kHz or 2 kHz.
• A Phase Locked Loop (PLL) frequency multiplier,
available to the external oscillator modes and the
8 MHz FRC oscillator, which allows clock speeds
of up to 32 MHz.
• A separate internal RC oscillator (LPRC) with a
fixed 31 kHz output, which provides a low-power
option for timing-insensitive applications.
The internal oscillator block also provides a stable ref-
erence source for the Fail-Safe Clock Monitor (FSCM).
This option constantly monitors the main clock source
against a reference signal provided by the internal
oscillator and enables the controller to switch to the
internal oscillator, allowing for continued low-speed
operation or a safe application shutdown.
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1.1.4 EASY MIGRATION
The PIC24FV16KM204 family devices have two
variants. The KM20X variant provides the full feature set
of the device, while the KM10X offers a reduced periph-
eral set, allowing for the balance of features and cost
(refer to Table 1-1). Both variants allow for a smooth
migration path as applications grow and evolve.
The consistent pinout scheme used throughout the entire
family also helps in migrating to the next larger device.
This is true when moving between devices with the same
pin count, different die variants, or even moving from
20-pin or 28-pin devices to 44-pin/48-pin devices.
The PIC24F family is pin compatible with devices in the
dsPIC33 family, and shares some compatibility with the
pinout schema for PIC18 and dsPIC30. This extends
the ability of applications to grow from the relatively
simple to the powerful and complex, yet still selecting a
Microchip device.
1.2 Other Special Features
• Communications: The PIC24FV16KM204 family
incorporates a range of serial communication
peripherals to handle a range of application
requirements. There is an MSSP module which
implements both SPI and I2C™ protocols, and
supports both Master and Slave modes of
operation for each. Devices also include one of
two UARTs with built-in IrDA® encoders/decoders.
• Analog Features: Select members of the
PIC24FV16KM204 family include two 8-bit
Digital-to-Analog Converters which offer support
in Idle mode, and left and right-justified input data,
as well as up to two operational amplifiers with
selectable power and speed modes.
• Real-Time Clock/Calendar (RTCC): This module
implements a full-featured clock and calendar with
alarm functions in hardware, freeing up timer
resources and program memory space for use of
the core application.
• 12-Bit A/D Converter: This module incorporates
programmable acquisition time, allowing for a
channel to be selected and a conversion to be
initiated without waiting for a sampling period and
faster sampling speed. The 16-deep result buffer
can be used either in Sleep, to reduce power, or in
Active mode to improve throughput.
• Charge Time Measurement Unit (CTMU) Interface:
The PIC24FV16KM204 family includes the new
CTMU interface module, which can be used for
capacitive touch sensing, proximity sensing, and
also for precision time measurement and pulse
generation. The CTMU can also be connected to
the operational amplifiers to provide active guard-
ing, which provides increased robustness in the
presence of noise in capacitive touch applications.
1.3 Details on Individual Family
Members
Devices in the PIC24FV16KM204 family are available
in 20-pin, 28-pin, 44-pin and 48-pin packages. The
general block diagram for all devices is shown in
Figure 1-1.
Members of the PIC24FV16KM204 family are available
as both standard and high-voltage devices. High-voltage
devices, designated with an “FV” in the part number
(such as PIC24FV16KM204), accommodate an operat-
ing VDD range of 2.0V to 5.5V and have an on-board
voltage regulator that powers the core. Peripherals
operate at VDD.
Standard devices, designated by “F” (such as
PIC24F16KM204), function over a lower VDD range of
1.8V to 3.6V. These parts do not have an internal regu-
lator, and both the core and peripherals operate directly
from VDD.
The PIC24FV16KM204 family may be thought of as
two different device groups, both offering slightly differ-
ent sets of features. These differ from each other in
multiple ways:
• The size of the Flash program memory
• The number of external analog channels available
• The number of Digital-to-Analog Converters
• The number of operational amplifiers
• The number of analog comparators
• The presence of a Real-Time Clock and Calendar
(RTCC)
• The number and type of CCP modules (i.e.,
MCCP vs. SCCP)
• The number of serial communication modules
(both MSSPs and UARTs)
• The number of Configurable Logic
Cell (CLC) modules.
The general differences between the different
sub-families are shown in Table 1-1 and Table 1-2.
A list of the pin features available on the
PIC24FV16KM204 family devices, sorted by function,
is provided in Table 1-5.
DS33030A-page 14
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TABLE 1-1: DEVICE FEATURES FOR THE PIC24F16KM204 FAMILY
Features
Operating Frequency
Program Memory (bytes)
Program Memory (instructions)
Data Memory (bytes)
Data EEPROM Memory (bytes)
Interrupt Sources (soft vectors/NMI traps)
Voltage Range
I/O Ports
Total I/O Pins
Timers
Capture/Compare/PWM modules
MCCP
SCCP
Serial Communications
MSSP
UART
Input Change Notification Interrupt
12-Bit Analog-to-Digital Module
(input channels)
Analog Comparators
8-Bit Digital-to-Analog Converters
Operational Amplifiers
Charge Time Measurement Unit (CTMU)
Real-Time Clock and Calendar (RTCC)
Configurable Logic Cell (CLC)
Resets (and delays)
Instruction Set
Packages
DC-32 MHz
16K 8K 16K 8K
5632
2816
5632
2816
2048
512
40 (36/4)
1.8-3.6V
PORTA<11:0>
PORTB<15:0>
PORTC<9:0>
PORTA<7:0>
PORTB<15:0>
38 24
11
(One 16-Bit Timer, five MCCP/SCCP with up to two 16/32 timers each)
3
2
2
2
37 23
22 22 19 19
3
2
2
Yes
Yes
2
POR, BOR, RESET Instruction, MCLR, WDT, Illegal Opcode,
REPEAT Instruction, Hardware Traps, Configuration Word Mismatch
(PWRT, OST, PLL Lock)
76 Base Instructions, Multiple Addressing Mode Variations
44-Pin QFN/TQFP,
48-Pin UQFN
28-Pin
SPDIP/SSOP/SOIC/QFN
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TABLE 1-2: DEVICE FEATURES FOR THE PIC24F16KM104 FAMILY
Features
Operating Frequency
Program Memory (bytes)
Program Memory (instructions)
Data Memory (bytes)
Data EEPROM Memory (bytes)
Interrupt Sources (soft vectors/NMI traps)
Voltage Range
I/O Ports
Total I/O Pins
Timers
Capture/Compare/PWM modules
MCCP
SCCP
Serial Communications
MSSP
UART
Input Change Notification Interrupt
12-Bit Analog-to-Digital Module
(input channels)
Analog Comparators
8-Bit Digital-to-Analog Converters
Operational Amplifiers
Charge Time Measurement Unit (CTMU)
Real-Time Clock and Calendar (RTCC)
Configurable Logic Cell (CLC)
Resets (and delays)
Instruction Set
Packages
DC-32 MHz
16K 16K 8K
8K
5632
5632
2816
2816
1024
512
25 (21/4)
1.8-3.6V
PORTA<11:0>
PORTB<15:0>
PORTC<9:0>
PORTA<7:0>
PORTB<15:0>
PORTA<6:0>
PORTB<15:12,9:7,
4,2:0>
38 24
18
5
(One 16-Bit Timer, two MCCP/SCCP with up to two 16/32 timers each)
1
1
1
1
37 23
17
22 19
16
1
Yes
1
POR, BOR, RESET Instruction, MCLR, WDT, Illegal Opcode,
REPEAT Instruction, Hardware Traps, Configuration Word Mismatch
(PWRT, OST, PLL Lock)
76 Base Instructions, Multiple Addressing Mode Variations
44-Pin
QFN/TQFP,
48-Pin UQFN
28-Pin
20-Pin
SPDIP/SSOP/SOIC/QFN SOIC/SSOP/SPDIP
DS33030A-page 16
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TABLE 1-3: DEVICE FEATURES FOR THE PIC24FV16KM204 FAMILY
Features
Operating Frequency
Program Memory (bytes)
Program Memory (instructions)
Data Memory (bytes)
Data EEPROM Memory (bytes)
Interrupt Sources (soft vectors/NMI traps)
Voltage Range
I/O Ports
Total I/O Pins
Timers
Capture/Compare/PWM modules
MCCP
SCCP
Serial Communications
MSSP
UART
Input Change Notification Interrupt
12-Bit Analog-to-Digital Module
(input channels)
Analog Comparators
8-Bit Digital-to-Analog Converters
Operational Amplifiers
Charge Time Measurement Unit (CTMU)
Real-Time Clock and Calendar (RTCC)
Configurable Logic Cell (CLC)
Resets (and delays)
Instruction Set
Packages
DC-32 MHz
16K 8K 16K 8K
5632
2816
5632
2816
2048
512
40 (36/4)
2.0-5.5V
PORTA<11:7,5:0>
PORTB<15:0>
PORTC<9:0>
PORTA<7,5:0>
PORTB<15:0>
37 23
11
(One 16-Bit Timer, five MCCP/SCCP with up to two 16/32 timers each)
3
2
2
2
36 22
22 19
3
2
2
Yes
Yes
2
POR, BOR, RESET Instruction, MCLR, WDT, Illegal Opcode,
REPEAT Instruction, Hardware Traps, Configuration Word Mismatch
(PWRT, OST, PLL Lock)
76 Base Instructions, Multiple Addressing Mode Variations
44-Pin QFN/TQFP,
48-Pin UQFN
28-Pin
SPDIP/SSOP/SOIC/QFN
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TABLE 1-4: DEVICE FEATURES FOR THE PIC24FV16KM104 FAMILY
Features
Operating Frequency
Program Memory (bytes)
Program Memory (instructions)
Data Memory (bytes)
Data EEPROM Memory (bytes)
Interrupt Sources (soft vectors/NMI traps)
Voltage Range
I/O Ports
Total I/O Pins
Timers
Capture/Compare/PWM modules
MCCP
SCCP
Serial Communications
MSSP
UART
Input Change Notification Interrupt
12-Bit Analog-to-Digital Module
(input channels)
Analog Comparators
8-Bit Digital-to-Analog Converters
Operational Amplifiers
Charge Time Measurement Unit (CTMU)
Real-Time Clock and Calendar (RTCC)
Configurable Logic Cell (CLC)
Resets (and delays)
Instruction Set
Packages
DC-32 MHz
16K 16K 8K
8K
5632
5632
2816
2816
1024
512
25 (21/4)
2.0-5.5V
PORTA<11:7,5:0>
PORTB<15:0>
PORTC<9:0>
PORTA<7,5:0>
PORTB<15:0>
PORTA<5:0>
PORTB<15:12,9:7,
4,2:0>
37 23
17
5
(One 16-Bit Timer, two MCCP/SCCP with up to two 16/32 timers each)
1
1
1
1
36 22
16
22 19
16
1
Yes
1
POR, BOR, RESET Instruction, MCLR, WDT, Illegal Opcode,
REPEAT Instruction, Hardware Traps, Configuration Word Mismatch
(PWRT, OST, PLL Lock)
76 Base Instructions, Multiple Addressing Mode Variations
44-Pin
QFN/TQFP,
48-Pin UQFN
28-Pin
20-Pin
SPDIP/SSOP/SOIC/QFN SOIC/SSOP/SPDIP
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PIC24FV16KM204 FAMILY
FIGURE 1-1:
PIC24FV16KM204 FAMILY GENERAL BLOCK DIAGRAMS
Interrupt
Controller
PSV and Table
Data Access
Control Block
23
23
Address Latch
Program Memory
Data EEPROM
Data Latch
8 16
PCH
PCL
Program Counter
Stack
Control
Logic
Repeat
Control
Logic
Data Bus
16
16
Data Latch
Data RAM
Address
Latch
16
Read AGU
Write AGU
Address Bus
24
EA MUX
16 16
Inst Latch
PORTA(1)
RA<0:7>
16
PORTB(1)
RB<0:15>
16
PORTC(1)
RC<9:0>
OSCO/CLKO Timing
OSCI/CLKI Generation
FRC/LPRC
Oscillators
Precision
Band Gap
Reference
Voltage
Regulator
Inst Register
Instruction
Decode and
Control
Control Signals
Divide
Support
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
17x17
Multiplier
DSWDT
BOR
16 x 16
W Reg Array
16-Bit ALU
16
VCAP
VDD, VSS MCLR
HLVD
RTCC Timer1 MCCP1-3 SCCP4/5
CTMU
12-Bit
A/D
Comparators
REFO
Op Amp
1/2
DAC1/2
CN1-36(1)
MSSP1/2
(I2C™, SPI)
CLC1/2
UART1/2
Note 1: All pins or features are not implemented on all device pinout configurations. See Table 1-5 for I/O port
pin descriptions.
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TABLE 1-5: PIC24FV16KM204 FAMILY PINOUT DESCRIPTION
F FV
Pin Number
Pin Number
Function
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
AN15
AN16
AN17
AN18
AN19
AN20
AN21
ASCL1
ASDA1
AVDD
AVSS
C1INA
C1INB
C1INC
C1IND
Legend:
2 2 27 19 21 2 2 27 19
3 3 28 20 22 3 3 28 20
4 4 1 21 23 4 4 1 21
5 5 2 22 24 5 5 2 22
6 6 3 23 25 6 6 3 23
— 7 4 24 26 — 7 4 24
— — — 25 27 — — — 25
— — — 26 28 — — — 26
— — — 27 29 — — — 27
18 26 23 15
16 18 26 23 15
17 25 22 14
15 17 25 22 14
16 24 21 11
12 16 24 21 11
15 23 20 10
11 15 23 20 10
7 9 6 30 33 7 9 6 30
8 10 7 31 34 8 10 7 31
9 11 8 33 36 9 11 8 33
10 12
9
34
37 10 12
9
34
— 14 11 41 45 — 14 11 41
— 15 12 42
46 — 15 12 42
11 16 13 43
47 11 16 13 43
12 17 14 44
48 12 17 14 44
13 18 15
1
1 13 18 15 1
— 15 12 42
46 — 15 12 42
— 14 11 41 45 — 14 11 41
20 28 25 17
18 20 28 25 17
19 27 24 16
17 19 27 24 16
8 7 4 24 26 8 7 4 24
7 6 3 23 25 7 6 3 23
5 5 2 22 24 5 5 2 22
4 4 1 21 23 4 4 1 21
ANA = Analog level input/output, ST = Schmitt Trigger input buffer, I2C™ = I2C/SMBus input buffer
21
22
23
24
25
26
27
28
29
16
15
12
11
33
34
36
37
45
46
47
48
1
46
45
18
17
26
25
24
23
I/O Buffer
Description
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I ANA A/D Analog Inputs
I/O I2C™ Alternate I2C1 Clock Input/Output
I/O I2C Alternate I2C1 Data Input/Output
P — A/D Supply Pins
P — A/D Supply Pins
I ANA Comparator 1 Input A (+)
I ANA Comparator 1 Input B (-)
I ANA Comparator 1 Input C (+)
I ANA Comparator 1 Input D (-)


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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TABLE 1-5: PIC24FV16KM204 FAMILY PINOUT DESCRIPTION (CONTINUED)
F FV
Pin Number
Pin Number
Function
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
C1OUT
C2INA
C2INB
C2INC
C2IND
C2OUT
C3INA
C3INB
C3INC
C3IND
C3OUT
CLC1O
CLC2O
CLCINA
CLCINB
CLKI
CLKO
CN0
CN1
CN2
CN3
CN4
CN5
CN6
CN7
CN8
CN9
CN10
CN11
CN12
Legend:
17 25 22 14
15 17 25 22 14
— 5 2 22 24 — 5 2 22
— 4 1 21 23 — 4 1 21
— 7 4 24 26 — 7 4 24
— 6 3 23 25 — 6 3 23
— 20 17
7
7 — 16 13 43
— 26 23 15
16 — 26 23 15
— 25 22 14
15 — 25 22 14
— 2 27 19 21 — 2 27 19
— 4 1 21 23 — 4 1 21
— 17 14 44
48 — 17 14 44
13 18 15
1
1 13 18 15 1
— 19 16
6
6 — 19 16 6
9 14 11 41 45 9 14 11 41
10 15 12 42
46 10 15 12 42
7 9 6 30 33 7 9 6 30
8 10 7 31 34 8 10 7 31
10 12
9
34
37 10 12
9
34
9 11 8 33 36 9 11 8 33
2 2 27 19 21 2 2 27 19
3 3 28 20 22 3 3 28 20
4 4 1 21 23 4 4 1 21
5 5 2 22 24 5 5 2 22
6 6 3 23 25 6 6 3 23
— 7 4 24 26 — 7 4 24
14 20 17
7
7 ——— —
— 19 16
6
6 — 19 16 6
— — — 27 29 — — — 27
18 26 23 15
16 18 26 23 15
17 25 22 14
15 17 25 22 14
ANA = Analog level input/output, ST = Schmitt Trigger input buffer, I2C™ = I2C/SMBus input buffer
15
24
23
26
25
47
16
15
21
23
48
1
6
45
46
33
34
37
36
21
22
23
24
25
26
6
29
16
15
I/O Buffer
Description
O — Comparator 1 Output
I ANA Comparator 2 Input A (+)
I ANA Comparator 2 Input B (-)
I ANA Comparator 2 Input C (+)
I ANA Comparator 2 Input D (-)
O — Comparator 2 Output
I ANA Comparator 3 Input A (+)
I ANA Comparator 3 Input B (-)
I ANA Comparator 3 Input C (+)
I ANA Comparator 3 Input D (-)
O — Comparator 3 Output
O — CLC 1 Output
O — CLC 2 Output
I ST CLC External Input A
I ST CLC External Input B
I ANA Primary Clock Input
O — System Clock Output
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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TABLE 1-5: PIC24FV16KM204 FAMILY PINOUT DESCRIPTION (CONTINUED)
F FV
Pin Number
Pin Number
Function
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
CN13
CN14
CN15
CN16
CN17
CN18
CN19
CN20
CN21
CN22
CN23
CN24
CN25
CN26
CN27
CN28
CN29
CN30
CN31
CN32
CN33
CN34
CN35
CN36
CTCMP
Legend:
16 24 21 11
12 16 24 21 11
15 23 20 10
11 15 23 20 10
— 22 19
9
10 — 22 19
9
— 21 18
8
9 — 21 18 8
———
3
3 ——— 3
———
2
2 ——— 2
———
5
5 ——— 5
———
4
4 ——— 4
13 18 15
1
1 13 18 15 1
12 17 14 44
48 12 17 14 44
11 16 13 43
47 11 16 13 43
— 15 12 42
46 — 15 12 42
— — — 37 40 — — — 37
— — — 38 41 — — — 38
— 14 11 41 45 — 14 11 41
— — — 36 39 — — — 36
8 10 7 31 34 8 10 7 31
7 9 6 30 33 7 9 6 30
— — — 26 28 — — — 26
— — — 25 27 — — — 25
— — — 32 35 — — — 32
— — — 35 38 — — — 35
— — — 12 13 — — — 12
— — — 13 14 — — — 13
4 4 1 21 23 4 4 1 21
ANA = Analog level input/output, ST = Schmitt Trigger input buffer, I2C™ = I2C/SMBus input buffer
12
11
10
9
3
2
5
4
1
48
47
46
40
41
45
39
34
33
28
27
35
38
13
14
23
I/O Buffer
Description
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ST Interrupt-on-Change Inputs
I ANA CTMU Comparator Input


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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TABLE 1-5: PIC24FV16KM204 FAMILY PINOUT DESCRIPTION (CONTINUED)
F FV
Pin Number
Pin Number
Function
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
CTED1
11 20 17
7
7 11 2 27 19
CTED2
15 23 20 10
11 15 23 20 10
CTED3
— 19 16
6
6 — 19 16 6
CTED4
13 18 15
1
1 13 18 15 1
CTED5
17 25 22 14
15 17 25 22 14
CTED6
18 26 23 15
16 18 26 23 15
CTED7
———
5
5 ——— 5
CTED8
— — — 13 14 — — — 13
CTED9
— 22 19
9
10 — 22 19
9
CTED10
12 17 14 44
48 12 17 14 44
CTED11
— 21 18
8
9 — 21 18 8
CTED12
5 5 2 22 24 5 5 2 22
CTED13
6 6 3 23 25 6 6 3 23
CTPLS
16 24 21 11
12 16 24 21 11
CVREF
17 25 22 14
15 17 25 22 14
CVREF+
2 2 27 19 21 2 2 27 19
CVREF-
3 3 28 20 22 3 3 28 20
DAC1OUT
— 23 20 10
11 — 23 20 10
DAC1REF+
— 2 27 19 21 — 2 27 19
DAC2OUT
— 25 22 14
15 — 25 22 14
DAC2REF+
— 26 23 15
16 — 26 23 15
HLVDIN
15 23 20 10
11 15 23 20 10
IC1
14 19 16
6
6 11 19 16 6
IC2
13 18 15
1
1 13 18 15 1
IC3
— 23 20 13
14 — 23 20 13
IC4
— 14 11
5
5 — 14 11 5
IC5
— 15 12 12
13 — 15 12 12
INT0
11 16 13 43
47 11 16 13 43
INT1
17 25 22 14
15 17 25 22 14
INT2
14 20 17
7
7 15 23 20 10
Legend: ANA = Analog level input/output, ST = Schmitt Trigger input buffer, I2C™ = I2C/SMBus input buffer
21
11
6
1
15
16
5
14
10
48
9
24
25
12
15
21
22
11
21
15
16
11
6
1
14
5
13
47
15
11
I/O Buffer
Description
I ST CTMU Trigger Edge Inputs
I ST CTMU Trigger Edge Inputs
I ST CTMU Trigger Edge Inputs
I ST CTMU Trigger Edge Inputs
I ST CTMU Trigger Edge Inputs
I ST CTMU Trigger Edge Inputs
I ST CTMU Trigger Edge Inputs
I ST CTMU Trigger Edge Inputs
I ST CTMU Trigger Edge Inputs
I ST CTMU Trigger Edge Inputs
I ST CTMU Trigger Edge Inputs
I ST CTMU Trigger Edge Inputs
I ST CTMU Trigger Edge Inputs
O — CTMU Pulse Output
O ANA Comparator Voltage Reference Output
I ANA Comparator Voltage Reference Positive Input
I ANA Comparator Voltage Reference Negative Input
O ANA DAC1 Output
I ANA DAC1 Positive Voltage Reference Input
O ANA DAC2 Output
I ANA DAC2 Positive Voltage Reference Input
I ANA External High/Low-Voltage Detect Input
I ST MCCP1 Input Capture Input
I ST MCCP2 Input Capture Input
I ST MCCP3 Input Capture Input
I ST SCCP4 Input Capture Input
I ST SCCP5 Input Capture Input
I ST External Interrupt 0 Input
I ST External Interrupt 1 Input
I ST External Interrupt 2 Input


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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TABLE 1-5: PIC24FV16KM204 FAMILY PINOUT DESCRIPTION (CONTINUED)
F FV
Pin Number
Pin Number
Function
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
MCLR
OA1INA
OA1INB
OA1INC
OA1IND
OA1OUT
OA2INA
OA2INB
OA2INC
OA2IND
OA2OUT
OC1A
OC1B
OC1C
OC1D
OC1E
OC1F
OC2A
OC2B
OC2C
OC2D
OC2E
OC2F
OC3A
OC3B
OC4
OC5
OCFA
OCFB
Legend:
1 1 26 18 19 1 1 26 18
— 5 2 22 24 — 5 2 22
— 6 3 23 25 — 6 3 23
— 24 21 11
12 — 24 21 11
— 25 22 14
15 — 25 22 14
— 7 4 24 26 — 7 4 24
— 5 2 22 24 — 5 2 22
— 6 3 23 25 — 6 3 23
— 24 21 11
12 — 24 21 11
— 25 22 14
15 — 25 22 14
— 26 23 15
16 — 26 23 15
14 20 17
7
7 11 16 13 43
12 17 14 44
48 12 17 14 44
15 21 18
8
9 15 21 18 8
16 24 21 11
12 16 24 21 11
— 14 11 41 45 — 14 11 41
— 15 12 42
46 — 15 12 42
4 22 19 9
10 4 22 19 9
— 23 20 10
11 — 23 20 10
———
2
2 ——— 2
———
3
3 ——— 3
———
4
4 ——— 4
———
5
5 ——— 5
— 21 18 12
13 — 21 18 12
— 24 21 13
14 — 24 21 13
— 18 15
1
1 — 18 15 1
— 19 16
6
6 — 19 16 6
17 25 22 14
15 17 25 22 14
16 24 21 32
35 16 24 21 32
ANA = Analog level input/output, ST = Schmitt Trigger input buffer, I2C™ = I2C/SMBus input buffer
19
24
25
12
15
26
24
25
12
15
16
47
48
9
12
45
46
10
11
2
3
4
5
13
14
1
6
15
35
I/O Buffer
Description
I ST Master Clear (Device Reset) Input (active-low)
I ANA Op Amp 1 Input A
I ANA Op Amp 1 Input B
I ANA Op Amp 1 Input C
I ANA Op Amp 1 Input D
O ANA Op Amp 1 Analog Output
I ANA Op Amp 2 Input A
I ANA Op Amp 2 Input B
I ANA Op Amp 2 Input C
I ANA Op Amp 2 Input D
O ANA Op Amp 2 Analog Output
O — MCCP1 Output Compare A
O — MCCP1 Output Compare B
O — MCCP1 Output Compare C
O — MCCP1 Output Compare D
O — MCCP1 Output Compare E
O — MCCP1 Output Compare F
O — MCCP2 Output Compare A
O — MCCP2 Output Compare B
O — MCCP2 Output Compare C
O — MCCP2 Output Compare D
O — MCCP2 Output Compare E
O — MCCP2 Output Compare F
O — MCCP3 Output Compare A
O — MCCP3 Output Compare B
O — SCCP4 Output Compare
O — SCCP5 Output Compare
I ST MCCP/SCCP Output Compare Fault Input A
I ST MCCP/SCCP Output Compare Fault Input B


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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TABLE 1-5: PIC24FV16KM204 FAMILY PINOUT DESCRIPTION (CONTINUED)
F FV
Pin Number
Pin Number
Function
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
OSCI
7 9 6 30 33 7 9 6 30
OSCO
8 10 7 31 34 8 10 7 31
PGC1
5 5 2 22 24 5 5 2 22
PGD1
4 4 1 21 23 4 4 1 21
PGC2
2 22 19 9
10 2 22 19 9
PGD2
3 21 18 8
9 3 21 18 8
PGC3
10 15 12 42
46 10 15 12 42
PGD3
9 14 11 41 45 9 14 11 41
PWRLCLK
10 12
9
34
37 10 12
9
34
RA0 2 2 27 19 21 2 2 27 19
RA1 3 3 28 20 22 3 3 28 20
RA2 7 9 6 30 33 7 9 6 30
RA3 8 10 7 31 34 8 10 7 31
RA4
10 12
9
34
37 10 12
9
34
RA5 1 1 26 18 19 1 1 26 18
RA6
14 20 17
7
7 ——— —
RA7
— 19 16
6
6 — 19 16 6
RA8 — — — 32 35 — — — 32
RA9 — — — 35 38 — — — 35
RA10
— — — 12 13 — — — 12
RA11
— — — 13 14 — — — 13
RB0 4 4 1 21 23 4 4 1 21
RB1 5 5 2 22 24 5 5 2 22
RB2 6 6 3 23 25 6 6 3 23
RB3 — 7 4 24 26 — 7 4 24
RB4 9 11 8 33 36 9 11 8 33
RB5
— 14 11 41 45 — 14 11 41
RB6
— 15 12 42
46 — 15 12 42
RB7
11 16 13 43
47 11 16 13 43
RB8
12 17 14 44
48 12 17 14 44
Legend: ANA = Analog level input/output, ST = Schmitt Trigger input buffer, I2C™ = I2C/SMBus input buffer
33
34
24
23
10
9
46
45
37
21
22
33
34
37
19
6
35
38
13
14
23
24
25
26
36
45
46
47
48
I/O Buffer
Description
I ANA Primary Oscillator Input
O ANA Primary Oscillator Output
I/O ST ICSP Clock 1
I/O ST ICSP Data 1
I/O ST ICSP Clock 2
I/O ST ICSP Data 2
I/O ST ICSP Clock 3
I/O ST ICSP Data 3
I ST RTCC Power Line Clock Input
I/O ST PORTA Pins
I/O ST PORTA Pins
I/O ST PORTA Pins
I/O ST PORTA Pins
I/O ST PORTA Pins
I/O ST PORTA Pins
I/O ST PORTA Pins
I/O ST PORTA Pins
I/O ST PORTA Pins
I/O ST PORTA Pins
I/O ST PORTA Pins
I/O ST PORTA Pins
I/O ST PORTB Pins
I/O ST PORTB Pins
I/O ST PORTB Pins
I/O ST PORTB Pins
I/O ST PORTB Pins
I/O ST PORTB Pins
I/O ST PORTB Pins
I/O ST PORTB Pins
I/O ST PORTB Pins


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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TABLE 1-5: PIC24FV16KM204 FAMILY PINOUT DESCRIPTION (CONTINUED)
F FV
Pin Number
Pin Number
Function
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
RB9
RB10
RB11
RB12
RB13
RB14
RB15
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
RC8
RC9
REFO
RTCC
SCK1
SDI1
SDO1
SS1
SCK2
SDI2
SDO2
SS2
Legend:
13 18 15
1
1 13 18 15 1
— 21 18
8
9 — 21 18 8
— 22 19
9
10 — 22 19
9
15 23 20 10
11 15 23 20 10
16 24 21 11
12 16 24 21 11
17 25 22 14
15 17 25 22 14
18 26 23 15
16 18 26 23 15
— — — 25 27 — — — 25
— — — 26 28 — — — 26
— — — 27 29 — — — 27
— — — 36 39 — — — 36
— — — 37 40 — — — 37
— — — 38 41 — — — 38
———
2
2 ——— 2
———
3
3 ——— 3
———
4
4 ——— 4
———
5
5 ——— 5
18 26 23 15
16 18 26 23 15
— 25 22 14
15 — 25 22 14
15 22 19
9
10 15 22 19
9
17 21 18
8
9 17 21 18 8
16 24 21 11
12 16 24 21 11
18 26 23 15
16 18 26 23 15
— 14 11 38 41 — 14 11 38
— 19 16 36
39 — 19 16 36
— 15 12 37
40 — 15 12 37
— 23 20 35
38 — 23 20 35
ANA = Analog level input/output, ST = Schmitt Trigger input buffer, I2C™ = I2C/SMBus input buffer
1
9
10
11
12
15
16
27
28
29
39
40
41
2
3
4
5
16
15
10
9
12
16
41
39
40
38
I/O Buffer
Description
I/O ST PORTB Pins
I/O ST PORTB Pins
I/O ST PORTB Pins
I/O ST PORTB Pins
I/O ST PORTB Pins
I/O ST PORTB Pins
I/O ST PORTB Pins
I/O ST PORTC Pins
I/O ST PORTC Pins
I/O ST PORTC Pins
I/O ST PORTC Pins
I/O ST PORTC Pins
I/O ST PORTC Pins
I/O ST PORTC Pins
I/O ST PORTC Pins
I/O ST PORTC Pins
I/O ST PORTC Pins
O — Reference Clock Output
O — Real-Time Clock/Calendar Output
I/O ST MSSP1 SPI Clock
I ST MSSP1 SPI Data Input
O — MSSP1 SPI Data Output
I ST MSSP1 SPI Slave Select Input
I/O ST MSSP2 SPI Clock
I ST MSSP2 SPI Data Input
O — MSSP2 SPI Data Output
I ST MSSP2 SPI Slave Select Input


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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TABLE 1-5: PIC24FV16KM204 FAMILY PINOUT DESCRIPTION (CONTINUED)
F FV
Pin Number
Pin Number
Function
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
SCL1
SDA1
SCL2
SDA2
SCLKI
SOSCI
SOSCO
T1CK
TCKIA
TCKIB
U1CTSN
U1RTS
U1BCLK
U1RX
U1TX
U2CTSN
U2RTS
U2BCLK
U2RX
U2TX
ULPWU
VCAP
VDD
VDDCORE
VPP
VREF+
VREF-
VSS
Legend:
12 17 14 44
48 12 17 14 44
48
13 18 15
1
1 13 18 15 1
1
— 7 4 24 26 — 7 4 24 26
— 6 3 23 25 — 6 3 23 25
10 12
9
34
37 10 12
9
34
37
9 11 8 33 36 9 11 8 33 36
10 12
9
34
37 10 12
9
34
37
13 18 15
1
1 13 18 15 1
1
18 26 23 15
16 18 26 23 15
16
6 6 3 23 25 6 6 3 23 25
12 17 14 44
48 12 17 14 44
48
13 18 15
1
1 13 18 15 1
1
13 18 15
1
1 13 18 15 1
1
663
2
2 663 2
2
11 16 13
3
3 11 16 13 3
3
- 12 9 34 37 - 12 9 34 37
- 11 8 33 36 - 11 8 33 36
13 18 15
1
1 13 18 15 1
1
- 5 2 22 24 - 5 2 22 24
- 4 1 21 23 - 4 1 21 23
4 4 1 21 23 4 4 1 21 23
---
-
- 14 20 17 7
7
20 28 25 17,28,28 18,30,30 20 28 25 17,28,28 18,30,30
---
-
- 14 20 17 7
7
1 1 26 18 19 1 1 26 18 19
2 2 27 19 21 2 2 27 19 21
3 3 28 20 22 3 3 28 20 22
19 27 24 16,29,29 17,31,31 19 27 24 16,29,29 17,31,31
ANA = Analog level input/output, ST = Schmitt Trigger input buffer, I2C™ = I2C/SMBus input buffer
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
O
O
I
O
I
O
O
I
O
I
P
P
P
P
I
I
P
Buffer
Description
I2C
I2C
I2C
I2C
ST
ANA
ANA
ST
ST
ST
ST
ST
ST
-
-
ST
-
ANA
-
-
-
-
ANA
ANA
-
MSSP1 I2C Clock
MSSP1 I2C Data
MSSP2 I2C Clock
MSSP2 I2C Data
Secondary Clock Digital Input
Secondary Oscillator Input
Secondary Oscillator Output
Timer1 Digital Input Cock
MCCP/SCCP Time Base Clock Input A
MCCP/SCCP Time Base Clock Input B
UART1 Clear-to-Send Input
UART1 Request-to-Send Output
UART1 16x Baud Rate Clock Output
UART1 Receive
UART1 Transmit
UART2 Clear-to-Send Input
UART2 Request-to-Send Output
UART2 16x Baud Rate Clock Output
UART2 Receive
UART2 Transmit
Ultra Low-Power Wake-up Input
Regulator External Filter Capacitor Connection
Device Positive Supply Voltage
Microcontroller Core Supply Voltage
High-Voltage Programming Pin
A/D Reference Voltage Positive Input
A/D Reference Voltage Negative Input
Device Ground Return Voltage


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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PIC24FV16KM204 FAMILY
NOTES:
DS33030A-page 28
Advance Information
2013 Microchip Technology Inc.


PIC24FV16KM202 (Microchip Technology)
16-Bit Flash Microcontroller

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PIC24FV16KM204 FAMILY
2.0 GUIDELINES FOR GETTING
STARTED WITH 16-BIT
MICROCONTROLLERS
2.1 Basic Connection Requirements
Getting started with the PIC24FV16KM204 family of
16-bit microcontrollers requires attention to a minimal
set of device pin connections before proceeding with
development.
The following pins must always be connected:
• All VDD and VSS pins
(see Section 2.2 “Power Supply Pins”)
• All AVDD and AVSS pins, regardless of whether or
not the analog device features are used
(see Section 2.2 “Power Supply Pins”)
• MCLR pin
(see Section 2.3 “Master Clear (MCLR) Pin”)
• VCAP pins
(see Section 2.4 “Voltage Regulator Pin (VCAP)”)
These pins must also be connected if they are being
used in the end application:
• PGECx/PGEDx pins used for In-Circuit Serial
Programming™ (ICSP™) and debugging purposes
(see Section 2.5 “ICSP Pins”)
• OSCI and OSCO pins when an external oscillator
source is used
(see Section 2.6 “External Oscillator Pins”)
Additionally, the following pins may be required:
• VREF+/VREF- pins are used when external voltage
reference for analog modules is implemented
Note:
The AVDD and AVSS pins must always be
connected, regardless of whether any of
the analog modules are being used.
The minimum mandatory connections are shown in
Figure 2-1.
FIGURE 2-1:
RECOMMENDED
MINIMUM CONNECTIONS
VDD
C2(2)
R1
R2
C1
C6(2)
MCLR
VCAP
(1)
PIC24FV16KM204
C7
VSS
VDD
VDD
VSS
C3(2)
C5(2)
C4(2)
Key (all values are recommendations):
C1 through C6: 0.1 µF, 20V ceramic
C7: 10 µF, 16V tantalum or ceramic
R1: 10 k
R2: 100to 470
Note 1:
2:
See Section 2.4 “Voltage Regulator Pin
(VCAP)” for an explanation of VCAP pin
connections.
The example shown is for a PIC24F device
with five VDD/VSS and AVDD/AVSS pairs.
Other devices may have more or less
pairs; adjust the number of decoupling
capacitors appropriately.
2013 Microchip Technology Inc.
Advance Information
DS33030A-page 29


PIC24FV16KM202 (Microchip Technology)
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2.2 Power Supply Pins
2.2.1 DECOUPLING CAPACITORS
The use of decoupling capacitors on every pair of
power supply pins, such as VDD, VSS, AVDD and
AVSS, is required.
Consider the following criteria when using decoupling
capacitors:
Value and type of capacitor: A 0.1 µF (100 nF),
10-20V capacitor is recommended. The capacitor
should be a low-ESR device, with a resonance
frequency in the range of 200 MHz and higher.
Ceramic capacitors are recommended.
Placement on the printed circuit board: The
decoupling capacitors should be placed as close
to the pins as possible. It is recommended to
place the capacitors on the same side of the
board as the device. If space is constricted, the
capacitor can be placed on another layer on the
PCB using a via; however, ensure that the trace
length from the pin to the capacitor is no greater
than 0.25 inch (6 mm).
Handling high-frequency noise: If the board is
experiencing high-frequency noise (upward of
tens of MHz), add a second ceramic type capaci-
tor in parallel to the above described decoupling
capacitor. The value of the second capacitor can
be in the range of 0.01 µF to 0.001 µF. Place this
second capacitor next to each primary decoupling
capacitor. In high-speed circuit designs, consider
implementing a decade pair of capacitances as
close to the power and ground pins as possible
(e.g., 0.1 µF in parallel with 0.001 µF).
Maximizing performance: On the board layout
from the power supply circuit, run the power and
return traces to the decoupling capacitors first,
and then to the device pins. This ensures that the
decoupling capacitors are first in the power chain.
Equally important is to keep the trace length
between the capacitor and the power pins to a
minimum, thereby reducing PCB trace
inductance.
2.2.2 TANK CAPACITORS
On boards with power traces running longer than
six inches in length, it is suggested to use a tank capac-
itor for integrated circuits, including microcontrollers, to
supply a local power source. The value of the tank
capacitor should be determined based on the trace
resistance that connects the power supply source to
the device, and the maximum current drawn by the
device in the application. In other words, select the tank
capacitor so that it meets the acceptable voltage sag at
the device. Typical values range from 4.7 µF to 47 µF.
2.3 Master Clear (MCLR) Pin
The MCLR pin provides two specific device
functions: device Reset, and device programming
and debugging. If programming and debugging are
not required in the end application, a direct
connection to VDD may be all that is required. The
addition of other components, to help increase the
application’s resistance to spurious Resets from
voltage sags, may be beneficial. A typical
configuration is shown in Figure 2-1. Other circuit
designs may be implemented, depending on the
application’s requirements.
During programming and debugging, the resistance
and capacitance that can be added to the pin must
be considered. Device programmers and debuggers
drive the MCLR pin. Consequently, specific voltage
levels (VIH and VIL) and fast signal transitions must
not be adversely affected. Therefore, specific values
of R1 and C1 will need to be adjusted based on the
application and PCB requirements. For example, it is
recommended that the capacitor, C1, be isolated
from the MCLR pin during programming and
debugging operations by using a jumper (Figure 2-2).
The jumper is replaced for normal run-time
operations.
Any components associated with the MCLR pin
should be placed within 0.25 inch (6 mm) of the pin.
FIGURE 2-2:
VDD
EXAMPLE OF MCLR PIN
CONNECTIONS
R1
R2
MCLR
JP PIC24FXXKXX
C1
Note 1:
2:
R1 10 kis recommended. A suggested
starting value is 10 k. Ensure that the
MCLR pin VIH and VIL specifications are met.
R2 470will limit any current flowing into
MCLR from the external capacitor, C, in the
event of MCLR pin breakdown, due to
Electrostatic Discharge (ESD) or Electrical
Overstress (EOS). Ensure that the MCLR pin
VIH and VIL specifications are met.
DS33030A-page 30
Advance Information
2013 Microchip Technology Inc.




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