N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
- CONTENTS -
REVISION HISTORY
-------------------------------------------------------
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
-------------------------------------------------------
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
-------------------------------------------------------
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
-------------------------------------------------------
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
4.2 BACKLIGHT UNIT
-------------------------------------------------------
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.4 COLOR DATA INPUT ASSIGNMENT
5.5 EDID DATA STRUCTURE
-------------------------------------------------------
6. INVERTER SPECIFICATION
6.1 INPUT CONNECTOR PIN ASSIGNMENT
6.2 INPUT CONNECTOR PIN ASSIGNMENT
6.3 OUTPUT CONNECTOR PIN ASSIGNMENT
6.4 GENERAL ELECTRICAL SPECIFICATION
7. INTERFACE TIMING
7.1 INPUT SIGNAL TIMING SPECIFICATIONS
7.2 POWER ON/OFF SEQUENCE
-------------------------------------------------------
-------------------------------------------------------
8. OPTICAL CHARACTERISTICS
8.1 TEST CONDITIONS
8.2 OPTICAL SPECIFICATIONS
-------------------------------------------------------
9. PRECAUTIONS
9.1 HANDLING PRECAUTIONS
9.2 STORAGE PRECAUTIONS
9.3 OPERATION PRECAUTIONS
-------------------------------------------------------
10. PACKING
10.1 CARTON
10.2 PALLET
-------------------------------------------------------
1
5
6
8
12
13
19
23
25
27
32
2 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
11. DEFINITION OF LABELS
11.1 CMO MODULE LABEL
11.2 CMO CARTON LABE
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
-------------------------------------------------------
32
3 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
Version
3.0
Date
Jan 17,’06
REVISION HISTORY
Page
(New)
Section
Description
All All Approval specification was first issued.
4 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
1 GENERAL DESCRIPTION
1.1 OVERVIEW
N141C1 - L01 is a 14.1” TFT Liquid Crystal Display module with single CCFL Backlight unit and 30 pins
LVDS interface. This module supports 1440 x (3 RGB) x 900 WXGA+ mode and can display 262,144 colors.
The optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is built in.
1.2 FEATURES
- Thin and Light Weight
- WXGA+ (1440 x 900 pixels) resolution
- DE only mode
- 3.3V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clock
1.3 APPLICATION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item
Active Area
Bezel Opening Area
Driver Element
Pixel Number
Pixel Pitch
Pixel Arrangement
Display Colors
Transmissive Mode
Surface Treatment
Specification
303.48(H) X 189.675(V) (14.1 inch Diagonal)
306.76 (H) x 193.0 (V)
a-si TFT active matrix
1440 x R.G.B. x 900
0.21075 (H) x 0.21075 (V)
RGB vertical stripe
262,144
Normally white
Antiglare/ Antisatic and Hard Coat (3H min.)
1.5 MECHANICAL SPECIFICATIONS
Item
Horizontal(H)
Module Size Vertical(V)
Depth(D)
Weight
Weight
Min.
319
205
--
--
--
Typ.
319.5
205.5
5.2
395
410
Max.
320
206
5.5
410
425
Unit
mm
mm
-
pixel
mm
-
color
-
-
Unit
mm
mm
mm
g
g
Note
(1)
-
-
-
-
-
-
-
Note
(1)
(2)
(3)
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions
(2) Weight without inverter
(3) Weight with inverter.
5 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
2 ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item
Storage Temperature
Operating Ambient Temperature
Shock (Non-Operating)
Vibration (Non-Operating)
Symbol
TST
TOP
SNOP
VNOP
Value
Min. Max.
-20 +60
0 +50
- 220
- 1.5
Note (1) Temperature and relative humidity range is shown in the figure below.
Unit
ºC
ºC
G
G
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation .
Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max.
Relative Humidity (%RH)
100
90
80
Note
(1)
(1), (2)
(3), (5)
(4), (5)
60
Operating Range
40
20
10 Storage Range
-40 -20
0 20 40
Temperature (ºC)
60 80
Note (3) 1 time for ± X, ± Y, ± Z. for Condition (220G / 2ms) is half Sine Wave
Note (4) 10 ~ 300 Hz, 10 min / Cycle, 3 cycles for each X, Y, Z.:
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
The fixing condition is shown as below:
At Room Temperature
Side Mount Fixing Screw
Gap=2mm
LCD Module
Bracket
Side Mount Fixing Screw
Stage
6 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
Item
Power Supply Voltage
Logic Input Voltage
Symbol
VCC
VIN
Min.
-0.3
-0.3
Value
Max.
+4.0
VCC+0.3
Unit
V
V
Note
(1)
2.2.2 BACKLIGHT UNIT
Item
Lamp Voltage
Lamp Current
Lamp Frequency
Symbol
VL
IL
FL
Value
Min. Max.
- 2.5K
2.0 6.5
45 80
Unit
VRMS
mARMS
KHz
Note
(1), (2)
(1), (2)
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
Note (2) Specified values are for lamp (Refer to 3.2 for further information).
7 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
3 ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
Parameter
Power Supply Voltage
Ripple Voltage
Rush Current
Power Supply Current
Logical Input Voltage
Terminating Resistor
Power per EBL WG
White
Black
“H” Level
“L” Level
Symbol
Vcc
VRP
IRUSH
lcc
VIL
VIH
RT
PEBL
Min.
3.0
-
-
-
-
-
-100
-
-
Value
Typ.
3.3
-
-
380
465
-
-
100
3.19
Max.
3.6
100
1.5
430
510
+100
-
-
-
Ta = 25 ± 2 ºC
Unit
V
mV
A
mA
mA
mV
mV
Ohm
W
Note
-
-
(2)
(3)a
(3)b
-
-
-
(4)
Note (1) The module should be always operated within above ranges.
Note (2) Measurement Conditions:
+3.3V
Q1 2SK1475
(High to Low)
(Control Signal)
SW
+12V
C1
1uF
R1
47K
Q2
R2
2SK1470
1K
VR1 47K
C2
0.01uF
FUSE
Vcc
C3
(LCD Module Input)
1uF
GND
Vcc rising time is 470us
+3.3V
0.9Vcc
0.1Vcc
470us
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv = 60
Hz, whereas a power dissipation check pattern below is displayed.
8 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
a. White Pattern
b. Black Pattern
Active Area
Active Area
Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input
power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv = 60 Hz,
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.
(c) Luminance: 60 nits.
.(d) The inverter used is provided from Sumida (www.sumida.com.tw). Please contact Sumida for detail
information. CMO provides the inverter in this product.
9 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
3.2 BACKLIGHT UNIT
Ta = 25 ± 2 ºC
Parameter
Symbol
Lamp Input Voltage
Lamp Current
Lamp Turn On Voltage
VL
IL
VS
Operating Frequency
Lamp Life Time
Power Consumption
FL
LBL
PL
Min.
612
2.0
-
-
45
15,000
-
Value
Typ.
680
6.0
-
-
-
-
4.08
Max.
748
6.5
1370 (25 oC)
1520 (0 oC)
80
-
-
Unit
VRMS
mARMS
VRMS
VRMS
KHz
Hrs
W
Note
IL = 6.0 mA
(1)
(2)
(2)
(3)
(5)
(4), IL = 6.0 mA
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below:
LCD
Module
HV (Pink)
LV (White)
1
2A
Current Meter
Inverter
Note (2) The voltage that must be larger than Vs should be applied to the lamp for more than 1 second
after startup. Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the
display, and this may cause line flow on the display. In order to avoid interference, the lamp
frequency should be detached from the horizontal synchronous frequency and its harmonics as far
as possible.
Note (4) PL = IL ͪVL
Note (5) The lifetime of lamp can be defined as the time in which it continues to operate under the condition
Ta = 25 ̈́2 oC and IL = 6 mArms until one of the following events occurs:
(a) When the brightness becomes or lowers than 50% of its original value.
(b) When the effective ignition length becomes or lowers than 80% of its original value. (Effective
ignition length is defined as an area that has less than 70% brightness compared to the
brightness in the center point.)
Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the
inverter must have specifications for the modularized lamp. The performance of the Backlight,
such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for
the lamp. All the parameters of an inverter should be carefully designed to avoid producing too
much current leakage from high voltage output of the inverter. When designing or ordering the
inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the
inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module
should be operated in the same manners when it is installed in your instrument.
The output of the inverter must have symmetrical (negative and positive) voltage waveform and
symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter
10 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may
produce interface with horizontal synchronous frequency and as a result this may cause beat on the
display. Therefore lamp frequency shall be as away possible from the horizontal synchronous
frequency and from its harmonics in order to prevent interference.
Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its
leakage current.
a. The asymmetry rate of the inverter waveform should be 10% below.
b. The distortion rate of the waveform should be within Ѕ2 ± 10%.
c. The ideal sine wave form shall be symmetric in positive and negative polarities.
* Asymmetry rate:
I p | I p – I –p | / Irms * 100%
I -p * Distortion rate
I p (or I –p) / Irms
11 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
4 BLOCK DIAGRAM
4.1 TFT LCD MODULE
Rxin0(+/-)
Rxin1(+/-)
Rxin2(+/-)
CLK(+/-)
Vcc
GND
DataEDID
CLKEDID
VEDID
LVDS INPUT /
TIMING CONTROLLER
DC/DC CONVERTER &
REFERENCE VOLTAGE
GENERATOR
EDID
EEPROM
VL LAMP CONNECTOR
(JST-BHSR-02VS-1)
4.2 BACKLIGHT UNIT
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
TFT LCD PANEL
(1440xR.G.B.x900)
DATA DRIVER IC
BACKLIGHT UNIT
1 HV (Pink)
2 LV (White)
12 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
5 INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol
Description
Polarity
1 Vss Ground
2 Vcc Power Supply +3.3 V (typical)
3 Vcc Power Supply +3.3 V (typical)
4
VEDID
DDC 3.3V Power
5 BIST Panel BIST enable
6 CLKEDID DDC Clock
7 DATAEDID DDC Data
8
RXO0- LVDS Differential Data Input (Odd)
Negative
9
RXO0+ LVDS Differential Data Input (Odd)
Positive
10 Vss Ground
11
RXO1- LVDS Differential Data Input (Odd)
Negative
12
RXO1+ LVDS Differential Data Input (Odd)
Positive
13 Vss Ground
14
RXO2- LVDS Differential Data Input (Odd)
Negative
15
RXO2+ LVDS Differential Data Input (Odd)
Positive
16 Vss Ground
17 RXOC- LVDS Clock Data Input (Odd)
Negative
18 RXOC+ LVDS Clock Data Input (Odd)
Positive
19 Vss Ground
20
RxE0- LVDS Differential Data Input (Even)
Negative
21
RxE0+ LVDS Differential Data Input (Even)
Positive
22 Vss Ground
23
RxE1- LVDS Differential Data Input (Even)
Negative
24
RxE1+ LVDS Differential Data Input (Even)
Positive
25 Vss Ground
26
RxE2- LVDS Differential Data Input (Even)
Negative
27
RxE2+ LVDS Differential Data Input (Even)
Positive
28 Vss Ground
29 RXEC- LVDS Clock Data Input (Even)
Negative
30 RXEC+ LVDS Clock Data Input (Even)
Positive
Note (1) Connector Part No.: JAE-FI-XB30SRL-HF11 or equivalent
Note (2) User’s connector Part No: JAE-FI-X30C2L or equivalent
Note (3) The first pixel is odd as shown in the following figure.
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
Remark
-
13 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
5.2 BACKLIGHT UNIT
Pin
Symbol
Description
1 HV High Voltage
2 LV Ground
Note (1) Connector Part No.: JST- BHSR-02VS-1 or equivalent
Note (2) User’s connector Part No.: SM02B-BHSS-1-TB or equivalent
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
Color
Pink
White
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
RXOC+
RXO2+/-
RXO1+/-
RXO0+/-
RXEC+
RXE2+/-
RXE1+/-
RXE0+/-
T/7
IN20
DE
IN13
OB1
IN6
OG0
T/7
IN20
DE
IN13
EB1
IN6
EG0
IN19
Vsync
IN12
OB0
IN5
OR5
IN18
IN17
IN16
Hsync
OB5
OB4
IN11
IN10
IN9
OG5
OG4
OG3
IN4 IN3
IN2
OR4
OR3
OR2
Signal for 1 DCLK Cycle (T)
IN19
Vsync
IN12
EB0
IN5
ER5
IN18
IN17
IN16
Hsync
EB5
EB4
IN11
IN10
IN9
EG5
EG4
EG3
IN4 IN3
IN2
ER4 ER3 ER2
Signal for 1 DCLK Cycle (T)
IN15
OB3
IN8
OG2
IN1
OR1
IN15
EB3
IN8
EG2
IN1
ER1
IN14
OB2
IN7
OG1
IN0
OR0
IN14
EB2
IN7
EG1
IN0
ER0
14 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
5.4 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
color versus data input.
Data Signal
Color
Red
Green
Blue
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
000000000000000000
Red 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
Green
000000111111000000
Basic Blue
000000000000111111
Colors Cyan
000000111111111111
Magenta
111111000000111111
Yellow
111111111111000000
White
111111111111111111
Red(0)/Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(1)
000001000000000000
Gray Red(2)
000010000000000000
Scale : : : : : : : : : : : : : : : : : : :
Of : : : : : : : : : : : : : : : : : : :
Red Red(61)
111101000000000000
Red(62)
111110000000000000
Red(63)
111111000000000000
Green(0)/Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green(1)
000000000001000000
Gray Green(2)
000000000010000000
Scale : : : : : : : : : : : : : : : : : : :
Of : : : : : : : : : : : : : : : : : : :
Green Green(61)
000000111101000000
Green(62)
000000111110000000
Green(63)
000000111111000000
Blue(0)/Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Blue(1)
000000000000000001
Gray Blue(2)
000000000000000010
Scale : : : : : : : : : : : : : : : : : : :
Of : : : : : : : : : : : : : : : : : : :
Blue Blue(61)
000000000000111101
Blue(62)
000000000000111110
Blue(63)
000000000000111111
Note (1) 0: Low Level Voltage, 1: High Level Voltage
15 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
5.5 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
Byte # Byte Field Name and Comments
(decimal) #(hex)
0 0 Header
1 1 Header
2 2 Header
3 3 Header
4 4 Header
5 5 Header
6 6 Header
7 7 Header
8 8 EISA ID manufacturer name (“CMO”)
9 9 EISA ID manufacturer name (Compressed ASCII)
10 0A ID product code (N141C1-L01)
11 0B ID product code (hex LSB first; N141C1-L01)
12 0C ID S/N (fixed “0”)
13 0D ID S/N (fixed “0”)
14 0E ID S/N (fixed “0”)
15 0F ID S/N (fixed “0”)
16 10 Week of manufacture (fixed “00H”)
17 11 Year of manufacture (fixed “00H”)
18 12 EDID structure version # (“1”)
19 13 EDID revision # (“3”)
20 14 Video I/P definition (“digital”)
21 15 Active area horizontal 30.348cm
22 16 Active area vertical 18.9675cm
23 17 Display Gamma (Gamma = ”2.2”)
24 18 Feature support (“Active off, RGB Color”)
25 19 Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1 Gy0
26 1A Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0
27 1B Rx=0.597
28 1C Ry=0.340
29 1D Gx=0.320
30 1E Gy=0.535
31 1F Bx=0.152
32 20 By=0.125
33 21 Wx=0.313
34 22 Wy=0.329
35 23 Established timings 1
36 24 Established timings 2 (1280*800@60Hz)
37 25 Manufacturer’s reserved timings
38 26 Standard timing ID # 1
39 27 Standard timing ID # 1
40 28 Standard timing ID # 2
41 29 Standard timing ID # 2
Value
(hex)
00
FF
FF
FF
FF
FF
FF
00
0D
AF
15
14
00
00
00
00
00
00
01
03
80
1E
13
78
0A
C0
05
98
57
52
89
27
20
50
54
00
00
00
01
01
01
01
Value
(binary)
00000000
11111111
11111111
11111111
11111111
11111111
11111111
00000000
00001101
10101111
00010101
00010100
00000000
00000000
00000000
00000000
00000000
00000000
00000001
00000011
10000000
00011110
00010011
01111000
00001010
11000000
00000101
10011000
01010111
01010010
10001001
00100111
00100000
01010000
01010100
00000000
00000000
00000000
00000001
00000001
00000001
00000001
16 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
42 2A Standard timing ID # 3
01 00000001
43 2B Standard timing ID # 3
01 00000001
44 2C Standard timing ID # 4
01 00000001
45 2D Standard timing ID # 4
01 00000001
46 2E Standard timing ID # 5
01 00000001
47 2F Standard timing ID # 5
01 00000001
48 30 Standard timing ID # 6
01 00000001
49 31 Standard timing ID # 6
01 00000001
50 32 Standard timing ID # 7
01 00000001
51 33 Standard timing ID # 7
01 00000001
52 34 Standard timing ID # 8
01 00000001
53 35 Standard timing ID # 8
01 00000001
54
Detailed timing description # 1 Pixel clock (“88.75MHz”,
36 According to VESA CVT Rev1.1)
AB 10101011
55 37 # 1 Pixel clock (hex LSB first)
22 00100010
56 38 # 1 H active (“1440”)
A0 10100000
57 39 # 1 H blank (“160”)
A0 10100000
58 3A # 1 H active : H blank (“1440 : 160”)
50 01010000
59 3B # 1 V active (”900”)
84 10000100
60 3C # 1 V blank (”26”)
1A 00011010
61 3D # 1 V active : V blank (”900 :26”)
30 00110000
62 3E # 1 H sync offset (”48”)
30 00110000
63 3F # 1 H sync pulse width ("32”)
20 00100000
64 40 # 1 V sync offset : V sync pulse width (”3 : 6”)
36 00110110
65
# 1 H sync offset : H sync pulse width : V sync offset : V sync
41 width (”48: 32 : 3 : 6”)
00 00000000
66 42 # 1 H image size (”303 mm”)
2F 00101111
67 43 # 1 V image size (”190 mm”)
BE 10111110
68 44 # 1 H image size : V image size (”303 : 190”)
10 00010000
69 45 # 1 H boarder (”0”)
00 00000000
70 46 # 1 V boarder (”0”)
00 00000000
71
# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol
47 Negatives
18 00011000
72
Detailed timing description # 2 Pixel clock (“73.75 MHz”,
48 According to VESA CVT Rev1.1)
CF 11001111
73 49 # 2 Pixel clock (hex LSB first)
1C 00011100
74 4A # 2 H active (“1440”)
A0 10100000
75 4B # 2 H blank (“160”)
A0 10100000
76 4C # 2 H active : H blank (“1440 : 160”)
50 01010000
77 4D # 2 V active (”900”)
84 10000100
78 4E # 2 V blank (”22”)
16 00010110
79 4F # 2 V active : V blank (”900 : 22”)
30 00110000
80 50 # 2 H sync offset (”48”)
30 00110000
81 51 # 2 H sync pulse width (”32”)
20 00100000
82 52 # 2 V sync offset : V sync pulse width (”3 : 6”)
36 00110110
83
# 2 H sync offset : H sync pulse width : V sync offset : V sync
53 width (”48 : 32 : 3 : 6”)
00 00000000
84 54 # 2 H image size (”303 mm”)
2F 00101111
85 55 # 2 V image size (”190 mm”)
BE 10111110
17 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
86 56 # 2 H image size : V image size (”303 : 190”)
10 00010000
87 57 # 2 H boarder (”0”)
00 00000000
88 58 # 2 V boarder (”0”)
00 00000000
89
59 Module "A" Revision =
Example: 00, 01, 02, 03, etc. 00 00000000
90 5A Detailed timing description # 3
00 00000000
91 5B # 3 Flag
00 00000000
92 5C # 3 Reserved
00 00000000
93
# 3 FE (hex) defines ASCII string (Model Name “N141C1”,
5D ASCII)
FE 11111110
94 5E # 3 Flag
00 00000000
95 5F # Dell P/N "MC196" 1st character (“M”)
4D 01001101
96 60 # Dell P/N " MC196" 1st character (“C”)
43 01000011
97 61 # Dell P/N " MC196" 1st character (“1”)
31 00110001
98 62 # Dell P/N " MC196" 1st character (“9”)
39 00111001
99 63 # Dell P/N " MC196" 1st character (“6”)
36 00110110
100 64 LCD Supplier EEDID Revision #: "3"
33 00110011
101 65 Manufacturer P/N ( "N")
4E 01001110
102 66 Manufacturer P/N ( "1" )
31 00110001
103 67 Manufacturer P/N ( "4" )
34 00110100
104 68 Manufacturer P/N ( "1" )
31 00110001
105 69 Manufacturer P/N ( "C" )
43 01000011
106 6A Manufacturer P/N ( "1" )
31 00110001
107
Manufacturer P/N (If <13 char, then terminate with ASCII code
6B 0Ah, set remaining char = 20h)
0A 00001010
108 6C Flag
00 00000000
109 6D Flag
00 00000000
110 6E Flag
00 00000000
111 6F Data Type Tag:
FE 11111110
112 70 Flag
00 00000000
113 71 SMBUS value @ 10nits = 36d
24 00100100
114 72 SMBUS value @ 17nits = 51d
33 00110011
115 73 SMBUS value @ 24nits = 58d
3A 00111010
116 74 SMBUS value @ 30nits = 70d
46 01000110
117 75 SMBUS value @ 60nits = 98d
62 01100010
118 76 SMBUS value @ 110nits = 141d
8D 10001101
119 77 SMBUS value @ 150nits = 171d
AB 10101011
120 78 SMBUS value @ max nits = 232d
E8 11101000
121 79 Numbers of LVDS Recevier chip = 2
02 00000010
122 7A BIST Enable: Yes = '01' No = '00' ("Yes")
01 00000001
123
(If <13 char, then terminate with ASCII code 0Ah, set remaining
7B char = 20h)
0A
00001010
124
(If <13 char, then terminate with ASCII code 0Ah, set remaining
7C char = 20h)
20
00100000
125
(If <13 char, then terminate with ASCII code 0Ah, set remaining
7D char = 20h)
20
00100000
126 7E Extension flag
00 00000000
127 7F Checksum
6B 01101011
18 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
6 INVERTER SPECIFICATION
6.1 Connector type
Input connector type: LVC-D20SFYG (HONDA)
Output connector: JST SM02B-BHSS-1-TB (JST)
6.2 Input connector pin assignment
6.2.1 Input Connector pin assignment:
Input connector
HONDA
LVC-D20SFYG
Comments
Pin Function
1
INV_SRC
This power rail should be used as a power rail to drive the backlight
DC-AC converter
2
INV_SRC
This power rail should be used as a power rail to drive the backlight
DC-AC converter
3
INV_SRC
This power rail should be used as a power rail to drive the backlight
DC-AC converter
4
INV_SRC
This power rail should be used as a power rail to drive the backlight
DC-AC converter
5
GND
Ground
6 NC No Connection
7
5VALW
This should be used as power source that stores the brightness/contrast
values & the circuit that interfaces with SMB_CLK & SMB_DAT
8
GND
Ground
9
SMB_DAT
SMBus interface for sending brightness & contrast information to the
inverter/panel
10
SMB_CLK
SMBus interface for sending brightness & contrast information to the
inverter/panel
11
GND
Ground
12
INV_PWM
System side PWM input signal for brightness control
13
GND
Ground
14 NC No Connection
15 ~ 20
NC No Connection
6.2.2 Absolute maximum ratings
Items
INV_SRC (Voltage)
FPBACK/SMB_CLK/SMB_DAT
(Voltage)
Absolute max. ratings
-1.0~23.5
-1.0~5.5
Unit
V
V
19 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
6.3 Output connector pin assignment
Pin
1
2
Name
CFL-High
CFL-Low
Description
High-voltage output to the CCFL
Low-voltage output to the CCFL
6.4 General electrical specification
6.4.1 Absolute maximum ratings
Items
INV_SRC (Voltage)
FPBACK/SMB_CLK/SMB_DAT
(Voltage)
Absolute max. ratings
-1.0~23.5
-1.0~5.5
Unit
V
V
6.4.2 Electrical characteristics:
No. Item
Symbol
Condition
Min. Typ. Max. Uint
1
Input Voltage
INV_SRC
7.5 14.4 21
V
2
Input Signal Level for
5VSUS
5VSUS
3
Input Signal Level for
5VALW
5VALW
--
4.75 5
-
5.2
V
V
4
Input Power
Pin(Max) 220nits@Vin=12V
- - 5.5 W
5
Brightness Adjust (Lamp
Current Control)
SMB_DAT
Control by SMBus(256
dimming control)
steps
00H
-
FFH
-
6 Output Voltage
Vout IL = 6.3mA(typ)
612 680 748 Vrms
Iout (Min)
Vin=7.5V~21V SMB_DAT=00H
Ta=25к, after running 30 min.
1.5
1.8
2.1 mArms
Output Current
7
Iout (Max)
Vin=7.5V~21V SMB_DAT=FFH
Ta=25к, after running 30 min.
6
6.3 6.6 mArms
8 Operation Frequency
Freq Vin=7.5V~21V
45 - 65 KHz
9 Burst mode frequency
10 Open Lamp Voltage
fB
Vopen
Vin=7.5V~21V
No Load
200 - 220 Hz
1400 -- 1800 Vrms
11 Striking Time
12 Efficiency
13 Start and Delay Time
Ts No Loadw
K Vin=7.5V, SMB_DAT=FFH
(RES LOAD=100K ohm)
Vin=14.4V,
SMB_DAT=00H
0.6 1 1.4 Sec
80 - - %
- 130 200 uS
20 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
Start –up time
14 (Turn on delay time)
Vin=14.4V,
SMB_DAT=FFH
- - 0.1 Sec
z Input Voltage
The operating input voltage of inverter shall be defined.
The inverter shall ignite the CCFL lamp at minimum input voltage at any environment conditions.
z On/Off control
Enable: At “ON” condition (FPBACK=Hi), enable the inverter.
Disable: At “OFF” condition (FPBACK=Lo), disable the inverter.
z Quiescent current
At the inverter “OFF” condition, input quiescent should be less than 0.1mA.
z Open lamp voltage
The inverter start-up output voltage will be above “Vopen” for “Ts” minimum at any condition under specify
until lamp to be ignited. The inverter should be shutdown if lamp ignition was failed in “Ts” maximum. The
inverter shall be capable of withstanding the output connections open without component over-stress / fire /
smoke /arc.
z Burst mode frequency
The burst mode frequency should be in specification in any environment condition and electrical condition.
z Brightness control
SM-BUS values for panel luminance are to be included in the on LCD board EEDID ROM chip table. The
supplier will measure panel luminance in a system and define the SMBUS values for each of the 8 required
luminance levels. The panel luminance, for which SMBUS values will be provided in the EEDID from byte #
113(hex #71), to byte # 120, (hex # 78), is show in the table below. The inverter supplier should provide
these appropriate values to CMO.
Step Count
Address
Step 1
Byte
113
SM-Bus Data Value 24
Luminance (nits) 10
Step 2
Byte
114
33
17
Step3
Byte
115
3A
24
Step 4
Byte
116
46
30
Step 5
Byte
117
62
60
Step 6
Byte
118
8D
110
Step 7
Byte
119
AB
150
Step 8
Byte
120
E8
Max
z Output ripple ratio
Ripple ratio = 2 * (Ipeak - Ivalley) / (Ipeak + Ivalley) * 100%
The Ripple ratio should be less than 5% and ripple frequency should be less than 200 Hz.
z Power up Overshoot & Undershoot
Overshoot & Undershoot at power up should not exceed the following limits.
Vin
0ШVin(min.)
0ШVin(typ.)
Output current
Io(rms)
Io(max.)
Io(min.)
Io(max.)
Io(min.)
Io (dI)
Settling time
Overshoot/Undershoot
(dT)
150% / 50%
5 ms max.
150% / 50%
5 ms max.
21 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
0ШVin(max.)
Io(max.)
Io(min.)
150% / 50%
5 ms max.
dI=Imax.-Io or dI=(Io-Imin.)/Io
z Output connections short protection
The inverter shall be capable of withstanding the output connections short without damage or over-stress.
And the inverter maximum input power shall be limited within 1W.
6.4.3 Mechanical Drawing
6.4.4 Other Information
z Safety
x The inverter shall meet the requirement of “Limited current circuits” in paragraphs 2.4.1 in IEC60950.
There is no fire/smoke while simulating the component of the inverter open/short test.
x The Inverter AND panel must be UL certified with CB certificate and LCC (Limited Current Circuit) test
and test reports from UL. Inverter panel combo must pass Dell Safety requirements.
z EMI
The inverter must meet the radiated limitation requirement of CISPR22 class B, FCC-B and VCCI level II
with 6dB margin minimum while the inverter operating in the complete system.
z Environment Regulation
x Follow the RoHS requirement.
x Fill in CMO’s official document <<Environmentally Conscious Products Questionnaire for Suppliers of
Materials, Parts, and Products>> and turn in to CMO before CMO’s specification approval process.
z Dell’s other requirements
1. The inverter must not emit any audible noise.
2. Please refer to CMO’s official document. “General Inverter Specification for LCD Module” for other
general information such as reliability test, safety and etc..
3. Please also refer to DELL’s official document about inverter:
z LCD Backlight Design Spec X00-04
z DELL’s LCD Inverter Qualification Plan, Rev. A00
z Prohibited Components
z “Holy Stone(كعഘ)”’s products are prohibited.
Confidential Notice
Remind that all the information described in this document is confidential. Please don’t reveal to other people
else before getting CMO’s agreement.ibed in this document is confidential. Please don’t reveal to other people
else before getting CMO’s agreement.
22 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
7 INTERFACE TIMING
7.1 INPUT SIGNAL TIMING SPECIFICATIONS
The specifications of input signal timing are as the following table and timing diagram.
Signal
DCLK
DE
Item
Frequency
Vertical Total Time
Vertical Addressing Time
Horizontal Total Time
Horizontal Addressing Time
Symbol Min. Typ. Max.
1/Tc 25 44.5 60
TV 910 926 1500
TVD
900 900 900
TH 760 800 880
THD 720 720 720
Unit
MHz
TH
TH
Tc
Tc
Note
-
-
-
-
-
DE
DCLK
DE
DATA
INPUT SIGNAL TIMING DIAGRAM
Tv
TVD
TH
TC THD
7.2 POWER ON/OFF SEQUENCE
- Power Supply
for LCD, Vcc
0V
- Interface Signal
(LVDS Signal of
Transmitter), VI
0V
- Power for Lamp
Power On
90%
10%
t1
t2
Power Off
t7
90%
Restart
10%
t4
t3
Valid Data
t5 t6
50%
50%
OFF ON OFF
10%
23 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
Timing Specifications:
0.5< t1 Љ 10 msec
0 < t2 Љ 50 msec
0 < t3 Љ 50 msec
t4 Њ 500 msec
t5 Њ 200 msec
t6 Њ 200 msec
Note (1) Please avoid floating state of interface signal at invalid period.
Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD Vcc to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.
Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To
avoid this phenomenon, we suggest that the Vcc falling time had better to follow
t7 Њ 5 msec
24 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
8 OPTICAL CHARACTERISTICS
8.1 TEST CONDITIONS
Item
Ambient Temperature
Ambient Humidity
Supply Voltage
Input Signal
Inverter Current
Inverter Driving Frequency
Inverter
Symbol
Ta
Value
25r2
Unit
oC
Ha
50r10
%RH
VCC 3.3
V
According to typical value in "3. ELECTRICAL CHARACTERISTICS"
IL 6 mA
FL 61 KHz
Sumida H05-4915
The relative measurement methods of optical characteristics are shown in 8.2. The following items
should be measured under the test conditions described in 8.1 and stable environment shown in Note (6).
8.2 OPTICAL SPECIFICATIONS
Item
Contrast Ratio
Response Time
Average Luminance of White
Luminance Non-Uniformity
Color Gamut
Red
Color
Chromaticity
Green
Blue
White
Symbol
CR
TR
TF
L5p
GW5p
GW13p
C.G
Rx
Ry
Gx
Gy
Bx
By
Wx
Wy
Viewing Angle
Horizontal
Vertical
Tx+
Tx-
TY+
TY-
Condition
Tx=0q, TY =0q
Viewing Normal
Angle
CRt10
Min.
400
-
-
185
-
-
42
TYP
-0.02
40
40
15
40
Typ.
600
5
11
230
-
-
45
0.590
0.340
0.319
0.541
0.152
0.125
0.313
0.329
45
45
20
45
Max.
-
10
16
-
20
35
-
TYP
+0.02
-
-
-
-
Unit
-
ms
ms
cd/m2
%
%
%
-
-
-
-
-
-
-
-
Deg.
Note
(2), (5)
(3)
(4), (5)
(5), (6)
(5), (7)
(1), (5)
25 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Note (1) Definition of Viewing Angle (Tx, Ty):
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
TX- = 90º x-
Normal
Tx = Ty = 0º
Ty- Ty
Tx
Tx
12 o’clock direction
y+
Ty+ = 90º
6 o’clock
Ty- = 90º
y-
x+ TX+ = 90º
Note (2) Definition of Contrast Ratio (CR):
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L63 / L0
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
CR = CR (5)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).
Note (3) Definition of Response Time (TR, TF):
100%
90%
Optical
Response
Gray Level 63
10%
0%
Gray Level 0
TR
66.67 ms
Gray Level 63
TF
66.67 ms
Time
26 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
Note (4) Definition of Average Luminance of White (L5p):
Measure the luminance of gray level 63 at 5 points
L5p = [L (5)+ L (10)+ L (11)+ L (12)+ L (13)] / 5
L (x) is corresponding to the luminance of the point X at Figure in Note (6)
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.
LCD Module
LCD Panel
Center of the Screen
Photometer
(CA210, CS-1000T)
Field of View = 2º
500 mm
Light Shield Room
(Ambient Luminance < 2 lux)
27 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
Note (6) Definition of White Variation (GW5p, GW13p):
Measure the luminance of gray level 63 at 5, 13 points
GW5p ={1-{ Minimum [L (5)+ L (10)+ L (11)+ L (12)+ L (13)] / Maximum [L (5)+ L (10)+ L (11)+ L (12)+
L (13)]}} *100%
GW13p ={1-{ Minimum [L (1) ~ L (13)] / Maximum [L (1) ~ L (13)]}} *100%
X : Test Point
X=1 to 5
Note (7) Definition of color gamut (C.G):
C.G= 'R G B /'R0 G0 B0,*100%
R0, G0, B0 : color coordinates of red, green, and blue defined by NTSC, respectively.
R, G, B : color coordinates of module on 63 gray levels of red, green, and blue, respectively.
'R0 G0 B0 : area of triangle defined by R0, G0, B0
'R G B: area of triangle defined by R, G, B
˖˜˘ ʳ˄ˌ ˆ˄
˃ˁˌ
˃ˁˋ
˃ˁˊ
˃ˁˉ
˃ˁˈ
˃ˁˇ
˃ˁˆ
˃ˁ˅
˃ˁ˄
˃
˃
G0
G
B
B0
˃ˁ˅
R R0
˃ˁˇ ˃ˁˉ
˃ˁˋ
28 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
9 PRECAUTIONS
9.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) The module should be assembled into the system firmly by using every mounting hole. Be
careful not to twist or bend the module.
(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause
electrical short or damage the polarizer.
(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and
assembly process.
(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is
very soft and easily scratched.
(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use
Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might
permanently damage the polarizer due to chemical reaction.
(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for
a long time.
(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.
(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.
(9) Do not disassemble the module.
(10) Do not pull or fold the lamp wire.
(11) Pins of I/F connector should not be touched directly with bare hands.
9.2 SAFETY PRECAUTIONS
(1) High temperature or humidity may reduce the performance of module. Please store LCD module within
the specified storage conditions.
(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may
damage LCD module when it is operating.
(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the
response time will become slowly, and the starting voltage of lamp will be higher than the room
temperature.
9.3 OPERATION PRECAUTIONS
(1) Do not pull the I/F connector in or out while the module is operating.
(2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This
can prevent the CMOS LSI chips from damage during latch-up.
(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.
29 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com


N141C1-L01 (CMI MEI)
TFT LCD Module

No Preview Available !

Click to Download PDF File for PC

Global LCD Panel Exchange Center
www.panelook.com
10 PACKAGING
10.1 CARTON
Issued Date: Jan 17, 2006
Model No.: N141C1 - L01
Approval
Figure. 10-1 Packing method
30 / 35
Version 3.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com




N141C1-L01.pdf
Click to Download PDF File