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RL78/G13
16
User’s Manual: Hardware
16-Bit Single-Chip Microcontrollers
All information contained in these materials, including products and product specifications,
represents information on the product at the time of publication and is subject to change by
Renesas Electronics Corp. without notice. Please review the latest information published by
Renesas Electronics Corp. through various means, including the Renesas Electronics Corp.
website (http://www.renesas.com).
www.renesas.com
Rev.1.00 Sep 2011


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Notice
1. All information included in this document is current as of the date this document is issued. Such information, however, is
subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please
confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to
additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website.
2. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights
of third parties by or arising from the use of Renesas Electronics products or technical information described in this document.
No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights
of Renesas Electronics or others.
3. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part.
4. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of
semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software,
and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by
you or third parties arising from the use of these circuits, software, or information.
5. When exporting the products or technology described in this document, you should comply with the applicable export control
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incurred by you resulting from errors in or omissions from the information included herein.
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(Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.


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NOTES FOR CMOS DEVICES
(1) VOLTAGE APPLICATION WAVEFORM AT INPUT PIN: Waveform distortion due to input noise or a
reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL
(MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise
from entering the device when the input level is fixed, and also in the transition period when the input level
passes through the area between VIL (MAX) and VIH (MIN).
(2) HANDLING OF UNUSED INPUT PINS: Unconnected CMOS device inputs can be cause of malfunction. If
an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc.,
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of
CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be
connected to VDD or GND via a resistor if there is a possibility that it will be an output pin. All handling
related to unused pins must be judged separately for each device and according to related specifications
governing the device.
(3) PRECAUTION AGAINST ESD: A strong electric field, when exposed to a MOS device, can cause
destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop
generation of static electricity as much as possible, and quickly dissipate it when it has occurred.
Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended
to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and
transported in an anti-static container, static shielding bag or conductive material. All test and measurement
tools including work benches and floors should be grounded. The operator should be grounded using a wrist
strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken
for PW boards with mounted semiconductor devices.
(4) STATUS BEFORE INITIALIZATION: Power-on does not necessarily define the initial status of a MOS
device. Immediately after the power source is turned ON, devices with reset functions have not yet been
initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A
device is not initialized until the reset signal is received. A reset operation must be executed immediately
after power-on for devices with reset functions.
(5) POWER ON/OFF SEQUENCE: In the case of a device that uses different power supplies for the internal
operation and external interface, as a rule, switch on the external power supply after switching on the internal
power supply. When switching the power supply off, as a rule, switch off the external power supply and then
the internal power supply. Use of the reverse power on/off sequences may result in the application of an
overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements
due to the passage of an abnormal current. The correct power on/off sequence must be judged separately
for each device and according to related specifications governing the device.
(6) INPUT OF SIGNAL DURING POWER OFF STATE : Do not input signals or an I/O pull-up power supply
while the device is not powered. The current injection that results from input of such a signal or I/O pull-up
power supply may cause malfunction and the abnormal current that passes in the device at this time may
cause degradation of internal elements. Input of signals during the power off state must be judged
separately for each device and according to related specifications governing the device.


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How to Use This Manual
Readers
This manual is intended for user engineers who wish to understand the functions of the
RL78/G13 and design and develop application systems and programs for these devices.
The target products are as follows.
20-pin: R5F1006x (x = A, C, D, E)
R5F1016x (x = A, C, D, E)
24-pin: R5F1007x (x = A, C, D, E)
R5F1017x (x = A, C, D, E)
25-pin: R5F1008x (x = A, C, D, E)
R5F1018x (x = A, C, D, E)
30-pin: R5F100Ax (x = A, C, D, E, F, G)
R5F101Ax (x = A, C, D, E, F, G)
32-pin: R5F100Bx (x = A, C, D, E, F, G)
R5F101Bx (x = A, C, D, E, F, G)
36-pin: R5F100Cx (x = A, C, D, E, F, G)
R5F101Cx (x = A, C, D, E, F, G)
40-pin: R5F100Ex (x = A, C, D, E, F, G, H)
R5F101Ex (x = A, C, D, E, F, G, H)
44-pin:
48-pin:
52-pin:
64-pin:
80-pin:
100-pin:
128-pin:
R5F100Fx (x = A, C, D, E, F, G, H, J, K, L)
R5F101Fx (x = A, C, D, E, F, G, H, J, K, L)
R5F100Gx (x = A, C, D, E, F, G, H, J, K, L)
R5F101Gx (x = A, C, D, E, F, G, H, J, K, L)
R5F100Jx (x = C, D, E, F, G, H, J, K, L)
R5F101Jx (x = C, D, E, F, G, H, J, K, L)
R5F100Lx (x = C, D, E, F, G, H, J, K, L)
R5F101Lx (x = C, D, E, F, G, H, J, K, L)
R5F100Mx (x = F, G, H, J, K, L)
R5F101Mx (x = F, G, H, J, K, L)
R5F100Px (x = F, G, H, J, K, L)
R5F101Px (x = F, G, H, J, K, L)
R5F100Sx (x = H, J, K, L)
R5F101Sx (x = H, J, K, L)
Purpose
This manual is intended to give users an understanding of the functions described in the
Organization below.
Organization
The RL78/G13 manual is separated into two parts: this manual and the instructions edition
(common to the RL78 Microcontroller).
RL78/G13
User’s Manual
(This Manual)
RL78 Microcontroller
User’s Manual
Instructions
Pin functions
Internal block functions
Interrupts
Other on-chip peripheral functions
Electrical specifications
CPU functions
Instruction set
Explanation of each instruction


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How to Read This Manual
It is assumed that the readers of this manual have general knowledge of electrical
engineering, logic circuits, and microcontrollers.
To gain a general understanding of functions:
Read this manual in the order of the CONTENTS. The mark “<R>” shows major
revised points. The revised points can be easily searched by copying an “<R>” in the
PDF file and specifying it in the “Find what:” field.
How to interpret the register format:
For a bit number enclosed in angle brackets, the bit name is defined as a reserved
word in the assembler, and is defined as an sfr variable using the #pragma sfr
directive in the compiler.
To know details of the RL78 Microcontroller instructions:
Refer to the separate document RL78 Microcontroller Instructions User’s Manual
(R01US0015E).
Conventions
Data significance:
Higher digits on the left and lower digits on the right
Active low representations: ××× (overscore over pin and signal name)
Note:
Footnote for item marked with Note in the text
Caution:
Information requiring particular attention
Remark:
Supplementary information
Numerical representations: Binary
...×××× or ××××B
Decimal
...××××
Hexadecimal ...××××H
Related Documents
The related documents indicated in this publication may include preliminary versions.
However, preliminary versions are not marked as such.
Documents Related to Devices
Document Name
RL78/G13 User’s Manual Hardware
RL78 Microcontroller Instructions User’s Manual
Document No.
This manual
R01US0015E
Documents Related to Flash Memory Programming
Document Name
PG-FP5 Flash Memory Programmer User’s Manual
Document No.
R20UT0008E
Caution The related documents listed above are subject to change without notice. Be sure to use the latest
version of each document when designing.


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Other Documents
Document Name
RENESAS MICROCOMPUTER GENERAL CATALOG
Semiconductor Device Mount Manual
Quality Grades on NEC Semiconductor Devices
NEC Semiconductor Device Reliability/Quality Control System
Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD)
Document No.
R01CS0001E
Note
C11531E
C10983E
C11892E
Note See the “Semiconductor Device Mount Manual” website (http://www.renesas.com/prod/package/manual/index.html).
Caution The related documents listed above are subject to change without notice. Be sure to use the latest
version of each document when designing.
All trademarks and registered trademarks are the property of their respective owners.
EEPROM is a trademark of Renesas Electronics Corporation.
Windows, Windows NT and Windows XP are registered trademarks or trademarks of Microsoft Corporation in the
United States and/or other countries.
PC/AT is a trademark of International Business Machines Corporation.
SuperFlash is a registered trademark of Silicon Storage Technology, Inc. in several countries including the United States
and Japan.
Caution: This product uses SuperFlash® technology licensed from Silicon Storage Technology, Inc.


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CONTENTS
CHAPTER 1 OUTLINE............................................................................................................................... 1
1.1 Features........................................................................................................................................... 1
1.2 Ordering Information...................................................................................................................... 3
1.3 Pin Configuration (Top View) ........................................................................................................ 6
1.3.1 20-pin products................................................................................................................................... 6
1.3.2 24-pin products................................................................................................................................... 7
1.3.3 25-pin products................................................................................................................................... 8
1.3.4 30-pin products................................................................................................................................... 9
1.3.5 32-pin products................................................................................................................................. 10
1.3.6 36-pin products................................................................................................................................. 11
1.3.7 40-pin products................................................................................................................................. 12
1.3.8 44-pin products................................................................................................................................. 13
1.3.9 48-pin products................................................................................................................................. 14
1.3.10 52-pin products............................................................................................................................... 16
1.3.11 64-pin products............................................................................................................................... 17
1.3.12 80-pin products............................................................................................................................... 19
1.3.13 100-pin products............................................................................................................................. 20
1.3.14 128-pin products............................................................................................................................. 22
1.4 Pin Identification........................................................................................................................... 23
1.5 Block Diagram .............................................................................................................................. 24
1.5.1 20-pin products................................................................................................................................. 24
1.5.2 24-pin products................................................................................................................................. 25
1.5.3 25-pin products................................................................................................................................. 26
1.5.4 30-pin products................................................................................................................................. 27
1.5.5 32-pin products................................................................................................................................. 28
1.5.6 36-pin products................................................................................................................................. 29
1.5.7 40-pin products................................................................................................................................. 30
1.5.8 44-pin products................................................................................................................................. 31
1.5.9 48-pin products................................................................................................................................. 32
1.5.10 52-pin products............................................................................................................................... 33
1.5.11 64-pin products............................................................................................................................... 34
1.5.12 80-pin products............................................................................................................................... 35
1.5.13 100-pin products............................................................................................................................. 36
1.5.14 128-pin products............................................................................................................................. 37
1.6 Outline of Functions..................................................................................................................... 38
Index-1


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CHAPTER 2 PIN FUNCTIONS ............................................................................................................... 44
2.1 Pin Function List .......................................................................................................................... 44
2.1.1 20-pin products................................................................................................................................. 45
2.1.2 24-pin products................................................................................................................................. 46
2.1.3 25-pin products................................................................................................................................. 47
2.1.4 30-pin products................................................................................................................................. 48
2.1.5 32-pin products................................................................................................................................. 50
2.1.6 36-pin products................................................................................................................................. 52
2.1.7 40-pin products................................................................................................................................. 54
2.1.8 44-pin products................................................................................................................................. 56
2.1.9 48-pin products................................................................................................................................. 58
2.1.10 52-pin products............................................................................................................................... 60
2.1.11 64-pin products............................................................................................................................... 62
2.1.12 80-pin products............................................................................................................................... 64
2.1.13 100-pin products............................................................................................................................. 67
2.1.14 128-pin products............................................................................................................................. 70
2.1.15 Pins for each product (pins other than port pins)............................................................................ 74
2.2 Description of Pin Functions ...................................................................................................... 80
2.2.1 P00 to P07 (port 0) ........................................................................................................................... 80
2.2.2 P10 to P17 (port 1) ........................................................................................................................... 81
2.2.3 P20 to P27 (port 2) ........................................................................................................................... 82
2.2.4 P30 to P37 (port 3) ........................................................................................................................... 82
2.2.5 P40 to P47 (port 4) ........................................................................................................................... 83
2.2.6 P50 to P57 (port 5) ........................................................................................................................... 85
2.2.7 P60 to P67 (port 6) ........................................................................................................................... 85
2.2.8 P70 to P77 (port 7) ........................................................................................................................... 86
2.2.9 P80 to P87 (port 8) ........................................................................................................................... 87
2.2.10 P90 to P97 (port 9) ......................................................................................................................... 87
2.2.11 P100 to P106 (port 10) ................................................................................................................... 87
2.2.12 P110 to P117 (port 11) ................................................................................................................... 88
2.2.13 P120 to P127 (port 12) ................................................................................................................... 88
2.2.14 P130, P137 (port 13) ...................................................................................................................... 89
2.2.15 P140 to P147 (port 14) ................................................................................................................... 89
2.2.16 P150 to P156 (port 15) ................................................................................................................... 91
2.2.17 VDD, EVDD0, EVDD1, VSS, EVSS0, EVSS1 ............................................................................................ 91
2.2.18 RESET ........................................................................................................................................... 91
2.2.19 REGC ............................................................................................................................................. 91
2.3 Pin I/O Circuits and Recommended Connection of Unused Pins ........................................... 92
Index-2


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CHAPTER 3 CPU ARCHITECTURE ...................................................................................................... 98
3.1 Memory Space .............................................................................................................................. 98
3.1.1 Internal program memory space..................................................................................................... 114
3.1.2 Mirror area...................................................................................................................................... 117
3.1.3 Internal data memory space ........................................................................................................... 119
3.1.4 Special function register (SFR) area .............................................................................................. 120
3.1.5 Extended special function register (2nd SFR: 2nd Special Function Register) area ..................... 120
3.1.6 Data memory addressing ............................................................................................................... 121
3.2 Processor Registers................................................................................................................... 131
3.2.1 Control registers ............................................................................................................................. 131
3.2.2 General-purpose registers.............................................................................................................. 133
3.2.3 ES and CS registers....................................................................................................................... 135
3.2.4 Special function registers (SFRs) ................................................................................................... 136
3.2.5 Extended special function registers (2nd SFRs: 2nd Special Function Registers) ......................... 142
3.3 Instruction Address Addressing............................................................................................... 151
3.3.1 Relative addressing........................................................................................................................ 151
3.3.2 Immediate addressing .................................................................................................................... 151
3.3.3 Table indirect addressing ............................................................................................................... 152
3.3.4 Register direct addressing.............................................................................................................. 153
3.4 Addressing for Processing Data Addresses ........................................................................... 154
3.4.1 Implied addressing ......................................................................................................................... 154
3.4.2 Register addressing ....................................................................................................................... 154
3.4.3 Direct addressing ........................................................................................................................... 155
3.4.4 Short direct addressing .................................................................................................................. 156
3.4.5 SFR addressing.............................................................................................................................. 157
3.4.6 Register indirect addressing ........................................................................................................... 158
3.4.7 Based addressing........................................................................................................................... 159
3.4.8 Based indexed addressing ............................................................................................................. 162
3.4.9 Stack addressing............................................................................................................................ 163
CHAPTER 4 PORT FUNCTIONS ......................................................................................................... 164
4.1 Port Functions ............................................................................................................................ 164
4.2 Port Configuration...................................................................................................................... 165
4.2.1 Port 0.............................................................................................................................................. 167
4.2.2 Port 1.............................................................................................................................................. 175
4.2.3 Port 2.............................................................................................................................................. 185
4.2.4 Port 3.............................................................................................................................................. 187
4.2.5 Port 4.............................................................................................................................................. 192
4.2.6 Port 5.............................................................................................................................................. 201
4.2.7 Port 6.............................................................................................................................................. 208
Index-3


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4.2.8 Port 7.............................................................................................................................................. 211
4.2.9 Port 8.............................................................................................................................................. 218
4.2.10 Port 9............................................................................................................................................ 222
4.2.11 Port 10.......................................................................................................................................... 227
4.2.12 Port 11.......................................................................................................................................... 231
4.2.13 Port 12.......................................................................................................................................... 234
4.2.14 Port 13.......................................................................................................................................... 239
4.2.15 Port 14.......................................................................................................................................... 241
4.2.16 Port 15.......................................................................................................................................... 249
4.3 Registers Controlling Port Function ........................................................................................ 251
4.4 Port Function Operations .......................................................................................................... 270
4.4.1 Writing to I/O port ........................................................................................................................... 270
4.4.2 Reading from I/O port ..................................................................................................................... 270
4.4.3 Operations on I/O port .................................................................................................................... 270
4.4.4 Connecting to external device with different potential (1.8 V, 2.5 V, 3 V) ....................................... 271
4.5 Settings of Port Mode Register, and Output Latch When Using Alternate Function.......... 273
4.6 Cautions When Using Port Function..................................................................................... 279
4.6.1 Cautions on 1-Bit Manipulation Instruction for Port Register n (Pn) ............................................... 279
4.6.2 Cautions on the pin settings on the products other than 128-pin.................................................... 280
CHAPTER 5 CLOCK GENERATOR .................................................................................................... 282
5.1 Functions of Clock Generator................................................................................................... 282
5.2 Configuration of Clock Generator ............................................................................................ 284
5.3 Registers Controlling Clock Generator.................................................................................... 286
5.4 System Clock Oscillator ............................................................................................................ 302
5.4.1 X1 oscillator.................................................................................................................................... 302
5.4.2 XT1 oscillator.................................................................................................................................. 302
5.4.3 High-speed on-chip oscillator ......................................................................................................... 306
5.4.4 Low-speed on-chip oscillator .......................................................................................................... 306
5.5 Clock Generator Operation ....................................................................................................... 307
5.6 Controlling Clock........................................................................................................................ 309
5.6.1 Example of setting high-speed on-chip oscillator ........................................................................... 309
5.6.2 Example of setting X1 oscillation clock........................................................................................... 310
5.6.3 Example of setting XT1 oscillation clock ........................................................................................ 311
5.6.4 CPU clock status transition diagram............................................................................................... 312
5.6.5 Condition before changing CPU clock and processing after changing CPU clock ......................... 318
5.6.6 Time required for switchover of CPU clock and main system clock ............................................... 320
5.6.7 Conditions before clock oscillation is stopped ................................................................................ 321
CHAPTER 6 TIMER ARRAY UNIT...................................................................................................... 322
6.1 Functions of Timer Array Unit................................................................................................... 324
Index-4


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6.1.1 Independent channel operation function ........................................................................................ 324
6.1.2 Simultaneous channel operation function....................................................................................... 325
6.1.3 8-bit timer operation function (channels 1 and 3 only).................................................................... 326
6.1.4 LIN-bus supporting function (channel 7 of unit 0 only) ................................................................... 327
6.2 Configuration of Timer Array Unit ............................................................................................ 328
6.3 Registers Controlling Timer Array Unit.................................................................................... 334
6.4 Basic Rules of Timer Array Unit ............................................................................................... 359
6.4.1 Basic rules of simultaneous channel operation function................................................................. 359
6.4.2 Basic rules of 8-bit timer operation function (channels 1 and 3 only) ............................................. 361
6.5 Operation Timing of Counter .................................................................................................... 362
6.5.1 Count clock (fTCLK) ....................................................................................................................... 362
6.5.2 Start timing of counter .................................................................................................................... 364
6.6 Channel Output (TOmn pin) Control ........................................................................................ 370
6.6.1 TOmn pin output circuit configuration............................................................................................. 370
6.6.2 TOmn Pin Output Setting ............................................................................................................... 371
6.6.3 Cautions on Channel Output Operation ......................................................................................... 372
6.6.4 Collective manipulation of TOmn bit............................................................................................... 378
6.6.5 Timer Interrupt and TOmn Pin Output at Operation Start ............................................................... 379
6.7 Independent Channel Operation Function of Timer Array Unit............................................. 380
6.7.1 Operation as interval timer/square wave output ............................................................................. 380
6.7.2 Operation as external event counter .............................................................................................. 386
6.7.3 Operation as frequency divider (channel 0 of unit 0 only) .............................................................. 391
6.7.4 Operation as input pulse interval measurement ............................................................................. 395
6.7.5 Operation as input signal high-/low-level width measurement........................................................ 399
6.7.6 Operation as delay counter ............................................................................................................ 403
6.8 Simultaneous Channel Operation Function of Timer Array Unit .......................................... 408
6.8.1 Operation as one-shot pulse output function .................................................................................. 408
6.8.2 Operation as PWM function............................................................................................................ 415
6.8.3 Operation as multiple PWM output function ................................................................................... 422
6.9 Cautions When Using Timer Array Unit................................................................................ 430
6.9.1 Cautions When Using Timer output................................................................................................ 430
CHAPTER 7 REAL-TIME CLOCK......................................................................................................... 431
7.1 Functions of Real-time Clock.................................................................................................... 431
7.2 Configuration of Real-time Clock ............................................................................................. 431
7.3 Registers Controlling Real-time Clock..................................................................................... 433
7.4 Real-time Clock Operation ........................................................................................................ 448
7.4.1 Starting operation of real-time clock ............................................................................................... 448
7.4.2 Shifting to STOP mode after starting operation .............................................................................. 449
7.4.3 Reading/writing real-time clock....................................................................................................... 450
7.4.4 Setting alarm of real-time clock ...................................................................................................... 452
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7.4.5 1 Hz output of real-time clock ......................................................................................................... 453
7.4.6 Example of watch error correction of real-time clock ...................................................................... 454
CHAPTER 8 INTERVAL TIMER ............................................................................................................ 457
8.1 Functions of Interval Timer ....................................................................................................... 457
8.2 Configuration of Interval Timer................................................................................................. 457
8.3 Registers Controlling Interval Timer ........................................................................................ 458
8.4 Interval Timer Operation ............................................................................................................ 461
CHAPTER 9 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER................................................. 462
9.1 Functions of Clock Output/Buzzer Output Controller ............................................................ 462
9.2 Configuration of Clock Output/Buzzer Output Controller...................................................... 464
9.3 Registers Controlling Clock Output/Buzzer Output Controller ............................................. 464
9.4 Operations of Clock Output/Buzzer Output Controller .......................................................... 467
9.4.1 Operation as output pin .................................................................................................................. 467
CHAPTER 10 WATCHDOG TIMER ..................................................................................................... 468
10.1 Functions of Watchdog Timer................................................................................................. 468
10.2 Configuration of Watchdog Timer .......................................................................................... 469
10.3 Register Controlling Watchdog Timer.................................................................................... 470
10.4 Operation of Watchdog Timer................................................................................................. 471
10.4.1 Controlling operation of watchdog timer ....................................................................................... 471
10.4.2 Setting overflow time of watchdog timer ....................................................................................... 472
10.4.3 Setting window open period of watchdog timer ............................................................................ 473
10.4.4 Setting watchdog timer interval interrupt ...................................................................................... 474
CHAPTER 11 A/D CONVERTER .......................................................................................................... 475
11.1 Function of A/D Converter....................................................................................................... 475
11.2 Configuration of A/D Converter .............................................................................................. 477
11.3 Registers Used in A/D Converter............................................................................................ 479
11.4 A/D Converter Conversion Operations .................................................................................. 504
11.5 Input Voltage and Conversion Results .................................................................................. 506
11.6 A/D Converter Operation Modes............................................................................................. 507
11.6.1 Software trigger mode (select mode, sequential conversion mode) ............................................. 507
11.6.2 Software trigger mode (select mode, one-shot conversion mode) ............................................... 508
11.6.3 Software trigger mode (scan mode, sequential conversion mode)............................................... 509
11.6.4 Software trigger mode (scan mode, one-shot conversion mode) ................................................. 510
11.6.5 Hardware trigger no-wait mode (select mode, sequential conversion mode) ............................... 511
11.6.6 Hardware trigger no-wait mode (select mode, one-shot conversion mode).................................. 512
11.6.7 Hardware trigger no-wait mode (scan mode, sequential conversion mode) ................................. 513
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11.6.8 Hardware trigger no-wait mode (scan mode, one-shot conversion mode) ................................... 514
11.6.9 Hardware trigger wait mode (select mode, sequential conversion mode) .................................... 515
11.6.10 Hardware trigger wait mode (select mode, one-shot conversion mode)..................................... 516
11.6.11 Hardware trigger wait mode (scan mode, sequential conversion mode) .................................... 517
11.6.12 Hardware trigger wait mode (scan mode, one-shot conversion mode) ...................................... 518
11.7 A/D Converter Setup Flowchart .............................................................................................. 519
11.7.1 Setting up software trigger mode.................................................................................................. 520
11.7.2 Setting up hardware trigger no-wait mode.................................................................................... 521
11.7.3 Setting up hardware trigger wait mode ......................................................................................... 522
11.7.4 Setup when using temperature sensor (example for software trigger mode and one-shot conversion
mode)........................................................................................................................................... 523
11.7.5 Setting up test mode .................................................................................................................... 524
11.8 SNOOZE Mode Function.......................................................................................................... 525
11.9 How to Read A/D Converter Characteristics Table............................................................... 528
11.10 Cautions for A/D Converter ................................................................................................... 530
CHAPTER 12 SERIAL ARRAY UNIT.................................................................................................. 534
12.1 Functions of Serial Array Unit................................................................................................. 536
12.1.1 3-wire serial I/O (CSI00, CSI01, CSI10, CSI11, CSI20, CSI21, CSI30, CSI31)............................ 536
12.1.2 UART (UART0 to UART3)............................................................................................................ 537
12.1.3 Simplified I2C (IIC00, IIC01, IIC10, IIC11, IIC20, IIC21, IIC30, IIC31)........................................... 538
12.2 Configuration of Serial Array Unit .......................................................................................... 539
12.3 Registers Controlling Serial Array Unit.................................................................................. 545
12.4 Operation stop mode ............................................................................................................... 571
12.4.1 Stopping the operation by units .................................................................................................... 572
12.4.2 Stopping the operation by channels ............................................................................................. 573
12.5 Operation of 3-Wire Serial I/O (CSI00, CSI01, CSI10, CSI11, CSI20, CSI21, CSI30, CSI31)
Communication ....................................................................................................................... 574
12.5.1 Master transmission ..................................................................................................................... 577
12.5.2 Master reception........................................................................................................................... 587
12.5.3 Master transmission/reception...................................................................................................... 596
12.5.4 Slave transmission ....................................................................................................................... 605
12.5.5 Slave reception............................................................................................................................. 614
12.5.6 Slave transmission/reception........................................................................................................ 621
12.5.7 SNOOZE mode function............................................................................................................... 631
12.5.8 Calculating transfer clock frequency............................................................................................. 635
12.5.9 Procedure for processing errors that occurred during 3-wire serial I/O (CSI00, CSI01, CSI10, CSI11,
CSI20, CSI21, CSI30, CSI31) communication ............................................................................. 637
12.6 Operation of UART (UART0 to UART3) Communication...................................................... 638
12.6.1 UART transmission ...................................................................................................................... 641
12.6.2 UART reception............................................................................................................................ 651
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12.6.3 SNOOZE mode function............................................................................................................... 658
12.6.4 Calculating baud rate ................................................................................................................... 663
12.6.5 Procedure for processing errors that occurred during UART (UART0 to UART3) communication667
12.7 LIN Communication Operation ............................................................................................... 668
12.7.1 LIN transmission........................................................................................................................... 668
12.7.2 LIN reception ................................................................................................................................ 671
12.8 Operation of Simplified I2C (IIC00, IIC01, IIC10, IIC11, IIC20, IIC21, IIC30, IIC31)
Communication ....................................................................................................................... 677
12.8.1 Address field transmission............................................................................................................ 680
12.8.2 Data transmission......................................................................................................................... 686
12.8.3 Data reception .............................................................................................................................. 690
12.8.4 Stop condition generation............................................................................................................. 695
12.8.5 Calculating transfer rate ............................................................................................................... 696
12.8.6 Procedure for processing errors that occurred during simplified I2C (IIC00, IIC01, IIC10, IIC11,
IIC20, IIC21, IIC30, IIC31) communication .................................................................................. 698
CHAPTER 13 SERIAL INTERFACE IICA ........................................................................................... 699
13.1 Functions of Serial Interface IICA........................................................................................... 699
13.2 Configuration of Serial Interface IICA .................................................................................... 702
13.3 Registers Controlling Serial Interface IICA............................................................................ 705
13.4 I2C Bus Mode Functions........................................................................................................... 719
13.4.1 Pin configuration........................................................................................................................... 719
13.4.2 Setting transfer clock by using IICWL0 and IICWH0 registers...................................................... 720
13.5 I2C Bus Definitions and Control Methods .............................................................................. 722
13.5.1 Start conditions............................................................................................................................. 722
13.5.2 Addresses .................................................................................................................................... 723
13.5.3 Transfer direction specification..................................................................................................... 723
13.5.4 Acknowledge (ACK) ..................................................................................................................... 724
13.5.5 Stop condition............................................................................................................................... 725
13.5.6 Wait .............................................................................................................................................. 726
13.5.7 Canceling wait .............................................................................................................................. 728
13.5.8 Interrupt request (INTIICA0) generation timing and wait control................................................... 729
13.5.9 Address match detection method ................................................................................................. 730
13.5.10 Error detection............................................................................................................................ 730
13.5.11 Extension code........................................................................................................................... 730
13.5.12 Arbitration ................................................................................................................................... 731
13.5.13 Wakeup function......................................................................................................................... 733
13.5.14 Communication reservation........................................................................................................ 736
13.5.15 Cautions ..................................................................................................................................... 740
13.5.16 Communication operations......................................................................................................... 741
13.5.17 Timing of I2C interrupt request (INTIICA0) occurrence ............................................................... 748
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13.6 Timing Charts ........................................................................................................................... 769
CHAPTER 14 MULTIPLIER AND DIVIDER/MULTIPLY-ACCUMULATOR ......................................... 784
14.1 Functions of Multiplier and Divider/Multiply-Accumulator ................................................. 784
14.2 Configuration of Multiplier and Divider/Multiply-Accumulator .......................................... 784
14.3 Register Controlling Multiplier and Divider/Multiply-Accumulator.................................... 790
14.4 Operations of Multiplier and Divider/Multiply-Accumulator ............................................... 792
14.4.1 Multiplication (unsigned) operation .............................................................................................. 792
14.4.2 Multiplication (signed) operation .................................................................................................. 793
14.4.3 Multiply-accumulation (unsigned) operation................................................................................. 794
14.4.4 Multiply-accumulation (signed) operation..................................................................................... 796
14.4.5 Division operation ........................................................................................................................ 798
CHAPTER 15 DMA CONTROLLER ..................................................................................................... 800
15.1 Functions of DMA Controller .................................................................................................. 800
15.2 Configuration of DMA Controller ............................................................................................ 801
15.3 Registers Controlling DMA Controller ................................................................................... 804
15.4 Operation of DMA Controller................................................................................................... 809
15.4.1 Operation procedure .................................................................................................................... 809
15.4.2 Transfer mode .............................................................................................................................. 810
15.4.3 Termination of DMA transfer ........................................................................................................ 810
15.5 Example of Setting of DMA Controller ................................................................................... 811
15.5.1 CSI consecutive transmission ...................................................................................................... 811
15.5.2 Consecutive capturing of A/D conversion results ......................................................................... 813
15.5.3 UART consecutive reception + ACK transmission........................................................................ 815
15.5.4 Holding DMA transfer pending by DWAITn bit ............................................................................. 817
15.5.5 Forced termination by software .................................................................................................... 818
15.6 Cautions on Using DMA Controller ........................................................................................ 820
CHAPTER 16 INTERRUPT FUNCTIONS............................................................................................. 822
16.1 Interrupt Function Types ......................................................................................................... 822
16.2 Interrupt Sources and Configuration ..................................................................................... 822
16.3 Registers Controlling Interrupt Functions............................................................................. 829
16.4 Interrupt Servicing Operations ............................................................................................... 842
16.4.1 Maskable interrupt request acknowledgment ............................................................................... 842
16.4.2 Software interrupt request acknowledgment ................................................................................ 845
16.4.3 Multiple interrupt servicing............................................................................................................ 845
16.4.4 Interrupt request hold ................................................................................................................... 849
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CHAPTER 17 KEY INTERRUPT FUNCTION ..................................................................................... 850
17.1 Functions of Key Interrupt ...................................................................................................... 850
17.2 Configuration of Key Interrupt ................................................................................................ 850
17.3 Register Controlling Key Interrupt ......................................................................................... 852
CHAPTER 18 STANDBY FUNCTION .................................................................................................. 853
18.1 Standby Function and Configuration ..................................................................................... 853
18.1.1 Standby function........................................................................................................................... 853
18.1.2 Registers controlling standby function.......................................................................................... 854
18.2 Standby Function Operation ................................................................................................... 857
18.2.1 HALT mode .................................................................................................................................. 857
18.2.2 STOP mode.................................................................................................................................. 862
18.2.3 SNOOZE mode ............................................................................................................................ 867
CHAPTER 19 RESET FUNCTION........................................................................................................ 869
19.1 Register for Confirming Reset Source ................................................................................... 879
CHAPTER 20 POWER-ON-RESET CIRCUIT ...................................................................................... 881
20.1 Functions of Power-on-reset Circuit ...................................................................................... 881
20.2 Configuration of Power-on-reset Circuit................................................................................ 882
20.3 Operation of Power-on-reset Circuit ...................................................................................... 882
20.4 Cautions for Power-on-reset Circuit....................................................................................... 885
CHAPTER 21 VOLTAGE DETECTOR .................................................................................................. 887
21.1 Functions of Voltage Detector ................................................................................................ 887
21.2 Configuration of Voltage Detector.......................................................................................... 888
21.3 Registers Controlling Voltage Detector ................................................................................. 888
21.4 Operation of Voltage Detector ................................................................................................ 893
21.4.1 When used as reset mode............................................................................................................ 893
21.4.2 When used as interrupt mode ...................................................................................................... 895
21.4.3 When used as interrupt and reset mode ...................................................................................... 897
21.5 Cautions for Voltage Detector................................................................................................. 900
CHAPTER 22 SAFETY FUNCTIONS ..................................................................................................... 902
22.1 Overview of Safety Functions ................................................................................................. 902
22.2 Registers Used by Safety Functions ...................................................................................... 903
22.3 Operation of Safety Functions ................................................................................................ 903
22.3.1 Flash memory CRC operation function (high-speed CRC)........................................................... 903
22.3.2 CRC operation function (general-purpose CRC) .......................................................................... 907
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22.3.3 RAM parity error detection function .............................................................................................. 909
22.3.4 RAM guard function...................................................................................................................... 910
22.3.5 SFR guard function ...................................................................................................................... 911
22.3.6 Invalid memory access detection function .................................................................................... 912
22.3.7 Frequency detection function ....................................................................................................... 914
22.3.8 A/D test function ........................................................................................................................... 916
CHAPTER 23 REGULATOR ................................................................................................................. 920
23.1 Regulator Overview.................................................................................................................. 920
CHAPTER 24 OPTION BYTE............................................................................................................... 921
24.1 Functions of Option Bytes ...................................................................................................... 921
24.1.1 User option byte (000C0H to 000C2H/010C0H to 010C2H)......................................................... 921
24.1.2 On-chip debug option byte (000C3H/ 010C3H)............................................................................ 922
24.2 Format of User Option Byte .................................................................................................... 923
24.3 Format of On-chip Debug Option Byte................................................................................... 927
24.4 Setting of Option Byte.............................................................................................................. 928
CHAPTER 25 FLASH MEMORY .......................................................................................................... 929
25.1 Writing to Flash Memory by Using Flash Memory Programmer ......................................... 930
25.1.1 Programming Environment........................................................................................................... 932
25.1.2 Communication Mode .................................................................................................................. 932
25.2 Writing to Flash Memory by Using External Device (that Incorporates UART) ................. 933
25.2.1 Programming Environment........................................................................................................... 933
25.2.2 Communication Mode .................................................................................................................. 934
25.3 Connection of Pins on Board.................................................................................................. 935
25.3.1 P40/TOOL0 pin ............................................................................................................................ 935
25.3.2 RESET pin.................................................................................................................................... 935
25.3.3 Port pins ....................................................................................................................................... 936
25.3.4 REGC pin ..................................................................................................................................... 936
25.3.5 X1 and X2 pins ............................................................................................................................. 936
25.3.6 Power supply................................................................................................................................ 936
25.4 Data Flash ................................................................................................................................. 937
25.4.1 Data flash overview ...................................................................................................................... 937
25.4.2 Register controlling data flash memory ........................................................................................ 938
25.4.3 Procedure for accessing data flash memory ................................................................................ 939
25.5 Programming Method .............................................................................................................. 940
25.5.1 Controlling flash memory.............................................................................................................. 940
25.5.2 Flash memory programming mode............................................................................................... 941
25.5.3 Selecting communication mode.................................................................................................... 942
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25.5.4 Communication commands .......................................................................................................... 943
25.5.5 Description of signature data........................................................................................................ 944
25.6 Security Settings ...................................................................................................................... 945
25.7 Flash Memory Programming by Self-Programming ............................................................. 947
25.7.1 Boot swap function ....................................................................................................................... 949
25.7.2 Flash shield window function........................................................................................................ 951
CHAPTER 26 ON-CHIP DEBUG FUNCTION ..................................................................................... 952
26.1 Connecting E1 On-chip Debugging Emulator to RL78/G13 ................................................. 952
26.2 On-Chip Debug Security ID ..................................................................................................... 953
26.3 Securing of User Resources ................................................................................................... 953
CHAPTER 27 BCD CORRECTION CIRCUIT ..................................................................................... 955
27.1 BCD Correction Circuit Function............................................................................................ 955
27.2 Registers Used by BCD Correction Circuit ........................................................................... 955
27.3 BCD Correction Circuit Operation .......................................................................................... 956
CHAPTER 28 INSTRUCTION SET........................................................................................................ 958
28.1 Conventions Used in Operation List ...................................................................................... 959
28.1.1 Operand identifiers and specification methods............................................................................. 959
28.1.2 Description of operation column ................................................................................................... 960
28.1.3 Description of flag operation column ............................................................................................ 961
28.1.4 PREFIX instruction ....................................................................................................................... 961
28.2 Operation List ........................................................................................................................... 962
CHAPTER 29 ELECTRICAL SPECIFICATIONS ................................................................................. 979
29.1 Pins Mounted According to Product ...................................................................................... 979
29.1.1 Port functions ............................................................................................................................... 979
29.1.2 Non-port functions ........................................................................................................................ 979
29.2 Absolute Maximum Ratings .................................................................................................... 980
29.3 Oscillator Characteristics........................................................................................................ 982
29.3.1 Main system clock oscillator characteristics ................................................................................. 982
29.3.2 On-chip oscillator characteristics.................................................................................................. 983
29.3.3 Subsystem clock oscillator characteristics.................................................................................... 984
29.3.4 Recommended Oscillator Constants ............................................................................................ 985
29.4 DC Characteristics ................................................................................................................... 988
29.4.1 Pin characteristics ........................................................................................................................ 988
29.4.2 Supply current characteristics ...................................................................................................... 993
29.5 AC Characteristics ................................................................................................................. 1006
29.5.1 Basic operation........................................................................................................................... 1006
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29.6 Peripheral Functions Characteristics................................................................................... 1008
29.6.1 Serial array unit .......................................................................................................................... 1008
29.6.2 Serial interface IICA ................................................................................................................... 1031
29.6.3 On-chip debug (UART)............................................................................................................... 1032
29.7 Analog Characteristics .......................................................................................................... 1032
29.7.1 A/D converter characteristics...................................................................................................... 1032
29.7.2 Temperature sensor characteristics ........................................................................................... 1036
29.7.3 POR circuit characteristics ......................................................................................................... 1036
29.7.4 LVD circuit characteristics .......................................................................................................... 1037
29.8 Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics............. 1040
29.9 Flash Memory Programming Characteristics...................................................................... 1040
29.10 Timing Specs for Switching Modes.................................................................................... 1041
CHAPTER 30 PACKAGE DRAWINGS .............................................................................................. 1042
30.1 20-pin products....................................................................................................................... 1042
30.2 24-pin products....................................................................................................................... 1043
30.3 25-pin products....................................................................................................................... 1044
30.4 30-pin products....................................................................................................................... 1045
30.5 32-pin products....................................................................................................................... 1046
30.6 36-pin products....................................................................................................................... 1047
30.7 40-pin products....................................................................................................................... 1048
30.8 44-pin products....................................................................................................................... 1049
30.9 48-pin products....................................................................................................................... 1050
30.10 52-pin products..................................................................................................................... 1052
30.11 64-pin products..................................................................................................................... 1053
30.12 80-pin products..................................................................................................................... 1057
30.13 100-pin products................................................................................................................... 1059
30.14 128-pin products................................................................................................................... 1061
APPENDIX A REVISION HISTORY ................................................................................................... 1062
A.1 Major Revisions in This Edition ............................................................................................. 1062
A.2 Revision History of Preceding Editions ................................................................................ 1069
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RL78/G13
RENESAS MCU
CHAPTER 1 OUTLINE
R01UH0146EJ0100
Rev.1.00
Sep 22, 2011
1.1 Features
{ Minimum instruction execution time can be changed from high speed (0.03125 μs: @ 32 MHz operation with high-
speed on-chip oscillator) to ultra low-speed (30.5 μs: @ 32.768 kHz operation with subsystem clock)
{ General-purpose register: 8 bits × 32 registers (8 bits × 8 registers × 4 banks)
{ ROM: 16 to 512 KB, RAM: 2 to 32 KB, Data flash memory: /4/8 KB
{ On-chip high-speed on-chip oscillator
Select from 32 MHz (TYP.), 24 MHz (TYP.), 16 MHz (TYP.), 12 MHz (TYP.), 8 MHz (TYP.), 4 MHz (TYP.), and 1
MHz (TYP.)
{ On-chip single-power-supply flash memory (with prohibition of block erase/writing function)
{ Self-programming (with boot swap function/flash shield window function)
{ On-chip debug function
{ On-chip power-on-reset (POR) circuit and voltage detector (LVD)
{ On-chip watchdog timer (operable with the dedicated low-speed on-chip oscillator)
{ On-chip multiplier and divider/multiply-accumulator
16 bits × 16 bits = 32 bits (Unsigned or signed)
32 bits ÷ 32 bits = 32 bits (Unsigned)
16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed)
{ On-chip key interrupt function
{ On-chip clock output/buzzer output controller
{ On-chip BCD adjustment
{ I/O ports: 16 to 120 (N-ch open drain: 0 to 4)
{ Timer
16-bit timer:
8 to 16 channels
Watchdog timer: 1 channel
Real-time clock: 1 channel (Correction clock output)
Interval timer:
1 channel
{ Serial interface
CSI
UART/UART (LIN-bus supported)
I2C/Simplified I2C communication
{ Different potential interface: Can connect to a 2.5/3 V device when operating at 4.0 V to 5.5 V
{ 8/10-bit resolution A/D converter (VDD = EVDD =1.6 to 5.5 V): 6 to 26 channels
{ Standby function: HALT, STOP, SNOOZE mode
{ Power supply voltage: VDD = 1.6 to 5.5 V
{ Operating ambient temperature: TA = 40 to +85°C
Remark The functions mounted depend on the product. See 1.6 Outline of Functions.
R01UH0146EJ0100 Rev.1.00
Sep 22, 2011
1


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RL78/G13
CHAPTER 1 OUTLINE
{ ROM, RAM capacities
Flash Data RAM
ROM flash
20 pins
128 8 KB 12
KB KB
96 8 KB 8 KB
KB
64 4 KB 4 KB
KB Note 1
R5F1006E
R5F1016E
48 4 KB 3 KB R5F1006D
KB
R5F1016D
32 4 KB 2 KB R5F1006C
KB
R5F1016C
16 4 KB 2 KB R5F1006A
KB
R5F1016A
24 pins
R5F1007E
R5F1017E
R5F1007D
R5F1017D
R5F1007C
R5F1017C
R5F1007A
R5F1017A
RL78/G13
25 pins
30 pins
R5F100AG
R5F101AG
R5F100AF
R5F101AF
R5F1008E
R5F100AE
R5F1018E
R5F101AE
R5F1008D
R5F100AD
R5F1018D
R5F101AD
R5F1008C
R5F100AC
R5F1018C
R5F101AC
R5F1008A
R5F100AA
R5F1018A
R5F101AA
32 pins
R5F100BG
R5F101BG
R5F100BF
R5F101BF
R5F100BE
R5F101BE
R5F100BD
R5F101BD
R5F100BC
R5F101BC
R5F100BA
R5F101BA
36 pins
R5F100CG
R5F101CG
R5F100CF
R5F101CF
R5F100CE
R5F101CE
R5F100CD
R5F101CD
R5F100CC
R5F101CC
R5F100CA
R5F101CA
Flash Data RAM
RL78/G13
ROM flash
40 pins
44 pins
48 pins
52 pins
64 pins
80 pins 100 pins 128 pins
512 8 KB 32 KB R5F100FL R5F100GL R5F100JL R5F100LL R5F100ML R5F100PL R5F100SL
KB Note 3
R5F101FL R5F101GL R5F101JL R5F101LL R5F101ML R5F101PL R5F101SL
384 8 KB 24 KB R5F100FK R5F100GK R5F100JK R5F100LK R5F100MK R5F100PK R5F100SK
KB
R5F101FK R5F101GK R5F101JK R5F101LK R5F101MK R5F101PK R5F101SK
256 8 KB 20 KB R5F100FJ R5F100GJ R5F100JJ R5F100LJ R5F100MJ R5F100PJ R5F100SJ
KB Note 2
R5F101FJ R5F101GJ R5F101JJ R5F101LJ R5F101MJ R5F101PJ R5F101SJ
192 8 KB 16 KB R5F100EH R5F100FH R5F100GH R5F100JH R5F100LH R5F100MH R5F100PH R5F100SH
KB
R5F101EH R5F101FH R5F101GH R5F101JH R5F101LH R5F101MH R5F101PH R5F101SH
128 8 KB 12 KB R5F100EG R5F100FG R5F100GG R5F100JG R5F100LG R5F100MG R5F100PG
KB
R5F101EG R5F101FG R5F101GG R5F101JG R5F101LG R5F101MG R5F101PG
96 8 KB 8 KB R5F100EF R5F100FF R5F100GF R5F100JF R5F100LF R5F100MF R5F100PF
KB
R5F101EF R5F101FF R5F101GF R5F101JF R5F101LF R5F101MF R5F101PF
64 4 KB 4 KB R5F100EE R5F100FE R5F100GE R5F100JE R5F100LE
KB Note 1 R5F101EE R5F101FE R5F101GE R5F101JE R5F101LE
48 4 KB 3 KB R5F100ED R5F100FD R5F100GD R5F100JD R5F100LD
KB
R5F101ED R5F101FD R5F101GD R5F101JD R5F101LD
32 4 KB 2 KB R5F100EC R5F100FC R5F100GC R5F100JC R5F100LC
KB
R5F101EC R5F101FC R5F101GC R5F101JC R5F101LC
16 4 KB 2 KB R5F100EA R5F100FA R5F100GA
KB
R5F101EA R5F101FA R5F101GA
<R> Notes 1. This is about 3 KB when the self-programming function and data flash function are used. (For details, see CHAPTER 3)
<R> 2. This is about 19 KB when the self-programming function and data flash function are used. (For details, see CHAPTER 3)
<R> 3. This is about 31 KB when the self-programming function and data flash function are used. (For details, see CHAPTER 3)
R01UH0146EJ0100 Rev.1.00
Sep 22, 2011
2


R5F101GHAFB (Renesas)
16-Bit Single-Chip Microcontrollers

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RL78/G13
CHAPTER 1 OUTLINE
1.2 Ordering Information
Flash memory version (lead-free product)
Pin count
20 pins
24 pins
25 pins
Package
20-pin plastic SSOP (7.62 mm
(300))
24-pin plastic WQFN
(fine pitch) (4 × 4)
25-pin plastic FLGA (3 × 3)
30 pins
30-pin plastic SSOP
(7.62 mm (300))
Data flash
Mounted
Not mounted
Mounted
Not mounted
Mounted
Not mounted
Mounted
Not mounted
32 pins
32-pin plastic WQFN
(fine pitch)(5 × 5)
Mounted
Not mounted
36 pins
36-pin plastic FLGA (4 × 4)
Mounted
Not mounted
40 pins
40-pin plastic WQFN
(fine pitch)(6 × 6)
Mounted
Not mounted
44 pins
44-pin plastic LQFP (10 × 10)
Mounted
Not mounted
Part Number
(1/3)
R5F1006AASP, R5F1006CASP, R5F1006DASP, R5F1006EASP
R5F1016AASP, R5F1016CASP, R5F1016DASP, R5F1016EASP
R5F1007AANA, R5F1007CANA, R5F1007DANA, R5F1007EANA
R5F1017AANA, R5F1017CANA, R5F1017DANA, R5F1017EANA
R5F1008AALA, R5F1008CALA, R5F1008DALA, R5F1008EALA
R5F1018AALA, R5F1018CALA, R5F1018DALA, R5F1018EALA
R5F100AAASP, R5F100ACASP, R5F100ADASP,
R5F100AEASP, R5F100AFASP, R5F100AGASP
R5F101AAASP, R5F101ACASP, R5F101ADASP,
R5F101AEASP, R5F101AFASP, R5F101AGASP
R5F100BAANA, R5F100BCANA, R5F100BDANA,
R5F100BEANA, R5F100BFANA, R5F100BGANA
R5F101BAANA, R5F101BCANA, R5F101BDANA,
R5F101BEANA, R5F101BFANA, R5F101BGANA
R5F100CAALA, R5F100CCALA, R5F100CDALA,
R5F100CEALA, R5F100CFALA, R5F100CGALA
R5F101CAALA, R5F101CCALA, R5F101CDALA,
R5F101CEALA, R5F101CFALA, R5F101CGALA
R5F100EAANA, R5F100ECANA, R5F100EDANA,
R5F100EEANA, R5F100EFANA, R5F100EGANA, R5F100EHANA
R5F101EAANA, R5F101ECANA, R5F101EDANA,
R5F101EEANA, R5F101EFANA, R5F101EGANA, R5F101EHANA
R5F100FAAFP, R5F100FCAFP, R5F100FDAFP, R5F100FEAFP,
R5F100FFAFP, R5F100FGAFP, R5F100FHAFP, R5F100FJAFP,
R5F100FKAFP, R5F100FLAFP
R5F101FAAFP, R5F101FCAFP, R5F101FDAFP, R5F101FEAFP,
R5F101FFAFP, R5F101FGAFP, R5F101FHAFP, R5F101FJAFP,
R5F101FKAFP, R5F101FLAFP
R01UH0146EJ0100 Rev.1.00
Sep 22, 2011
3


R5F101GHAFB (Renesas)
16-Bit Single-Chip Microcontrollers

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RL78/G13
CHAPTER 1 OUTLINE
Pin count
48 pins
Package
48-pin plastic LQFP
(fine pitch) (7 × 7)
48-pin plastic WQFN (7 × 7)
52 pins
52-pin plastic LQFP (10 × 10)
64 pins
64-pin plastic LQFP (12 × 12)
64-pin plastic LQFP (fine pitch)
(10 × 10)
64-pin plastic TQFP
(fine pitch) (7 × 7)
64-pin plastic FBGA (4 × 4)
Data flash
Mounted
Not mounted
Mounted
Not mounted
Mounted
Not mounted
Mounted
Not mounted
Mounted
Not mounted
Mounted
Not mounted
Mounted
Not mounted
Part Number
(2/3)
R5F100GAAFB, R5F100GCAFB, R5F100GDAFB,
R5F100GEAFB, R5F100GFAFB, R5F100GGAFB,
R5F100GHAFB, R5F100GJAFB, R5F100GKAFB, R5F100GLAFB
R5F101GAAFB, R5F101GCAFB, R5F101GDAFB,
R5F101GEAFB, R5F101GFAFB, R5F101GGAFB,
R5F101GHAFB, R5F101GJAFB, R5F101GKAFB, R5F101GLAFB
R5F100GAANA, R5F100GCANA, R5F100GDANA,
R5F100GEANA, R5F100GFANA, R5F100GGANA,
R5F100GHANA, R5F100GJANA, R5F100GKANA, R5F100GLANA
R5F101GAANA, R5F101GCANA, R5F101GDANA,
R5F101GEANA, R5F101GFANA, R5F101GGANA,
R5F101GHANA, R5F101GJANA, R5F101GKANA, R5F101GLANA
R5F100JCAFA, R5F100JDAFA, R5F100JEAFA, R5F100JFAFA,
R5F100JGAFA, R5F100JHAFA, R5F100JJAFA, R5F100JKAFA,
R5F100JLAFA
R5F101JCAFA, R5F101JDAFA, R5F101JEAFA, R5F101JFAFA,
R5F101JGAFA, R5F101JHAFA, R5F101JJAFA, R5F101JKAFA,
R5F101JLAFA
R5F100LCAFA, R5F100LDAFA, R5F100LEAFA, R5F100LFAFA,
R5F100LGAFA, R5F100LHAFA, R5F100LJAFA, R5F100LKAFA,
R5F100LLAFA
R5F101LCAFA, R5F101LDAFA, R5F101LEAFA, R5F101LFAFA,
R5F101LGAFA, R5F101LHAFA, R5F101LJAFA, R5F101LKAFA,
R5F101LLAFA
R5F100LCAFB, R5F100LDAFB, R5F100LEAFB, R5F100LFAFB,
R5F100LGAFB, R5F100LHAFB, R5F100LJAFB, R5F100LKAFB,
R5F100LLAFB
R5F101LCAFB, R5F101LDAFB, R5F101LEAFB, R5F101LFAFB,
R5F101LGAFB, R5F101LHAFB, R5F101LJAFB, R5F101LKAFB,
R5F101LLAFB
R5F100LCAFC, R5F100LDAFC, R5F100LEAFC, R5F100LFAFC,
R5F100LGAFC, R5F100LHAFC, R5F100LJAFC
R5F101LCAFC, R5F101LDAFC, R5F101LEAFC, R5F101LFAFC,
R5F101LGAFC, R5F101LHAFC, R5F101LJAFC
R5F100LCABG, R5F100LDABG, R5F100LEABG, R5F100LFABG,
R5F100LGABG, R5F100LHABG, R5F100LJABG
R5F101LCABG, R5F101LDABG, R5F101LEABG, R5F101LFABG,
R5F101LGABG, R5F101LHABG, R5F101LJABG
R01UH0146EJ0100 Rev.1.00
Sep 22, 2011
4


R5F101GHAFB (Renesas)
16-Bit Single-Chip Microcontrollers

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RL78/G13
CHAPTER 1 OUTLINE
Pin count
80 pins
Package
80-pin plastic LQFP (14 × 14)
80-pin plastic LQFP (fine pitch)
(12 × 12)
100 pins
100-pin plastic LQFP (fine pitch)
(14 × 14)
100-pin plastic LQFP (14 × 20)
128 pins
128-pin plastic LQFP (fine pitch)
(14 × 20)
Data flash
Mounted
Not mounted
Mounted
Not mounted
Mounted
Not mounted
Mounted
Not mounted
Mounted
Not mounted
Part Number
(3/3)
R5F100MFAFA, R5F100MGAFA, R5F100MHAFA,
R5F100MJAFA, R5F100MKAFA, R5F100MLAFA
R5F101MFAFA, R5F101MGAFA, R5F101MHAFA,
R5F101MJAFA, R5F101MKAFA, R5F101MLAFA
R5F100MFAFB, R5F100MGAFB, R5F100MHAFB,
R5F100MJAFB, R5F100MKAFB, R5F100MLAFB
R5F101MFAFB, R5F101MGAFB, R5F101MHAFB,
R5F101MJAFB, R5F101MKAFB, R5F101MLAFB
R5F100PFAFB, R5F100PGAFB, R5F100PHAFB, R5F100PJAFB,
R5F100PKAFB, R5F100PLAFB
R5F101PFAFB, R5F101PGAFB, R5F101PHAFB, R5F101PJAFB,
R5F101PKAFB, R5F101PLAFB
R5F100PFAFA, R5F100PGAFA, R5F100PHAFA, R5F100PJAFA,
R5F100PKAFA, R5F100PLAFA
R5F101PFAFA, R5F101PGAFA, R5F101PHAFA, R5F101PJAFA,
R5F101PKAFA, R5F101PLAFA
R5F100SHAFB, R5F100SJAFB, R5F100SKAFB, R5F100SLAFB
R5F101SHAFB, R5F101SJAFB, R5F101SKAFB, R5F101SLAFB
R01UH0146EJ0100 Rev.1.00
Sep 22, 2011
5


R5F101GHAFB (Renesas)
16-Bit Single-Chip Microcontrollers

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RL78/G13
1.3 Pin Configuration (Top View)
1.3.1 20-pin products
20-pin plastic SSOP (7.62 mm (300))
P01/ANI16/TO00/RxD1
P00/ANI17/TI00/TxD1
P40/TOOL0
RESET
P137/INTP0
P122/X2/EXCLK
P121/X1
REGC
VSS
VDD
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Caution Connect the REGC pin to Vss via a capacitor (0.47 to 1 μF).
Remark For pin identification, see 1.4 Pin Identification.
CHAPTER 1 OUTLINE
P20/ANI0/AVREFP
P21/ANI1/AVREFM
P22/ANI2
P147/ANI18
P10/SCK00/SCL00
P11/SI00/RxD0/TOOLRxD/SDA00
P12/SO00/TxD0/TOOLTxD
P16/TI01/TO01/INTP5/SO11
P17/TI02/TO02/SI11/SDA11
P30/INTP3/SCK11/SCL11
R01UH0146EJ0100 Rev.1.00
Sep 22, 2011
6


R5F101GHAFB (Renesas)
16-Bit Single-Chip Microcontrollers

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RL78/G13
1.3.2 24-pin products
24-pin plastic WQFN (fine pitch) (4 × 4)
CHAPTER 1 OUTLINE
P21/ANI1/AVREFM
P20/ANI0/AVREFP
P01/ANI16/TO00/RxD1
P00/ANI17/TI00/TxD1
P40/TOOL0
RESET
exposed die pad
18 17 16 15 14 13
19 12
20 11
21 10
22 9
23 8
24 7
1234 5 6
P17/TI02/TO02/SO11
P50/INTP1/SI11/SDA11
P30/INTP3/SCK11/SCL11
P31/TI03/TO03/INTP4/PCLBUZ0
P61/SDAA0
P60/SCLA0
Caution Connect the REGC pin to Vss via a capacitor (0.47 to 1 μF).
Remark For pin identification, see 1.4 Pin Identification.
R01UH0146EJ0100 Rev.1.00
Sep 22, 2011
7


R5F101GHAFB (Renesas)
16-Bit Single-Chip Microcontrollers

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RL78/G13
1.3.3 25-pin products
25-pin plastic FLGA (3 × 3)
Top View
5
4
3
2
1
ABCDE
INDEX MARK
CHAPTER 1 OUTLINE
Bottom View
EDCBA
INDEX MARK
A
P40/TOOL0
5
P122/X2/
4 EXCLK
P121/X1
3
REGC
2
P60/SCLA0
1
A
B
RESET
P137/INTP0
VDD
VSS
P61/SDAA0
B
C
P01/ANI16/
TO00/RxD1
D
P22/ANI2
P00/ANI17/
TI00/TxD1
P21/ANI1/
AVREFM
P20/ANI0/
AVREFP
P30/INTP3/
SCK11/SCL11
P12/SO00/
TxD0/
TOOLTxD
P17/TI02/
TO02/SO11
P31/TI03/
TO03/INTP4/
PCLBUZ0
C
P16/TI01/
TO01/INTP5
D
E
P147/ANI18
P10/SCK00/
SCL00
P11/SI00/
RxD0/
TOOLRxD/
SDA00
P50/INTP1/
SI11/SDA11
P130
E
5
4
3
2
1
Caution Connect the REGC pin to Vss via a capacitor (0.47 to 1 μF).
Remark For pin identification, see 1.4 Pin Identification.
R01UH0146EJ0100 Rev.1.00
Sep 22, 2011
8


R5F101GHAFB (Renesas)
16-Bit Single-Chip Microcontrollers

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RL78/G13
1.3.4 30-pin products
<R> 30-pin plastic SSOP (7.62 mm (300))
CHAPTER 1 OUTLINE
P20/ANI0/AVREFP
P01/ANI16/TO00/RxD1
P00/ANI17/TI00/TxD1
P120/ANI19
P40/TOOL0
RESET
P137/INTP0
P122/X2/EXCLK
P121/X1
REGC
VSS
VDD
P60/SCLA0
P61/SDAA0
P31/TI03/TO03/INTP4/PCLBUZ0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30 P21/ANI1/AVREFM
29 P22/ANI2
28 P23/ANI3
27 P147/ANI18
26 P10/SCK00/SCL00/(TI07)/(TO07)
25 P11/SI00/RxD0/TOOLRxD/SDA00/(TI06)/(TO06)
24 P12/SO00/TxD0/TOOLTxD/(TI05)/(TO05)
23 P13/TxD2/SO20/(SDAA0)/(TI04)/(TO04)
22 P14/RxD2/SI20/SDA20/(SCLA0)/(TI03)/(TO03)
21 P15/PCLBUZ1/SCK20/SCL20/(TI02)/(TO02)
20 P16/TI01/TO01/INTP5/(RXD0)
19 P17/TI02/TO02/(TXD0)
18 P51/INTP2/SO11
17 P50/INTP1/SI11/SDA11
16 P30/INTP3/SCK11/SCL11
Caution Connect the REGC pin to Vss via a capacitor (0.47 to 1 μF).
Remarks 1. For pin identification, see 1.4 Pin Identification.
2. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection
register (PIOR).
R01UH0146EJ0100 Rev.1.00
Sep 22, 2011
9


R5F101GHAFB (Renesas)
16-Bit Single-Chip Microcontrollers

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RL78/G13
1.3.5 32-pin products
<R> 32-pin plastic WQFN (fine pitch) (5 × 5)
CHAPTER 1 OUTLINE
P147/ANI18
P23/ANI3
P22/ANI2
P21/ANI1/AVREFM
P20/ANI0/AVREFP
P01/ANI16/TO00/RxD1
P00/ANI17/TI00/TxD1
P120/ANI19
24 23 22 21 20 19 18 17
25 16
26 15
27 14
28 13
29 12
30 11
31 10
32 9
123456 78
exposed die pad
P51/INTP2/SO11
P50/INTP1/SI11/SDA11
P30/INTP3/SCK11/SCL11
P70
P31/TI03/TO03/INTP4/PCLBUZ0
P62
P61/SDAA0
P60/SCLA0
Caution Connect the REGC pin to Vss via a capacitor (0.47 to 1 μF).
Remarks 1. For pin identification, see 1.4 Pin Identification.
2. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection
register (PIOR).
R01UH0146EJ0100 Rev.1.00
Sep 22, 2011
10


R5F101GHAFB (Renesas)
16-Bit Single-Chip Microcontrollers

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RL78/G13
1.3.6 36-pin products
<R> 36-pin plastic FLGA (4 × 4)
Top View
ABCDEF
6
5
4
3
2
1
INDEX MARK
CHAPTER 1 OUTLINE
Bottom View
FEDCBA
A
P60/SCLA0
6
B
VDD
C
P121/X1
DE
P122/X2/EXCLK P137/INTP0
F
P40/TOOL0
6
P62
5
P61/SDAA0
VSS
REGC
RESET
P120/ANI19
5
P72/SO21
4
P50/INTP1/
3 SI11/SDA11
P30/INTP3/
2 SCK11/SCL11
P51/INTP2/
1 SO11
A
P71/SI21/
SDA21
P70/SCK21/
SCL21
P16/TI01/TO01/
INTP5/(RxD0)
P17/TI02/TO02/
(TxD0)
B
P14/RxD2/SI20/
SDA20/(SCLA0)
/(TI03)/(TO03)
P15/PCLBUZ1/
SCK20/SCL20/
(TI02)/(TO02)
P12/SO00/
TxD0/TOOLTxD
/(TI05)/(TO05)
P13/TxD2/
SO20/(SDAA0)/
(TI04)/(TO04)
C
P31/TI03/TO03/
INTP4/
PCLBUZ0
P22/ANI2
P11/SI00/RxD0/
TOOLRxD/
SDA00/(TI06)/
(TO06)
P10/SCK00/
SCL00/(TI07)/
(TO07)
D
P00/TI00/TxD1
P20/ANI0/
AVREFP
P24/ANI4
P147/ANI18
E
P01/TO00/RxD1
4
P21/ANI1/
AVREFM
3
P23/ANI3
2
P25/ANI5
F
1
Caution Connect the REGC pin to Vss via a capacitor (0.47 to 1 μF).
Remarks 1. For pin identification, see 1.4 Pin Identification.
2. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection
register (PIOR).
R01UH0146EJ0100 Rev.1.00
Sep 22, 2011
11




R5F101GHAFB.pdf
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