HSMP-386F (AVAGO)
Surface Mount PIN Diodes

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HSMP-386x
Surface Mount PIN Diodes
Data Sheet
Description/Applications
The HSMP-386x series of general purpose PIN diodes are
designed for two classes of applications. The first is attenu-
ators where current consumption is the most important
design consideration. The second application for this
series of diodes is in switches where low capacitance is the
driving issue for the designer.
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HSMP-383x series is recommended.
A SPICE model is not available for PIN diodes as SPICE
does not provide for a key PIN diode characteristic, carrier
lifetime.
Pin Connections and Package Marking, SOT-363
16
25
Features
Unique Configurations in Surface Mount Packages
– Add Flexibility
– Save Board Space
– Reduce Cost
Switching
– Low Distortion Switching
– Low Capacitance
Attenuating
– Low Current Attenuating for Less Power
Consumption
Matched Diodes for Consistent Performance
Better Thermal Conductivity for Higher Power
Dissipation
Low Failure in Time (FIT) Rate[1]
Lead-free
Note:
1. For more information see the Surface Mount PIN Reliability Data
Sheet.
34
Notes:
1. Package marking provides orientation, identification, and date code.
2. See “Electrical Specifications” for appropriate package marking.


HSMP-386F (AVAGO)
Surface Mount PIN Diodes

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Package Lead Code Identification,
SOT-23, SOT-143
(Top View)
SINGLE
SERIES
#0
COMMON
ANODE
#2
COMMON
CATHODE
Package Lead Code Identification,
SOT-323
(Top View)
SINGLE
SERIES
B
COMMON
ANODE
C
COMMON
CATHODE
Package Lead Code Identification,
SOT-363
(Top View)
UNCONNECTED
TRIO
654
123
L
#3
RING
QUAD
34
#4
EF
12
D
See separate data sheet HSMP-386D
Absolute Maximum Ratings[1] TC = +25°C
Symbol Parameter
If Forward Current (1 µs Pulse)
PIV Peak Inverse Voltage
Tj Junction Temperature
Tstg Storage Temperature
qjc Thermal Resistance[2]
Unit
Amp
V
°C
°C
°C/W
SOT-23
1
50
150
-65 to 150
500
SOT-323
1
50
150
-65 to 150
150
ESD WARNING:
Handling Precautions Should Be Taken To Avoid
Static Discharge.
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to the device.
2. TthCe=c+ir2c5u°iCt ,bwoahredr.e TC is defined to be the temperature at the package pins where contact is made to
Electrical Specifications TC = 25°C, each diode
PIN General Purpose Diodes, Typical Specifications TA = 25°C
Package
Part Number
Marking
Lead
HSMP-
Code Code Configuration
3860
3862
3863
3864
386B
386C
386E
386F
386L
L0
L2
L3
L4
L0
L2
L3
L4
LL
0 Single
2 Series
3 Common Anode
4 Common Cathode
B Single
C Series
E Common Anode
F Common Cathode
L Unconnected Trio
   Test Conditions
Minimum Typical
Breakdown
Series Resistance
Voltage VBR (V)
RS (Ω)
50
3.0 /1.5*
Typical
Total Capacitance
CT (pF)
0.20
MVeR a=sVuBrRe
IR ≤ 10 µA
f
I=F =10100
mA
MHz
IF = 100 mA*
fV=R
=
1
50 V
MHz
2


HSMP-386F (AVAGO)
Surface Mount PIN Diodes

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HSMP-386x Typical Parameters at TC = 25°C
Part Number
HSMP-
Total Resistance
RT (Ω)
386x
22
Carrier Lifetime
t (ns)
500
    Te st Conditio ns f =IF 1=010mMAH z TIRF == 25500mmAA
Reverse Recovery Time
Trr (ns)
80
90I%FV=R R=2e01c0omvVAe r y
Total Capacitance
CT (pF)
0.20
fV=R
=
1
50 V
MHz
Typical Performance, TC = 25°C, each diode
0.35 1000
0.30
0.25
1 MHz
100 MHz
0.20 1 GHz
100
10
TA = +85 C
TA = +25 C
TA = –55 C
0.15
0 2 4 6 8 10 12 14 16 18 20
REVERSE VOLTAGE (V)
Figure 1. RF Capacitance vs. Reverse Bias.
1
0.01
0.1
1
10 100
BIAS CURRENT (mA)
Figure 2. Typical RF Resistance vs. Forward Bias
Current.
120 Diode Mounted as a
115
Series Switch in a
50 Microstrip and
110 Tested at 123 MHz
105
100
95
90
85
1 10 30
IF – FORWARD BIAS CURRENT (mA)
Figure 3. 2nd Harmonic Input Intercept Point
vs. Forward Bias Current for Switch Diodes.
1000
100
VR = 5 V
100 VR = 10 V
VR = 20 V
10
10 20 30
FORWARD CURRENT (mA)
Figure 4. Reverse Recovery Time vs. Forward
Current for Various Reverse Voltages.
10
1
0.1
0.01
0
125 C 25 C –50 C
0.2 0.4 0.6 0.8 1.0 1.2
VF – FORWARD VOLTAGE (mA)
Figure 5. Forward Current vs. Forward
Voltage.
Equivalent Circuit Model
HSMP-386x Chip*
Rs Rj
1.5
Cj
0.12 pF
3
RT = 1.5 + Rj
CT = CP + Cj
Rj =
12
I0.9
I = Forward Bias Current in mA
* See AN1124 for package models


HSMP-386F (AVAGO)
Surface Mount PIN Diodes

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Typical Applications for Multiple Diode Products
RF COMMON
RF COMMON
RF 1
BIAS 1
RF 2
BIAS 2
Figure 6. Simple SPDT Switch, Using Only Positive Current.
RF COMMON
BIAS
RF 1
BIAS
Figure 7. High Isolation SPDT Switch, Dual Bias.
RF COMMON
RF 2
BIAS
RF 1
RF 2
RF 1
BIAS
Figure 8. Switch Using Both Positive and Negative Current.
VARIABLE BIAS
INPUT
Figure 9. Very High Isolation SPDT Switch, Dual Bias.
RF IN/OUT
FIXED
BIAS
VOLTAGE
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4
RF 2


HSMP-386F (AVAGO)
Surface Mount PIN Diodes

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Typical Applications for Multiple Diode Products (continued)
BIAS
1
“ON”
“OFF”
1
+V
0
1
654
2
0
+V
RF in
1 23
2
RF out
FigureF1i1g.uHrigeh1I1so.laHtiiognhSIPsSoTlSawtiiotcnh SPST Switch
(Repea(tRCeelplseaastRCeqeulilrseda)s. Required).
321
1
2
3
0 456
b1 b2 b3
Figure 13. HSMP-386L used in a SP3T Switch.
Figure 12. HSMP-386L Unconnected Trio used in a Positive Voltage,
High Isolation Switch.
2 12
“ON” 0 +V
“OFF” 0 –V
1 321
1
RF in
4 56
Figure 14. HSMP-386L Unconnected Trio used in a Dual Voltage,
High Isolation Switch.
RF out
5


HSMP-386F (AVAGO)
Surface Mount PIN Diodes

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Ordering Information
Specify part number followed by option. For example:
HSMP - 386x - XXX
Bulk or Tape and Reel Option
Part Number; x = Lead Code
Surface Mount PIN
Option Descriptions
-BLKG = Bulk, 100 pcs. per antistatic bag
-TR1G = Tape and Reel, 3000 devices per 7" reel
-TR2G = Tape and Reel, 10,000 devices per 13" reel
Tape and Reeling conforms to Electronic Industries RS-481,
“Taping of Surface Mounted Components for Automated Placement.”
Assembly Information
SOT-323 PCB Footprint
Recommended PCB pad layouts for the miniature SOT
packages are shown in Figures 15, 16, 17. These layouts
provide ample allowance for package placement by
automated assembly equipment without adding parasitics
that could impair the performance.
0.026
0.039
0.079
0.026
0.018
Dimensions in inches
0.039
0.079
0.022
Dimensions in inches
Figure 15. Recommended PCB Pad Layout for Avago’s SC70 3L/SOT‑323
Products.
Figure16. RecommendedPCBPadLayoutforAvago’sSC706L/SOT-363Products.
0.039
1
0.039
1
0.079
2.0
0.035
0.9
0.031
0.8
Dimensions in
inches
mm
Figure 17. Recommended PCB Pad Layout for Avago’s ­SOT-23 Products.
6


HSMP-386F (AVAGO)
Surface Mount PIN Diodes

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SMT Assembly
Reliable assembly of surface mount components is a
complex process that involves many material, process, and
equipment factors, including: method of heating (e.g., IR
or vapor phase reflow, wave soldering, etc.) circuit board
material, conductor thickness and pattern, type of solder
alloy, and the thermal conductivity and thermal mass of
components. Components with a low mass, such as the SOT
package, will reach solder reflow temperatures faster than
those with a greater mass.
Avago’s diodes have been qualified to the time-temper-
ature profile shown in Figure 18. This profile is represen-
tative of an IR reflow type of surface mount assembly
process.
After ramping up from room temperature, the circuit board
with components attached to it (held in place with solder
paste) passes through one or more preheat zones. The
preheat zones increase the temperature of the board and
components to prevent thermal shock and begin evapo-
rating solvents from the solder paste. The reflow zone
briefly elevates the temperature sufficiently to produce a
reflow of the solder.
The rates of change of temperature for the ramp-up and
cool-down zones are chosen to be low enough to not cause
deformation of the board or damage to components due
to thermal shock. The maximum temperature in the reflow
zone (TMAX) should not exceed 260°C.
These parameters are typical for a surface mount assembly
process for Avago diodes. As a general guideline, the circuit
board and components should be exposed only to the
minimum temperatures and times necessary to achieve a
uniform reflow of solder.
Tp
T L Ts max
Ramp-up
tp
tL
Critical Zone
T L to Tp
Ts min
ts
Preheat
Ramp-down
25
t 25° C to Peak
Time
Figure 18. Surface Mount Assembly Profile.
Lead-Free Reflow Profile Recommendation (IPC/JEDEC J-STD-020C)
Reflow Parameter
Average ramp-up rate (Liquidus Temperature (TS(max) to Peak)
Preheat
Temperature Min (TS(min))
Temperature Max (TS(max))
Time (min to max) (tS)
Ts(max) to TL Ramp-up Rate
Time maintained above:
Temperature (TL)
Time (tL)
Peak Temperature (TP)
Time within 5 °C of actual Peak temperature (tP)
Ramp-down Rate
Time 25 °C to Peak Temperature
Lead-Free Assembly
3°C/ second max
150°C
200°C
60-180 seconds
3°C/second max
217°C
60-150 seconds
260 +0/-5°C
20-40 seconds
6°C/second max
8 minutes max
Note 1: All temperatures refer to topside of the package, measured on the package body surface
7


HSMP-386F (AVAGO)
Surface Mount PIN Diodes

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Package Dimensions
Outline 23 (SOT-23)
e2
e1
E XXX
E1
e
B
D
A
A1
Notes:
XXX-package marking
Drawings are not to scale
Outline 363 (SC-70, 6 Lead)
L
SYMBOL
A
A1
B
C
D
E1
e
e1
e2
E
L
C
DIMENSIONS (mm)
MIN.
0.79
0.000
0.30
0.08
2.73
1.15
0.89
1.78
0.45
2.10
0.45
MAX.
1.20
0.100
0.54
0.20
3.13
1.50
1.02
2.04
0.60
2.70
0.69
Outline SOT-323 (SC-70, 3 Lead)
e1
E XXX
e
B
D
A1
Notes:
XXX-package marking
Drawings are not to scale
E1
L
C
DIMENSIONS (mm)
SYMBOL MIN.
MAX.
A 0.80 1.00
A A1 0.00 0.10
B 0.15 0.40
C 0.08 0.25
D 1.80 2.25
E1 1.10 1.40
e 0.65 typical
e1 1.30 typical
E 1.80 2.40
L 0.26 0.46
HE E
L
e
D
A1
b
A2 A
c
SYMBOL
E
D
HE
A
A2
A1
e
b
c
L
DIMENSIONS (mm)
MIN. MAX.
1.15 1.35
1.80 2.25
1.80 2.40
0.80 1.10
0.80 1.00
0.00 0.10
0.650 BCS
0.15 0.30
0.08 0.25
0.10 0.46
Package Characteristics
Lead Material............................................ Copper (SOT-323/363); Alloy 42 (SOT-23)
Lead Finish.......................................................................... Tin 100% (Lead-free option)
Maximum Soldering Temperature............................................. 260°C for 5 seconds
Minimum Lead Strength............................................................................ 2 pounds pull
Typical Package Inductance....................................................................................... 2 nH
Typical Package Capacitance...............................................0.08 pF (opposite leads)
8


HSMP-386F (AVAGO)
Surface Mount PIN Diodes

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Device Orientation
REEL
USER
FEED
DIRECTION
COVER TAPE
For Outlines SOT-23, -323
TOP VIEW
4 mm
CARRIER
TAPE
END VIEW
For Outline SOT-363
TOP VIEW
4 mm
END VIEW
8 mm
ABC ABC ABC ABC
8 mm
ABC ABC ABC ABC
Note: "AB" represents package marking code.
"C" represents date code.
Tape Dimensions and Product Orientation
For Outline SOT-23
P D P2
P0
Note: "AB" represents package marking code.
"C" represents date code.
E
F
W
t1 D1
9 MAX
Ko 8 MAX
13.5 MAX
A0 B0
CAVITY
PERFORATION
CARRIER TAPE
DISTANCE
BETWEEN
CENTERLINE
DESCRIPTION
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
DIAMETER
PITCH
POSITION
WIDTH
THICKNESS
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
SYMBOL
A0
B0
K0
P
D1
D
P0
E
SIZE (mm)
3.15 ± 0.10
2.77 ± 0.10
1.22 ± 0.10
4.00 ± 0.10
1.00 + 0.05
1.50 + 0.10
4.00 ± 0.10
1.75 ± 0.10
SIZE (INCHES)
0.124 ± 0.004
0.109 ± 0.004
0.048 ± 0.004
0.157 ± 0.004
0.039 ± 0.002
0.059 + 0.004
0.157 ± 0.004
0.069 ± 0.004
W 8.00 + 0.30 - 0.10 0.315 + 0.012 - 0.004
t1 0.229 ± 0.013 0.009 ± 0.0005
F 3.50 ± 0.05 0.138 ± 0.002
P2 2.00 ± 0.05
0.079 ± 0.002
9


HSMP-386F (AVAGO)
Surface Mount PIN Diodes

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Tape Dimensions and Product Orientation
For Outlines SOT-323, -363
P
P0
D
C
P2
E
F
W
t1 (CARRIER TAPE THICKNESS)
An K0
A0
CAVITY
PERFORATION
CARRIER TAPE
COVER TAPE
DISTANCE
ANGLE
DESCRIPTION
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
DIAMETER
PITCH
POSITION
WIDTH
THICKNESS
WIDTH
TAPE THICKNESS
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
FOR SOT 2 (SC 0 LEAD)
FOR SOT (SC 0 LEAD)
SYMBOL
A0
B0
K0
P
D1
D
P0
E
W
t1
C
Tt
F
SIZE (mm)
2.40 ± 0.10
2.40 ± 0.10
1.20 ± 0.10
4.00 ± 0.10
1.00 + 0.25
1.55 ± 0.05
4.00 ± 0.10
1. 5 ± 0.10
.00 ± 0. 0
0.254 ± 0.02
5.4 ± 0.10
0.0 2 ± 0.001
.50 ± 0.05
SIZE (INCHES)
0.0 4 ± 0.004
0.0 4 ± 0.004
0.04 ± 0.004
0.15 ± 0.004
0.0 + 0.010
0.0 1 ± 0.002
0.15 ± 0.004
0.0 ± 0.004
0. 15 ± 0.012
0.0100 ± 0.000
0.205 ± 0.004
0.0025 ± 0.00004
0.1 ± 0.002
P2
2.00 ± 0.05
0.0 ± 0.002
An °C MA
10°C MA
D1
Tt (COVER TAPE THICKNESS)
An
B0
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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved. Obsoletes 5989-4028EN
AV02-0293EN - October 21, 2013




HSMP-386F.pdf
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