MB90F867AS (Fujitsu Media Devices)
16-bit Proprietary Microcontroller

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FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-13732-2E
16-bit Proprietary Microcontroller
CMOS
F2MC-16LX MB90860A Series
MB90F867A (S) , MB90867A (S)
s DESCRIPTION
The MB90860A-series is Fujitsu 16-bit general-purpose microcontroller which enhances each kind of timers and
communication macros. With the new 0.35 µm CMOS technology, Fujitsu now offers 128 Kbytes on-chip FLASH-
ROM program memory. An internal voltage booster removes the necessity for a second programming voltage.
The power supply (3 V) is supplied to the internal MCU core from an internal regulator circuit. This creates a
major advantage in terms of EMI and power consumption.
The internal PLL clock frequency multiplier provides an internal 42 ns instruction cycle time from an external
4 MHz clock.
The unit features an 8 channel Output Compare Unit and 8 channel Input Capture Unit with 2 separate 16-bit free
running timers. 4 UARTs constitute additional functionality for communication purposes.
Note : F2MC stands for FUJITSU Flexible Microcontroller, a registered trademark of FUJITSU LIMITED.
s PACKAGES
100-pin Plastic QFP
100-pin Plastic LQFP
(FPT-100P-M06)
(FPT-100P-M05)


MB90F867AS (Fujitsu Media Devices)
16-bit Proprietary Microcontroller

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MB90860A Series
s FEATURES
Clock
• Built-in PLL clock frequency multiplication circuit
• Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and
multiplication of 1 to 6 times of oscillation clock (for 4 MHz oscillation clock, 4 MHz to 24 MHz).
• Operation by sub-clock (up to 50 kHz : 100 kHz oscillation clock divided by two) is allowed. (devices without
S-suffix only)
• Minimum execution time of instruction : 42 ns (when operating with 4-MHz oscillation clock, and 6-time multi-
plied PLL clock).
16 Mbyte CPU memory space
• 24-bit internal addressing
Instruction system best suited to controller
• Wide choice of data types (bit, byte, word, and long word)
• Wide choice of addressing modes (23 types)
• Enhanced multiply-divide instructions and RETI instructions
• Enhanced high-precision computing with 32-bit accumulator
Instruction system compatible with high-level language (C language) and multitask
• Employing system stack pointer
• Enhanced various pointer indirect instructions
• Barrel shift instructions
Increased processing speed
• 4-byte instruction queue
Powerful interrupt function
• Powerful 8-level, 34-condition interrupt feature
• Up to 16 external interrupts are supported
Automatic data transfer function independent of CPU
• Extended intelligent I/O service function (EI2OS) : up to 16 channels
• DMA : up to 16 channels
Low power consumption (standby) mode
• Sleep mode (a mode that halts CPU operating clock)
• Time-base timer mode (a mode that operates oscillation clock, sub clock, time-base timer and clock timer only)
• Watch mode (a mode that operates sub clock and clock timer only)
• Stop mode (a mode that stops oscillation clock and sub clock)
• CPU blocking operation mode
Process
• CMOS technology
I/O port
• General-purpose input/output port (CMOS output)
- 80 ports (devices without S-suffix)
- 82 ports (devices with S-suffix)
(Continued)
2


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16-bit Proprietary Microcontroller

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MB90860A Series
(Continued)
Timer
• Time-base timer, clock timer, watchdog timer : 1 channel
• 8/16-bit PPG timer : 8-bit X 16 channels, or 16-bit X 8 channels
• 16-bit reload timer : 4 channels
• 16- bit input/output timer
- 16-bit free run timer : 2 channel (FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7)
- 16- bit input capture: (ICU) : 8 channels
- 16-bit output compare : (OCU) : 8 channels
UART (LIN/SCI) : 4 channels
• Equipped with full-duplex double buffer
• Clock-asynchronous or clock-synchronous serial transmission is available
I2C interface* : 2 channels
• Up to 400 kbit/s transfer rate
DTP/External interrupt : 16 channels, CAN wakeup : 2 channels
• Module for activation of extended intelligent I/O service (EI2OS), DMA, and generation of external interrupt.
Delay interrupt generator module
• Generates interrupt request for task switching.
8/10-bit A/D converter : 24 channels
• Resolution is selectable between 8-bit and 10-bit.
• Activation by external trigger input is allowed.
• Conversion time : 3 µs (at 24-MHz machine clock, including sampling time)
Program patch function
• Address matching detection for 6 address pointers.
Internal voltage regulator
• Supports 3 V MCU core, offering low EMI and low power consumption figures
Programmable input levels
• Automotive/CMOS-Schmitt (initial level is Automotive in Single chip mode)
• TTL level (initial level for External bus mode)
ROM security function
• Protects the content of ROM (MASK ROM device only)
Flash security function
• Protects the content of Flash (Flash device only)
External bus interface
Clock monitor function
* : I2C license :
Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use, these com-
ponents in an I2C system provided that the system conforms to the I2C standard Specification as defined by
Philips.
3


MB90F867AS (Fujitsu Media Devices)
16-bit Proprietary Microcontroller

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MB90860A Series
s PRODUCT LINEUP
Part Number
Parameter
MB90F867A (S) , MB90867A (S)
MB90V340(S)
CPU
F2MC-16LX CPU
System clock
On-chip PLL clock multiplier (×1, ×2, ×3, ×4, ×6, 1/2 when PLL stops)
Minimum instruction execution time : 42 ns (4 MHz osc. PLL × 6)
ROM
Boot-block,Flash memory
128 Kbytes
External
RAM
6 Kbytes
30 Kbytes
Emulator-specific
power supply*1
Yes
Technology
0.35 µm CMOS with on-chip voltage regulator for internal
power supply + Flash memory with
On-chip charge pump for programming voltage
0.35 µm CMOS with
on-chip voltage regulator
for internal power supply
Operating
voltage range
3.5 V to 5.5 V : at normal operating (not using A/D converter)
4.0 V to 5.5 V : at using A/D converter/Flash programming
4.5 V to 5.5 V : at using external bus
5 V ± 10%
Temperature range
40 °C to +105 °C
Package
QFP-100, LQFP-100
PGA-299
4 channels
5 channels
UART
Wide range of baud rate settings using a dedicated reload timer
Special synchronous options for adapting to different synchronous serial protocols
LIN functionality working either as master or slave LIN device
I2C (400 Kbit/s)
2 channel
A/D
Converter
24 input channels
10-bit or 8-bit resolution
Conversion time : Min 3 µs include sample time (per one channel)
16-bit Reload Timer Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys = Machine clock frequency)
(4 channels)
Supports External Event Count function
16-bit
I/O Timer
(2 channels)
Signals an interrupt when overflowing
Supports Timer Clear when a match with Output Compare (Channel 0, 4)
Operation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24, fsys/25, fsys/26, fsys/27
(fsys = Machine clock freq.)
I/O Timer 0 (clock input FRCK0) corresponds to ICU 0/1/2/3, OCU 0/1/2/3
I/O Timer 1 (clock input FRCK1) corresponds to ICU 4/5/6/7, OCU 4/5/6/7
16-bit Output
Compare
Signals an interrupt when 16-bit I/O Timer match output compare registers.
(8 channels (16-bit) / A pair of compare registers can be used to generate an output signal.
16 channels (8-bit) )
16-bit Input Capture Rising edge, falling edge or rising & falling edge sensitive
(8 channels)
Signals an interrupt upon external event
(Continued)
4


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16-bit Proprietary Microcontroller

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MB90860A Series
(Continued)
Part Number
Parameter
MB90F867A (S) , MB90867A (S)
MB90V340(S)
Supports 8-bit and 16-bit operation modes
Sixteen 8-bit reload counters
8/16-bit
Sixteen 8-bit reload registers for L pulse width
Programmable Pulse Sixteen 8-bit reload registers for H pulse width
Generator
A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as
(8 channels)
8-bit prescaler plus 8-bit reload counter
Operation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24 or 128 µs@fosc = 4 MHz
(fsys = Machine clock frequency, fosc = Oscillation clock frequency)
CAN Interface
3 channels
External Interrupt
(16 channels)
Can be used rising edge, falling edge, starting up by H/L level input, external interrupt,
expanded inteligent I/O services (EI2OS) and DMA
D/A converter
2 channels
Up to100 kHz
Subclock for low
power operation
devices with ‘S’-suffix : without subclock
devices without ‘S’-suffix : with subclock
I/O Ports
Virtually all external pins can be used as general purpose I/O port
All push-pull outputs
Bit-wise settable as input/output or peripheral signal
Settable in pin-wise of 8 as CMOS schmitt trigger/ automotive inputs (default)
TTL input level settable for external bus (32-pin only for external bus)
Flash
Memory
Supports automatic programming, Embedded AlgorithmTM*2
Write/Erase/Erase-Suspend/Resume commands
A flag indicating completion of the algorithm
Number of erase cycles : 10,000 times
Data retention time : 20 years
Boot block configuration
Erase can be performed on each block
Block protection with external programming voltage
Flash Security Feature for protecting the content of the Flash
*1 : It is setting of Jumper switch (TOOL VCC) when Emulator (MB2147-01) is used.
Please refer to the Emulator hardware manual about details.
*2 : Embedded Algorithm is a trade mark of Advanced Micro Devices Inc.
5


MB90F867AS (Fujitsu Media Devices)
16-bit Proprietary Microcontroller

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MB90860A Series
s PIN ASSIGNMENTS
MB90F867A (S) , MB90867A (S)
(TOP VIEW)
P04/AD04/INT12
P05/AD05/INT13
P06/AD06/INT14
P07/AD07/INT15
P10/AD08/TIN1
P11/AD09/TOT1
P12/AD10/SIN3/NT11R
P13/AD11/SOT3
P14/AD12/SCK3
Vcc
Vss
X1
X0
P15/AD13
P16/AD14
P17/AD15
P20/A16/PPG9(8)
P21/A17/PPGB(A)
P22/A18/PPGD(C)
P23/A19/PPGF(E)
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
81 50
82 49
83 48
84 47
85 46
86 45
87 44
88 43
89 42
90
QFP - 100
41
91 40
92 39
93 38
94 37
95 36
96 35
97 34
98 33
99 32
100 31
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
P75/AN21/INT5
P74/AN20/INT4
P73/AN19/INT3
P72/AN18/INT2
P71/AN17/INT1
P70/AN16/INT0
Vss
P67/AN7/PPGE(F)
P66/AN6/PPGC(D)
P65/AN5/PPGA(B)
P64/AN4/PPG8(9)
P63/AN3/PPG6(7)
P62/AN2/PPG4(5)
P61/AN1/PPG2(3)
P60/AN0/PPG0(1)
AVss
AVRL
AVRH
AVcc
P57/AN15
(FPT-100P-M06)
* : MB90F867A, MB90867A : X0A, X1A
MB90F867AS, MB90867AS : P40, P41
6
(Continued)


MB90F867AS (Fujitsu Media Devices)
16-bit Proprietary Microcontroller

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(Continued)
MB90860A Series
(TOP VIEW)
P01/AD01/INT9
P02/AD02/INT10
P03/AD03/INT11
P04/AD04/INT12
P05/AD05/INT13
P06/AD06/INT14
P07/AD07/INT15
P10/AD08/TIN1
P11/AD09/TOT1
P12/AD10/SIN3/NT11R
P13/AD11/SOT3
P14/AD12/SCK3
Vcc
Vss
X1
X0
P15/AD13
P16/AD14
P17/AD15
P20/A16/PPG9(8)
P21/A17/PPGB(A)
P22/A18/PPGD(C)
P23/A19/PPGF(E)
P24/A20/IN0
P25/A21/IN1
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
76 50
77 49
78 48
79 47
80 46
81 45
82 44
83 43
84 42
85 41
86 40
87
LQFP - 100
39
88 38
89 37
90 36
91 35
92 34
93 33
94 32
95 31
96 30
97 29
98 28
99 27
100 26
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
MD1
MD2
P75/AN21/INT5
P74/AN20/INT4
P73/AN19/INT3
P72/AN18/INT2
P71/AN17/INT1
P70/AN16/INT0
Vss
P67/AN7/PPGE(F)
P66/AN6/PPGC(D)
P65/AN5/PPGA(B)
P64/AN4/PPG8(9)
P63/AN3/PPG6(7)
P62/AN2/PPG4(5)
P61/AN1/PPG2(3)
P60/AN0/PPG0(1)
AVss
AVRL
AVRH
AVcc
P57/AN15
P56/AN14
P55/AN13
P54/AN12/TOT3
* : MB90F867A, MB90867A : X0A, X1A
MB90F867AS, MB90867AS : P40, P41
(FPT-100P-M05)
7


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16-bit Proprietary Microcontroller

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MB90860A Series
s PIN DESCRIPTION
Pin No.
LQFP100*2 QFP100*1
Pin name
Circuit
type
Function
90 92
91 93
X1 Oscillation output
A
X0 Oscillation input
52 54
RST
E Reset input
General purpose I/O. The register can be set to select whether
P00 to P07
to use a pull-up resistor. This function is enabled in single-chip
mode.
75 to 82
77 to 84
AD00 to AD07
G
I/O pins for 8 lower bits of the external address/data bus.
This function is enabled when the external bus is enabled.
INT8 to INT15
External interrupt request input pins for INT8 to INT15.
General purpose I/O. The register can be set to select whether
P10 to use a pull-up resistor. This function is enabled in single-chip
mode.
83
85
AD08
G I/O pin for bit 8 of the external address/data bus.
This function is enabled when the external bus is enabled.
TIN1
Event input pin for the reload timer 1
General purpose I/O. The register can be set to select whether
P11 to use a pull-up resistor. This function is enabled in single-chip
mode.
84
86
AD09
G I/O pin for bit 9 of the external address/data bus.
This function is enabled when the external bus is enabled.
TOT1
Output pin for the reload timer 1
General purpose I/O. The register can be set to select whether
P12 to use a pull-up resistor. This function is enabled in single-chip
mode.
85
87
AD10
N I/O pin for bit 10 of the external address/data bus.
This function is enabled when the external bus is enabled.
SIN3
Serial data input pin for UART3
INT11R
Sub external interrupt request input pin for INT11
General purpose I/O. The register can be set to select whether
P13 to use a pull-up resistor. This function is enabled in single-chip
mode.
86
88
AD11
G I/O pin for bit 11 of the external address/data bus.
This function is enabled when the external bus is enabled.
SOT3
Serial data output pin for UART3
General purpose I/O. The register can be set to select whether
P14 to use a pull-up resistor. This function is enabled in single-chip
mode.
87
89
AD12
G I/O pin for bit 12 of the external address/data bus.
This function is enabled when the external bus is enabled.
SCK3
Clock I/O pin for UART3
(Continued)
8


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16-bit Proprietary Microcontroller

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MB90860A Series
Pin No.
LQFP100*2 QFP100*1
Pin name
Circuit
type
Function
General purpose I/O. The register can be set to select whether
P15 to use a pull-up resistor. This function is enabled in single-chip
mode.
92
94
AD13
G I/O pin for bit 13 of the external address/data bus.
This function is enabled when the external bus is enabled.
SIN4
Serial data input pin for UART4 (MB90V340 only)
General purpose I/O. The register can be set to select whether
P16 to use a pull-up resistor. This function is enabled in single-chip
mode.
93
95
AD14
G I/O pin for bit 14 of the external address/data bus.
This function is enabled when the external bus is enabled.
SOT4
Serial data output pin for UART4 (MB90V340 only)
General purpose I/O. The register can be set to select whether
P17 to use a pull-up resistor. This function is enabled in single-chip
mode.
94
96
AD15
G I/O pin for bit 15 of the external address/data bus. This function
is enabled when the external bus is enabled.
SCK4
Clock I/O pin for UART4 (MB90V340 only)
P20 to P23
General purpose I/O. The register can be set to select whether
to use a pull-up resistor.In external bus mode, the pin is
enabled as a general-purpose I/O port when the corresponding
bit in the external address output control register (HACR) is 1.
95 to 98 97 to 100
A16 to A19
G
Output pins for A16 to A19 of the external address bus. When
the corresponding bit in the external address output control
register (HACR) is 0, the pins are enabled as high address
output pins (A16 to A19).
PPG9,PPGB,
PPGD,PPGF
Output pins for PPGs
P24 to P27
General purpose I/O. The register can be set to select whether
to use a pull-up resistor.In external bus mode, the pin is
enabled as a general-purpose I/O port when the corresponding
bit in the external address output control register (HACR) is 1.
99 to 2
1 to 4
A20 to A23
G Output pins for A20 to A23 of the external address bus. When
the corresponding bit in the external address output control
register (HACR) is 0, the pins are enabled as high address
output pins (A20 to A23).
IN0 to IN3
Data sample input pins for input captures ICU0 to ICU3
General purpose I/O.The register can be set to select whether
P30 to use a pull-up resistor.This function is enabled in single-chip
mode.
3
5
ALE
G Address latch enable output pin. This function is enabled when
the external bus is enabled.
IN4 Data sample input pin for input capture ICU4
(Continued)
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16-bit Proprietary Microcontroller

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MB90860A Series
Pin No.
LQFP100*2 QFP100*1
46
57
68
79
8 10
9 11
Pin name
P31
RD
IN5
P32
WRL / WR
RX2
INT10R
P33
WRH
TX2
P34
HRQ
OUT4
P35
HAK
OUT5
P36
RDY
OUT6
Circuit
type
Function
General purpose I/O.The register can be set to select whether to
use a pull-up resistor.This function is enabled in single-chip
mode.
G Read strobe output pin for the data bus. This function is enabled
when the external bus is enabled.
Data sample input pin for input capture ICU5
General purpose I/O. The register can be set to select whether to
use a pull-up resistor. This function is enabled either in single-chip
mode or with the WR/WRL pin output disabled.
Write strobe output pin for the data bus. This function is enabled
when both the external bus and the WR/WRL pin output are en-
G abled. WRL is used to write-strobe 8 lower bits of the data bus in
16-bit access while WR is used to write-strobe 8 bits of the data
bus in 8-bit access.
RX input pin for CAN2 Interface (MB90V340 only)
Sub external interrupt request input pin for INT10
General purpose I/O. The register can be set to select whether to
use a pull-up resistor.This function is enabled either in single-chip
mode or with the WRH pin output disabled.
G
Write strobe output pin for the 8 higher bits of the data bus. This
function is enabled when the external bus is enabled, when the
external bus 16-bit mode is selected, and when the WRH output
pin is enabled.
TX Output pin for CAN2 (MB90V340 only)
General purpose I/O. The register can be set to select whether to
use a pull-up resistor. This function is enabled either in single-chip
mode or with the hold function disabled.
G Hold request input pin. This function is enabled when both the ex-
ternal bus and the hold function are enabled.
Waveform output pin for output compare OCU4
General purpose I/O. The register can be set to select whether to
use a pull-up resistor. This function is enabled either in single-chip
mode or with the hold function disabled.
G Hold acknowledge output pin. This function is enabled when both
the external bus and the hold function are enabled.
Waveform output pin for output compare OCU5
General purpose I/O. The register can be set to select whether to
use a pull-up resistor. This function is enabled either in single-chip
mode or with the external ready function disabled.
G Ready input pin. This function is enabled when both the
external bus and the external ready function are enabled.
Waveform output pin for output compare OCU6
(Continued)
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MB90860A Series
Pin No.
LQFP100*2 QFP100*1
10 12
11 to 12 13 to 14
16 18
17 19
18 20
19 21
20 22
21 23
22 24
23 25
24 26
25 27
Pin name
P37
CLK
OUT7
P40 , P41
X0A , X1A
P42
IN6
RX1
INT9R
P43
IN7
TX1
P44
SDA0
FRCK0
P45
SCL0
FRCK1
P46
SDA1
P47
SCL1
P50
AN8
SIN2
P51
AN9
SOT2
P52
AN10
SCK2
P53
AN11
TIN3
Circuit
type
Function
General purpose I/O. The register can be set to select whether
to use a pull-up resistor. This function is enabled either in
single-chip mode or with the CLK output disabled.
G CLK output pin. This function is enabled when both the
external bus and CLK output are enabled.
Waveform output pin for output compare OCU7
F General purpose I/O (devices with S-suffix)
B Oscillator input pins for sub-clock (devices without S-suffix)
General purpose I/O
Data sample input pin for input capture ICU6
F
RX input pin for CAN1 (MB90V340 (S) only)
Sub external interrupt request input pin for INT10
General purpose I/O
F Data sample input pin for input capture ICU7
TX Output pin for CAN1 (MB90V340 (S) only)
General purpose I/O
H Serial data I/O pin for I2C 0
Input for the 16-bit I/O Timer 0
General purpose I/O
H Serial clock I/O pin for I2C 0
Input for the 16-bit I/O Timer 1
General purpose I/O
H
Serial data I/O pin for I2C 1
General purpose I/O
H
Serial clock I/O pin for I2C 1
General purpose I/O
O Analog input pin for the A/D converter
Serial data input pin for UART2
General purpose I/O
I Analog input pin for the A/D converter
Serial data output pin for UART2
General purpose I/O
I Analog input pin for the A/D converter
Clock I/O pin for UART2
General purpose I/O
I Analog input pin for the A/D converter
Event input pin for the reload timer 3
(Continued)
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16-bit Proprietary Microcontroller

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MB90860A Series
Pin No.
LQFP100*2 QFP100*1
Pin name
Circuit
type
Function
P54 General purpose I/O
26
28
AN12
I Analog input pin for the A/D converter
TOT3
Output pin for the reload timer 3
P55 General purpose I/O
27 29
I
AN13
Analog input pin for the A/D converter
P56 to P57
General purpose I/O
28, 29
30, 31 AN14 to AN15 J Analog input pin for the A/D converter
DA00 to DA01
D/A converter analog output pins (MB90V340 only)
P60 to P67
General purpose I/O
34 to 41
36 to 43
AN0 to AN7
PPG0, 2, 4, 6,
8, A, C, E
I Analog input pins for the A/D converter
Output pins for PPGs
P70 to P77
General purpose I/O
43 to 48,
53, 54
45 to 50,
55, 56
AN16 to AN23
I
Analog input pins for the A/D converter (devices with C-suffix)
INT0 to INT7
External interrupt request input pins for INT0 to INT7
P80 General purpose I/O
TIN0
Event input pin for the reload timers 0
55 57
F
ADTG
Trigger input pin for the A/D converter
INT12R
Sub external interrupt request input pin for INT12
P81 General purpose I/O
TOT0
Output pin for the reload timer 0
56 58
F
CKOT
Output pin for the clock monitor
INT13R
Sub external interrupt request input pin for INT13
P82 General purpose I/O
SIN0
Serial data input pin for UART0
57 59
M
TIN2
Event input pin for the reload timers 2
INT14R
Sub external interrupt request input pin for INT14
P83 General purpose I/O
58
60
SOT0
F Serial data output pin for UART0
TOT2
Output pin for the reload timer 2
P84 General purpose I/O
59
61
SCK0
F Clock I/O pin for UART0
INT15R
Sub external interrupt request input pin for INT15
P85 General purpose I/O
60 62
M
SIN1
Serial data input pin for UART1
P86 General purpose I/O
61 63
F
SOT1
Serial data output pin for UART1
(Continued)
12


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16-bit Proprietary Microcontroller

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MB90860A Series
(Continued)
Pin No.
LQFP100*2 QFP100*1
Pin name
Circuit
type
Function
P87 General purpose I/O
62 64
F
SCK1
Clock I/O pin for UART1
65 to 68
P90 to P93
67 to 70
PPG1, 3, 5, 7
General purpose I/O
F
Output pins for PPGs
P94 to P97
General purpose I/O
69 to 72 71 to 74
OUT0 to
OUT3
F Waveform output pins for output compares OCU0 to OCU3.
This function is enabled when the OCU enables waveform
output.
PA0 General purpose I/O
73 75
RX0 F RX input pin for CAN0 (MB90V340 (s) only)
INT8R
Sub external interrupt request input pin for INT8
74 76
PA1 General purpose I/O
F
TX0 TX Output pin for CAN0 (MB90V340 (s) only)
30
32
AVCC
K Vcc power input pin for analog circuits
Reference voltage input for the A/D Converter. This power
31
33
AVRH
L supply must be turned on or off while a voltage higher than or
equal to AVRH is applied to AVCC.
32
34
AVRL
K Lower reference voltage input for the A/D Converter
33
35
AVSS
K Vss power input pin for analog circuits
50, 51
52, 53 MD1, MD0
C
Input pins for specifying the operating mode. The pins must be
directly connected to Vcc or Vss
49
51
MD2
D
Input pin for specifying the operating mode. The pins must be
directly connected to Vcc or Vss.
13 15
63 65
88 90
VCC Power (3.5 V to 5.5 V) input pins
14 16
42 44
64 66
89 91
VSS Power (0V) input pins
15 17
This is the power supply stabilization capacitor pin. It should be
C K connected to a higher than or equal to 0.1 µF ceramic capaci-
tor.
*1 : FPT-100P-M06
*2 : FPT-100P-M05
13


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16-bit Proprietary Microcontroller

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MB90860A Series
s I/O CIRCUIT TYPE
Type
X1
A X0
Circuit
Remarks
Oscillation circuit
• High-speed oscillation feedback
Xout resistor = approx. 1 M
X1A
B X0A
Standby control signal
Xout
Oscillation circuit
• Low-speed oscillation feedback
resistor = approx. 10 M
Standby control signal
Mask ROM and EVA device:
• CMOS Hysteresis input pin
CR
Hysteresis
inputs
Flash device:
• CMOS input pin
R
D
Pull-down
Resistor
Hysteresis
inputs
Mask ROM and EVA device:
• CMOS Hysteresis input pin
• Pull-down resistor valule: approx. 50 k
Flash device:
• CMOS input pin
• No Pull-down
Pull-up
E Resistor
R
CMOS Hysteresis input pin
• Pull-up resistor valule: approx. 50 k
Hysteresis
inputs
(Continued)
14


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16-bit Proprietary Microcontroller

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Type
F
G
H
MB90860A Series
Circuit
Pout
Nout
R
Hysteresis inputs
Automotive inputs
Standby control for
input shutdown
pull-up control
Pout
Nout
R
Hysteresis inputs
Automotive inputs
TTL input
Standby control for
input shutdown
Pout
Nout
R
Hysteresis inputs
Automotive inputs
Standby control for
input shutdown
Remarks
• CMOS level output(IOL = 4 mA, IOH = 4 mA)
• CMOS hysteresis inputs (With the stand-
by-time input shutdown function)
• Automotive input (With the standby-time
input shutdown function)
• CMOS level output(IOL = 4 mA, IOH = 4 mA)
• CMOS hysteresis inputs (With the stand-
by-time input shutdown function)
• Automotive input (With the standby-time
input shutdown function)
• TTL input (With the standby-time input
shutdown function)
• Programmalble pullup resistor: 50 k
approx.
• CMOS level output(IOL = 3 mA, IOH = 3 mA)
• CMOS hysteresis inputs (With the stand-
by-time input shutdown function)
• Automotive input (With the standby-time
input shutdown function)
(Continued)
15


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16-bit Proprietary Microcontroller

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MB90860A Series
Type
I
J
K
L
16
Circuit
Pout
Nout
R
Hysteresis inputs
Automotive inputs
Standby control for
input shutdown
Analog input
Pout
Nout
R
Hysteresis inputs
Automotive inputs
Standby control for
input shutdown
Analog input
Analog output
Remarks
• CMOS level output(IOL = 4 mA, IOH = 4 mA)
• CMOS hysteresis inputs (With the standby-
time input shutdown function)
• Automotive input (With the standby-time in-
put shutdown function)
• A/D analog input
• CMOS level output(IOL = 4 mA, IOH = 4 mA)
• D/A analg output
• CMOS hysteresis inputs (With the standby-
time input shutdown function)
• Automotive input (With the standby-time in-
put shutdown function)
• A/D analog input
• Power supply input protection circuit
• A/D converter reference voltage power
ANE supply input pin, with the protection circuit
• Flash devices do not have a protection cir-
AVR cuit against VCC for pin AVRH
ANE
(Continued)


MB90F867AS (Fujitsu Media Devices)
16-bit Proprietary Microcontroller

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(Continued)
Type
MR
NR
R
O
Circuit
Pout
Nout
CMOS inputs
Automotive inputs
Standby control for
input shutdown
pull-up control
Pout
Nout
CMOS inputs
Automotive inputs
TTL input
Standby control for
input shutdown
Pout
Nout
CMOS inputs
Automotive inputs
Standby control for
input shutdown
Analog input
MB90860A Series
Remarks
• CMOS level output(IOL = 4 mA, IOH = 4 mA)
• CMOS inputs (With the standby-time
input shutdown function)
• Automotive input (With the standby-time
input shutdown function)
• CMOS level output(IOL = 4 mA, IOH = 4 mA)
• CMOS inputs (With the standby-time
input shutdown function)
• Automotive input (With the standby-time
input shutdown function)
• TTL input (With the standby-time input
shutdown function)
Programmable pullup registor:50 k
approx.
• CMOS level output(IOL = 4 mA, IOH = 4 mA)
• CMOS inputs (With the standby-time
input shutdown function)
• Automotive input (With the standby-time
input shutdown function)
• A/D analog input
17


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16-bit Proprietary Microcontroller

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MB90860A Series
s HANDLING DEVICES
Special care is required for the following when handling the device :
• Preventing latch-up
• Treatment of unused pins
• Using external clock
• Precautions for when not using a sub clock signal
• Notes on during operation of PLL clock mode
• Power supply pins (VCC/VSS)
• Pull-up/down resistors
• Crystal Oscillator Circuit
• Turning-on Sequence of Power Supply to A/D Converter and Analog Inputs
• Connection of Unused Pins of A/D Converter
• Notes on Energization
• Stabilization of power supply voltage
• Initialization
• Port0 to port3 output during Power-on(External-bus mode)
• Flash security Function
1. Preventing latch-up
CMOS IC chips may suffer latch-up under the following conditions :
• A voltage higher than VCC or lower than VSS is applied to an input or output pin.
• A voltage higher than the rated voltage is applied between VCC and VSS.
• The AVCC power supply is applied before the VCC voltage.
Latch-up may increase the power supply current drastically, causing thermal damage to the device.
For the same reason, also be careful not to let the analog power-supply voltage (AVCC, AVRH) exceed the digital
power-supply voltage.
2. Treatment of unused pins
Leaving unused input pins open may result in misbehavior or latch up and possible permanent damage of the
device. Therefore they must be pulled up or pulled down through resistors. In this case those resistors should
be more than 2 k.
Unused bidirectional pins should be set to the output state and can be left open, or the input state with the above
described connection.
3. Using external clock
To use external clock, drive the X0 pin and leave X1 pin open.
MB90860A Series
X0
Open
X1
4. Precautions for when not using a sub clock signal
If you do not connect pins X0A and X1A to an oscillator, use pull-down handling on the X0A pin, and leave the
X1A pin open.
18


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16-bit Proprietary Microcontroller

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MB90860A Series
5. Notes on during operation of PLL clock mode
If the PLL clock mode is selected, the microcontroller attempt to be working with the self-oscillating circuit even
when there is no external oscillator or external clock input is stopped. Performance of this operation, however,
cannot be guaranteed.
6. Power supply pins (VCC/VSS)
• If there are multiple VCC and VSS pins, from the point of view of device design, pins to be of the same potential
are connected the inside of the device to prevent such malfunctioning as latch up.
To reduce unnecessary radiation, prevent malfunctioning of the strobe signal due to the rise of ground level,
and observe the standard for total output current, be sure to connect the VCC and VSS pins to the power supply
and ground externally.
• Connect VCC and VSS to the device from the current supply source at a low impedance.
• As a measure against power supply noise, connect a capacitor of about 0.1 µF as a bypass capacitor between
VCC and VSS in the vicinity of VCC and VSS pins of the device
Vcc
Vss
Vcc
Vss
Vss
MB90860A
Vcc Series Vcc
Vss
Vss Vcc
7. Pull-up/down resistors
The MB90860A Series does not support internal pull-up/down resistors (Port 0 to Port 3: built-in pull-up resistors).
Use external components where needed.
8. Crystal Oscillator Circuit
Noises around X0 or X1 pins may be possible causes of abnormal operations. Make sure to provide bypass
capacitors via shortest distance from X0, X1 pins, crystal oscillator (or ceramic resonator) and ground lines, and
make sure, to the utmost effort, that lines of oscillation circuit not cross the lines of other circuits.
It is highly recommended to provide a printed circuit board art work surrounding X0 and X1 pins with a ground
area for stabilizing the operation.
9. Turning-on Sequence of Power Supply to A/D Converter and Analog Inputs
Make sure to turn on the A/D converter power supply (AVCC, AVRH, AVRL) and analog inputs (AN0 to AN23)
after turning-on the digital power supply (VCC) .
Turn-off the digital power after turning off the A/D converter supply and analog inputs. In this case, make sure
that the voltage not exceed AVRH or AVCC (turning on/off the analog and digital power supplies simultaneously
is acceptable) .
10. Connection of Unused Pins of A/D Converter if A/D Converter is used
Connect unused pins of A/D converter to AVCC = VCC, AVSS = AVRH = AVRL = VSS.
19


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16-bit Proprietary Microcontroller

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MB90860A Series
11. Notes on Energization
To prevent the internal regulator circuit from malfunctioning, set the voltage rise time during energization at
50 µs or more (0.2 V to 2.7 V)
12. Stabilization of power supply voltage
A sudden change in the supply voltage may cause the device to malfunction even within the specified VCC supply
voltage operating range. Therefore, the VCC supply voltage should be stabilized.
For reference, the supply voltage should be controlled so that VCC ripple variations (peak-to-peak value) at
commercial frequencies (50 Hz to 60 Hz) fall below 10% of the standard VCC supply voltage and the coefficient
of fluctuation does not exceed 0.1 V/ms at instantaneous power switching.
13. Initialization
In the device, there are internal registers which are initialized only by a power-on reset. To initialize these registers,
turn on the power again.
14. Port 0 to port 3 output during Power-on (External-bus mode)
As shown below, when power is turned on in External-Bus mode, there is a possibility that output signal of
Port 0 to Port 3 might be unstable.
VDD5
VDD3
Port0 to Port3
Port0 to 3 outputs
might be unstable
Port0 to 3 outputs = Hi-Z
15. Flash security Function
The security byte is located in the area of the flash memory.
If protection code 01H is written in the security byte, the flash memory is in the protected state by security.
Therefore please do not write 01H in this address if you do not use the security function.
Please refer to following table for the address of the security byte.
Flash memory size
Address for security byte
MB90F867A (S)
Embedded 1 Mbit Flash Memory
FE0001H
20


MB90F867AS (Fujitsu Media Devices)
16-bit Proprietary Microcontroller

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s BLOCK DIAGRAMS
MB90V340(S)
X0,X1
X0A,X1A*
RST
Clock
Controller
RAM 30 K
16LX
CPU
SOT4 to SOT0
SCK4 to SCK0
SIN4 to SIN0
AVCC
AVSS
AN23 to AN0
AVRH
AVRL
ADTG
DA01, DA00
PPGF to PPG0
SDA1, SDA0
SCL1, SCL0
Prescaler
5 ch
UART
5 ch
10-bit ADC
24 ch
10-bit
DAC
2 ch
8/16-bit
PPG
16 ch
I2C
Interface
2 ch
DMAC
* : Only for MB90V340 ( without ‘S’ Suffix )
MB90860A Series
IO Timer 0
Input
Capture
8 ch
Output
Compare
8 ch
IO Timer 1
CAN
Controller
3 ch
FRCK0
IN7 to IN0
OUT7 to OUT0
FRCK1
RX2 to RX0
TX2 to TX0
16-bit Reload
Timer 4 ch
TIN3 to TIN0
TOT3 to TOT0
External
Bus
Interface
External
Interrupt
Clock
Monitor
AD15 to AD00
A23 to A16
ALE
RD
WRL
WRH
HRQ
HAK
RDY
CLK
INT15 to INT8
(INT15R to INT8R)
INT7 to INT0
CKOT
21


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16-bit Proprietary Microcontroller

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MB90860A Series
MB90F867A (S) , MB90867A (S)
X0,X1
X0A,X1A*
RST
Clock
Controller
SOT3 to SOT0
SCK3 to SCK0
SIN3 to SIN0
AVCC
AVSS
AN15 to AN0
AN23 to AN16
AVRH
AVRL
ADTG
RAM
6K
ROM/Flash
128 K
Prescaler
4 ch
UART
4 ch
10-bit ADC
16/24 ch
PPGF to PPG0
SDA1, SDA0
SCL1, SCL0
8/16-bit
PPG
16 ch
I2C
Interface
2 ch
DMAC
* : Only for devices without ‘S’ Suffix
22
16LX
CPU
IO Timer 0
Input
Capture
8 ch
Output
Compare
8 ch
IO Timer 1
FRCK0
IN7 to IN0
OUT7 to OUT0
FRCK1
16-bit Reload
Timer 4 ch
External
Bus
Interface
External
Interrupt
Clock
Monitor
TIN3 to TIN0
TOT3 to TOT0
AD15 to AD00
A23 to A16
ALE
RD
WRL
WRH
HRQ
HAK
RDY
CLK
INT15 to INT8
(INT15R to INT8R)
INT7 to INT0
CKOT


MB90F867AS (Fujitsu Media Devices)
16-bit Proprietary Microcontroller

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MB90860A Series
s MEMORY MAP
MB90V340 (S)
FFFFFFH
FF0000H
FEFFFFH
FE0000H
FDFFFFH
ROM(FF bank)
ROM(FE bank)
FD0000H
FCFFFFH
FC0000H
FBFFFFH
FB0000H
FAFFFFH
FA0000H
F9FFFFH
F90000H
F8FFFFH
F80000H
00FFFFH
ROM
008000H (Image of FF bank)
007FFFH
007900H
Peripheral
0078FFH
MB90867A (S)
MB90F867A (S)
FFFFFFH
FF0000H
FEFFFFH
FE0000H
ROM(FF bank)
ROM(FE bank)
00FFFFH
ROM
(Image of FF bank)
008000H
007FFFH
007900H
Peripheral
RAM 30 K
000100H
0000EFH
000000H
Peripheral
: No access
0018FFH
000100H
0000EFH
000000H
RAM 6 K
Peripheral
Note : The high-order portion of bank 00 gives the image of the FF bank ROM to make the small model of the C
compiler effective. Since the low-order 16 bits are the same, the table in ROM can be referenced without
using the far specification in the pointer declaration.
For example, an attempt to access 00C000H accesses the value at FFC000H in ROM.
The ROM area in bank FF exceeds 32 Kbytes, and its entire image cannot be shown in bank 00.
The image between FF8000H and FFFFFFH is visible in bank 00, while the image between FF0000H and
FF7FFFH is visible only in bank FF.
23


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16-bit Proprietary Microcontroller

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MB90860A Series
s I/O MAP
Address
Register
00H Port 0 Data Register
01H Port 1 Data Register
02H Port 2 Data Register
03H Port 3 Data Register
04H Port 4 Data Register
05H Port 5 Data Register
06H Port 6 Data Register
07H Port 7 Data Register
08H Port 8 Data Register
09H Port 9 Data Register
0AH Port A Data Register
0BH Port 5 Analog Input Enable Register
0CH Port 6 Analog Input Enable Register
0DH Port 7 Analog Input Enable Register
0EH Input Level Select Register 0
0FH Input Level Select Register 1
10H Port 0 Direction Register
11H Port 1 Direction Register
12H Port 2 Direction Register
13H Port 3 Direction Register
14H Port 4 Direction Register
15H Port 5 Direction Register
16H Port 6 Direction Register
17H Port 7 Direction Register
18H Port 8 Direction Register
19H Port 9 Direction Register
1AH Port A Direction Register
1BH
1CH Port 0 Pullup Control Register
1DH Port 1 Pullup Control Register
1EH Port 2 Pullup Control Register
1FH Port 3 Pullup Control Register
Abbrevia-
tion
Access
PDR0
R/W
PDR1
R/W
PDR2
R/W
PDR3
R/W
PDR4
R/W
PDR5
R/W
PDR6
R/W
PDR7
R/W
PDR8
R/W
PDR9
R/W
PDRA
R/W
ADER5
R/W
ADER6
R/W
ADER7
R/W
ILSR0
R/W
ILSR1
R/W
DDR0
R/W
DDR1
R/W
DDR2
R/W
DDR3
R/W
DDR4
R/W
DDR5
R/W
DDR6
R/W
DDR7
R/W
DDR8
R/W
DDR9
R/W
DDRA
R/W
Reserved
PUCR0 R/W
PUCR1 R/W
PUCR2 R/W
PUCR3 R/W
Resource name
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
Port 8
Port 9
Port A
Port 5, A/D
Port 6, A/D
Port 7, A/D
Ports
Ports
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
Port 8
Port 9
Port A
Port 0
Port 1
Port 2
Port 3
Initial value
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
11111111
11111111
11111111
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000100
00000000
00000000
00000000
00000000
(Continued)
24


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16-bit Proprietary Microcontroller

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MB90860A Series
Address
Register
Abbrevia-
tion
Access
20H Serial Mode Register 0
SMR0 W, R/W
21H Serial Control Register 0
SCR0 W, R/W
22H
Reception/Transmission Data Register 0
RDR0/
TDR0
R/W
23H Serial Status Register 0
SSR0 R, R/W
24H Extended Communication Control Reg. 0 ECCR0
R, W,
R/W
25H Extended Status/Control Register 0
ESCR0 R/W
26H Baud Rate Generator Register 00
BGR00
R/W
27H Baud Rate Generator Register 01
BGR01
R/W
28H Serial Mode Register 1
SMR1 W, R/W
29H Serial Control Register 1
SCR1 W, R/W
2AH
Reception/Transmission Data Register 1
RDR1/
TDR1
R/W
2BH Serial Status Register 1
SSR1 R, R/W
2CH Extended Communication Control Reg. 1 ECCR1
R, W,
R/W
2DH Extended Status Control Register 1
ESCR1 R/W
2EH Baud Rate Generator Register 10
BGR10
R/W
2FH Baud Rate Generator Register 11
BGR11
R/W
30H PPG 0 Operation Mode Control Register PPGC0 W, R/W
31H PPG 1 Operation Mode Control Register PPGC1 W, R/W
32H PPG 01 Clock Select Register
PPG01
R/W
33H Reserved
34H PPG 2 Operation Mode Control Register PPGC2 W, R/W
35H PPG 3 Operation Mode Control Register PPGC3 W, R/W
36H PPG 23 Clock Select Register
PPG23
R/W
37H Reserved
38H PPG 4 Operation Mode Control Register PPGC4 W, R/W
39H PPG 5 Operation Mode Control Register PPGC5 W, R/W
3AH PPG 4 and PPG 5 Clock Select Register PPG45
R/W
3BH
Program Address Detection Control
Status Register 1
PACSR1 R/W
3CH PPG 6 Operation Mode Control Register PPGC6 W, R/W
3DH PPG 7 Operation Mode Control Register PPGC7 W, R/W
3EH PPG 67 Clock Select Register
PPG67
R/W
3FH Reserved
Resource name
UART0
UART1
16-bit PPG 0/1
16-bit PPG 2/3
16-bit PPG 4/5
Address Match
Detection 1
16-bit PPG 6/7
Initial value
00000000
00000000
00000000
00001000
000000XX
00000100
00000000
00000000
00000000
00000000
00000000
00001000
000000XX
00000100
00000000
00000000
0X000XX1
0X000001
000000X0
0X000XX1
0X000001
000000X0
0X000XX1
0X000001
000000X0
00000000
0X000XX1
0X000001
000000X0
(Continued)
25


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16-bit Proprietary Microcontroller

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MB90860A Series
Address
Register
Abbrevi-
ation
Access
40H PPG 8 Operation Mode Control Register PPGC8 W, R/W
41H PPG 9 Operation Mode Control Register PPGC9 W, R/W
42H PPG 89 Clock Select Register
PPG89 R/W
43H Reserved
44H PPG A Operation Mode Control Register PPGCA W, R/W
45H PPG B Operation Mode Control Register PPGCB W, R/W
46H PPG AB Clock Select Register
PPGAB R/W
47H Reserved
48H PPG C Operation Mode Control Register PPGCC W, R/W
49H PPG D Operation Mode Control Register PPGCD W, R/W
4AH PPG CD Clock Select Register
PPGCD R/W
4BH Reserved
4CH PPG E Operation Mode Control Register PPGCE W, R/W
4DH PPG F Operation Mode Control Register PPGCF W, R/W
4EH PPG EF Clock Select Register
PPGEF R/W
4FH Reserved
50H Input Capture Control Status Register 0/1 ICS01 R/W
51H Input Capture Edge Register 0/1
ICE01 R/W, R
52H Input Capture Control Status Register 2/3 ICS23 R/W
53H Input Capture Edge Register 2/3
ICE23
R
54H Input Capture Control Status Register 4/5 ICS45 R/W
55H Input Capture Edge Register 4/5
ICE45
R
56H Input Capture Control Status Register 6/7 ICS67 R/W
57H Input Capture Edge Register 6/7
ICE67 R/W, R
58H Output Compare Control Status Register 0 OCS0
R/W
59H Output Compare Control Status Register 1 OCS1
R/W
5AH Output Compare Control Status Register 2 OCS2
R/W
5BH Output Compare Control Status Register 3 OCS3
R/W
5CH Output Compare Control Status Register 4 OCS4
R/W
5DH Output Compare Control Status Register 5 OCS5
R/W
5EH Output Compare Control Status Register 6 OCS6
R/W
5FH Output Compare Control Status Register 7 OCS7
R/W
Resource name
16-bit PPG 8/9
16-bit PPG A/B
16-bit PPG C/D
16-bit PPG E/F
Input Capture 0/1
Input Capture 2/3
Input Capture 4/5
Input Capture 6/7
Output Compare 0/1
Output Compare 2/3
Output Compare 4/5
Output Compare 6/7
Initial value
0X000XX1
0X000001
000000X0
0X000XX1
0X000001
000000X0
0X000XX1
0X000001
000000X0
0X000XX1
0X000001
000000X0
00000000
XXX0X0XX
00000000
XXXXXXXX
00000000
XXXXXXXX
00000000
XXX000XX
0000XX00
0XX00000
0000XX00
0XX00000
0000XX00
0XX00000
0000XX00
0XX00000
(Continued)
26


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16-bit Proprietary Microcontroller

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MB90860A Series
Address
Register
Abbrevia-
tion
Access
Resource name
Initial value
60H Timer Control Status Register 0
61H Timer Control Status Register 0
TMCSR0
TMCSR0
R/W
00000000
16-bit Reload Timer 0
R/W XXXX0000
62H Timer Control Status Register 1
63H Timer Control Status Register 1
TMCSR1
TMCSR1
R/W
00000000
16-bit Reload Timer 1
R/W XXXX0000
64H Timer Control Status Register 2
65H Timer Control Status Register 2
TMCSR2
TMCSR2
R/W
00000000
16-bit Reload Timer 2
R/W XXXX0000
66H Timer Control Status Register 3
67H Timer Control Status Register 3
TMCSR3
TMCSR3
R/W
00000000
16-bit Reload Timer 3
R/W XXXX0000
68H A/D Control Status Register 0
ADCS0
R/W
000XXXX0
69H A/D Control Status Register 1
ADCS1
R/W
0000000X
6AH A/D Data Register 0
6BH A/D Data Register 1
ADCR0
ADCR1
R
R
A/D Converter
00000000
XXXXXX00
6CH ADC Setting Register 0
ADSR0
R/W
00000000
6DH ADC Setting Register 1
ADSR1
R/W
00000000
6EH Reserved
6FH ROM Mirroring Register
ROMM
W
ROM Mirror
XXXXXXX1
70H to 8FH
Reserved
90H to 9AH
Reserved
9BH
DMA Descriptor Channel Specification
Register
DCSR
9CH DMA Status Register L
DSRL
R/W
R/W
DMA
00000000
00000000
9DH DMA Status Register H
DSRH
R/W
00000000
9EH
Program Address Detection Control
Status Register 0
PACSR0 R/W
Address Match
Detection 0
00000000
9FH Delayed Interrupt/Release
DIRR
R/W Delayed Interrupt XXXXXXX0
A0H Low-power Mode Control Register
LPMCR W, R/W
Low Power
Controller
00011000
A1H Clock Selection Register
CKSCR R, R/W
Low Power
Controller
11111100
A2H, A3H
Reserved
A4H DMA Stop Status Register
DSSR
R/W
DMA
00000000
A5H Automatic Ready Function Select Reg. ARSR
W
0011XX00
A6H External Address Output Control Reg. HACR
W
External Memory
Access
00000000
A7H Bus Control Signal Selection Register ECSR
W
0000000X
A8H Watchdog Control Register
WDTC
R, W
Watchdog Timer XXXXX111
A9H Timebase Timer Control Register
TBTC
W, R/W Time Base Timer
1XX00100
(Continued)
27


MB90F867AS (Fujitsu Media Devices)
16-bit Proprietary Microcontroller

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MB90860A Series
Address
Register
AAH Watch Timer Control Register
ABH
ACH DMA Enable Register L
ADH DMA Enable Register H
Flash Control Status Register
AEH (FlashDevices only.
Otherwise reserved)
AFH
B0H Interrupt Control Register 00
B1H Interrupt Control Register 01
B2H Interrupt Control Register 02
B3H Interrupt Control Register 03
B4H Interrupt Control Register 04
B5H Interrupt Control Register 05
B6H Interrupt Control Register 06
B7H Interrupt Control Register 07
B8H Interrupt Control Register 08
B9H Interrupt Control Register 09
BAH Interrupt Control Register 10
BBH Interrupt Control Register 11
BCH Interrupt Control Register 12
BDH Interrupt Control Register 13
BEH Interrupt Control Register 14
BFH Interrupt Control Register 15
C0H D/A Converter Data 0
C1H D/A Converter Data 1
C2H D/A Control 0
C3H D/A Control 1
C4H, C5H
C6H
External Interrupt Request Enable
Register 0
C7H External Interrupt Request Register 0
C8H External Interrupt Level Register 0
C9H External Interrupt Level Register 0
Abbrevia-
tion
Access
WTC R, R/W
Reserved
DERL
R/W
DERH
R/W
Resource name
Watch Timer
DMA
Initial value
1X001000
00000000
00000000
FMCS R, R/W
Flash Memory
000X0000
Reserved
ICR00 W, R/W
ICR01 W, R/W
ICR02 W, R/W
ICR03 W, R/W
ICR04 W, R/W
ICR05 W, R/W
ICR06 W, R/W
ICR07 W, R/W
ICR08 W, R/W
ICR09 W, R/W
ICR10 W, R/W
ICR11 W, R/W
ICR12 W, R/W
ICR13 W, R/W
ICR14 W, R/W
ICR15 W, R/W
DAT0
R/W
DAT1
R/W
DACR0 R/W
DACR1 R/W
Reserved
Interrupt Controller
D/A Converter
00000111
00000111
00000111
00000111
00000111
00000111
00000111
00000111
00000111
00000111
00000111
00000111
00000111
00000111
00000111
00000111
XXXXXXXX
XXXXXXXX
XXXXXXX0
XXXXXXX0
ENIR0
R/W
00000000
EIRR0
ELVR0
ELVR0
R/W External Interrupt 0 XXXXXXXX
R/W
00000000
R/W
00000000
(Continued)
28


MB90F867AS (Fujitsu Media Devices)
16-bit Proprietary Microcontroller

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MB90860A Series
Address
Register
CAH
External Interrupt Request Enable
Register 1
CBH External Interrupt Request Register 1
CCH External Interrupt Level Register 1
CDH External Interrupt Level Register 1
CEH
External Interrupt Source Select
Register
CFH PLL/Subclock Control Register
D0H DMA Buffer Address Pointer L
D1H DMA Buffer Address Pointer M
D2H DMA Buffer Address Pointer H
D3H DMA Control Register
D4H I/O Register Address Pointer L
D5H I/O Register Address Pointer H
D6H Data Counter L
D7H Data Counter H
D8H Serial Mode Register 2
D9H Serial Control Register 2
DAH
Reception/Transmission Data
Register 2
DBH Serial Status Register 2
DCH
Extended Communication Control
Register 2
DDH Extended Status/Control Register 2
DEH Baud Rate Reload Register 20
DFH Baud Rate Reload Register 21
E0H to EFH
F0H to FFH
Abbrevia-
tion
Access
ENIR1
R/W
EIRR1
ELVR1
ELVR1
R/W
R/W
R/W
EISSR
R/W
PSCCR
W
BAPL
R/W
BAPM
R/W
BAPH
R/W
DMACS R/W
IOAL
R/W
IOAH
R/W
DCTL
R/W
DCTH
R/W
SMR2 W, R/W
SCR2 W, R/W
RDR2/
TDR2
R/W
SSR2 R, R/W
ECCR2
R, W,
R/W
ESCR2 R/W
BGR20
R/W
BGR21
R/W
Reserved
External
Resource name Initial value
00000000
External Interrupt 1
XXXXXXXX
00000000
00000000
00000000
PLL
DMA
XXXX0000
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
00000000
00000000
00000000
UART2
00001000
000000XX
00000100
00000000
00000000
(Continued)
29


MB90F867AS (Fujitsu Media Devices)
16-bit Proprietary Microcontroller

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MB90860A Series
Address
Register
7900H
7901H
7902H
7903H
7904H
7905H
7906H
7907H
7908H
7909H
790AH
790BH
790CH
790DH
790EH
790FH
7910H
7911H
7912H
7913H
7914H
7915H
7916H
7917H
7918H
7919H
791AH
791BH
791CH
791DH
791EH
791FH
7920H
7921H
7922H
7923H
Reload Register L0
Reload Register H0
Reload Register L1
Reload Register H1
Reload Register L2
Reload Register H2
Reload Register L3
Reload Register H3
Reload Register L4
Reload Register H4
Reload Register L5
Reload Register H5
Reload Register L6
Reload Register H6
Reload Register L7
Reload Register H7
Reload Register L8
Reload Register H8
Reload Register L9
Reload Register H9
Reload Register LA
Reload Register HA
Reload Register LB
Reload Register HB
Reload Register LC
Reload Register HC
Reload Register LD
Reload Register HD
Reload Register LE
Reload Register HE
Reload Register LF
Reload Register HF
Input Capture Data Register 0
Input Capture Data Register 0
Input Capture Data Register 1
Input Capture Data Register 1
30
Abbrevia-
tion
PRLL0
PRLH0
PRLL1
PRLH1
PRLL2
PRLH2
PRLL3
PRLH3
PRLL4
PRLH4
PRLL5
PRLH5
PRLL6
PRLH6
PRLL7
PRLH7
PRLL8
PRLH8
PRLL9
PRLH9
PRLLA
PRLHA
PRLLB
PRLHB
PRLLC
PRLHC
PRLLD
PRLHD
PRLLE
PRLHE
PRLLF
PRLHF
IPCP0
IPCP0
IPCP1
IPCP1
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
Resource name
16-bit PPG 0/1
16-bit PPG 2/3
16-bit PPG 4/5
16-bit PPG 6/7
16-bit PPG 8/9
16-bit PPG A/B
16-bit PPG C/D
16-bit PPG E/F
Input Capture 0/1
Initial value
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
(Continued)




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