TNY289P (Power Integrations)
(TNY284 - TNY290) Off-Line Switcher

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TNY284-290
TinySwitch-4 Family
Energy-Efficient, Off-Line Switcher with
Line Compensated Overload Power
Product Highlights
Lowest System Cost with Enhanced Flexibility
725 V rated MOSFET
Increases BV de-rating margin
Line compensated overload power – no additional components
Dramatically reduces max overload variation over universal input
voltage range
±5% turn on UV threshold: line voltage sense with single external
resistor
Simple ON/OFF control, no loop compensation needed
Selectable current limit through BP/M capacitor value
Higher current limit extends peak power or, in open frame
applications, maximum continuous power
Lower current limit improves efficiency in enclosed adapters/
chargers
Allows optimum TinySwitch-4 choice by swapping devices with
no other circuit redesign
Tight I2f parameter tolerance reduces system cost
Maximizes MOSFET and magnetics utilization
ON-time extension – extends low-line regulation range/hold-up time
to reduce input bulk capacitance
Self-biased: no bias winding or bias components
Frequency jittering reduces EMI filter costs
Pin-out simplifies heat sinking to the PCB
SOURCE pins are electrically quiet for low EMI
Enhanced Safety and Reliability Features
Accurate hysteretic thermal shutdown protection with automatic
recovery eliminates need for manual reset
Auto-restart delivers <3% of maximum power in short-circuit and
open loop fault conditions
Output overvoltage shutdown with optional Zener
Fast AC reset with optional UV external resistor
Very low component count enhances reliability and enables
single-sided printed circuit board layout
High bandwidth provides fast turn-on with no overshoot and
excellent transient load response
Extended creepage between DRAIN and all other pins improves field
reliability
EcoSmart™– Extremely Energy Efficient
Easily meets all global energy efficiency regulations
No-load <30 mW with bias winding, <150 mW at 265 VAC without
bias winding
ON/OFF control provides constant efficiency down to very light loads
– ideal for mandatory CEC regulations and EuP standby requirements
Applications
PC Standby and other auxiliary supplies
DVD/PVR and other low power set top decoders
Supplies for appliances, industrial systems, metering, etc
Chargers/adapters for cell/cordless phones, PDAs, digital cameras,
MP3/portable audio, shavers, etc.
+
Wide-Range
High-Voltage
DC Input
D
TinySwitch-4
S
EN/UV
BP/M
Figure 1. Typical Standby Application.
+
DC
Output
PI-6578-020915
SO-8C (D Package)
DIP-8C (P Package)
Figure 2. Package Options.
eSOP-12B (K Package)
Output Power Table
Product3
230 VAC ± 15%
Adapter1
Peak or
Open
Frame2
85-265 VAC
Adapter1
Peak or
Open
Frame2
TNY284P/D/K
TNY285P/D
TNY285K
6W
8.5 W
11 W
11 W
15 W
15 W
5W
6W
7.5 W
8.5 W
11.5 W
11.5 W
TNY286P/D
10 W
19 W
7W
15 W
TNY286K
13.5 W
19 W
9.5 W
15 W
TNY287P
13 W
23.5 W
8W
18 W
TNY287D
TNY287K
TNY288P
TNY288D
TNY288K
11.5 W
18 W
16 W
14.5 W
23 W
23.5 W
23.5 W
28 W
26 W
28 W
7W
11 W
10 W
9W
14.5 W
18 W
18 W
21.5 W
19.5 W
21.5 W
TNY289P
18 W
32 W
12 W
25 W
TNY289K
25 W
32 W
17 W
25 W
TNY290P
20 W
36.5 W
14 W
28.5 W
TNY290K
28 W
36.5 W
20 W
28.5 W
Table 1. Output Power Table.
Notes:
1. Minimum continuous power in a typical non-ventilated enclosed adapter
measured at +50 °C ambient. Use of an external heat sink will increase power
capability.
2. Minimum peak power capability in any design or minimum continuous power
in an open frame design (see Key Applications Considerations).
3. Packages: P: DIP-8C, D: SO-8C, K: eSOP-12B. See Part Ordering Information.
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This Product is Covered by Patents and/or Pending Patent Applications.
August 2016


TNY289P (Power Integrations)
(TNY284 - TNY290) Off-Line Switcher

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TNY284-290
BYPASS/
MULTI-FUNCTION
(BP/M)
25 µA
115 µA
ENABLE
ENABLE/
UNDER-
VOLTAGE
(EN/UV)
1.0 V + VT
1.0 V
LINE UNDERVOLTAGE
FAULT
PRESENT
AUTO-
RESTART
COUNTER
RESET
JITTER
CLOCK
DCMAX
OSCILLATOR
6.4 V
OVP
LATCH
REGULATOR
5.85 V
DRAIN
(D)
BYPASS PIN
+ UNDER-VOLTAGE
BYPASS
CAPACITOR
-
SELECT AND
CURRENT
5.85 V
4.9 V
VILIMIT
LIMIT STATE
MACHINE
LINE
COMPENSATION
CURRENT LIMIT
COMPARATOR
-
+
THERMAL
SHUTDOWN
SQ
RQ
LEADING
EDGE
BLANKING
Figure 3. Functional Block Diagram.
Pin Functional Description
DRAIN (D) Pin:
This pin is the power MOSFET drain connection. It provides internal
operating current for both start-up and steady-state operation.
BYPASS/MULTI-FUNCTION (BP/M) Pin:
This pin has multiple functions:
It is the connection point for an external bypass capacitor for the
internally generated 5.85 V supply.
It is a mode selector for the current limit value, depending on the
value of the capacitance added. Use of a 0.1 μF capacitor results
in the standard current limit value. Use of a 1 μF capacitor results
in the current limit being reduced to that of the next smaller device
size. Use of a 10 μF capacitor results in the current limit being
increased to that of the next larger device size for TNY285-290.
It provides a shutdown function. When the current into the bypass
pin exceeds ISD, the device latches off until the BP/M voltage
drops below 4.9 V, during a power-down or, when the UV function
is employed with external resistors connected to the BP/UV pin, by
taking the UV/EN pin current below IUV minus the reset hysteresis
(Typ. 18.75 μA). This can be used to provide an output overvolt-
age function with a Zener connected from the BYPASS/MULTI-
FUNCTIONAL pin to a bias winding supply.
SOURCE
(S)
PI-6639-072115
D Package (SO-8C)
EN/UV 1
BP/M 2
D4
8S
7S
6S
5 S P Package (DIP-8C)
EN/UV 1
8S
Exposed Pad (On Bottom)
Internally Connected to
SOURCE Pin
K Package
(eSOP-12B)
EN/UV 1
BP/M 2
N/C 3
N/C 4
D6
BP/M 2
D4
12 S
11 S
10 S
9S
8S
7S
7S
6S
5S
PI-6577-021015
Figure 4. Pin Configuration.
2
Rev. D 08/16
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TNY289P (Power Integrations)
(TNY284 - TNY290) Off-Line Switcher

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TNY284-290
ENABLE/UNDERVOLTAGE (EN/UV) Pin:
This pin has dual functions: enable input and line undervoltage sense.
During normal operation, switching of the power MOSFET is controlled
by this pin. MOSFET switching is terminated when a current greater
than a threshold current is drawn from this pin. Switching resumes
when the current being pulled from the pin drops to less than a
threshold current. A modulation of the threshold current reduces
group pulsing. The threshold current is between 75 μA and 115 μA.
The ENABLE/UNDERVOLTAGE pin also senses line undervoltage
conditions through an external resistor connected to the DC line
voltage. If there is no external resistor connected to this pin,
TinySwitch-4 detects its absence and disables the line undervoltage
function.
SOURCE (S) Pin:
This pin is internally connected to the output MOSFET source for
high-voltage power return and control circuit common.
TinySwitch-4 Functional Description
TinySwitch-4 combines a high-voltage power MOSFET switch with a
power supply controller in one device. Unlike conventional PWM (pulse
width modulator) controllers, it uses a simple
ON/OFF control to regulate the output voltage.
The controller consists of an oscillator, enable circuit (sense and logic),
current limit state machine, 5.85 V regulator, BYPASS/MULTI-
FUNCTION pin undervoltage, overvoltage circuit, and current limit
selection circuitry, over-temperature protection, current limit circuit,
leading edge blanking, and a 725 V power MOSFET. TinySwitch-4
incorporates additional circuitry for line undervoltage sense,
auto-restart, adaptive switching cycle on-time extension, and
frequency jitter. Figure 3 shows the functional block diagram with
the most important features.
Oscillator
The typical oscillator frequency is internally set to an average of
132 kHz. Two signals are generated from the oscillator: the maximum
duty cycle signal (DCMAX) and the clock signal that indicates the
beginning of each cycle.
The oscillator incorporates circuitry that introduces a small amount of
frequency jitter, typically 8 kHz peak-to-peak, to minimize EMI
emission. The modulation rate of the frequency jitter is set to 1 kHz
to optimize EMI reduction for both average and quasi-peak emissions.
600
500
VDRAIN
400
300
200
100
0
136 kHz
128 kHz
0
Figure 5. Frequency Jitter.
5
Time (µs)
10
The frequency jitter should be measured with the oscilloscope
triggered at the falling edge of the DRAIN waveform. The waveform
in Figure 5 illustrates the frequency jitter.
Enable Input and Current Limit State Machine
The enable input circuit at the ENABLE/UNDERVOLTAGE pin consists
of a low impedance source follower output set at 1.2 V. The current
through the source follower is limited to 115 μA. When the current
out of this pin exceeds the threshold current, a low logic level (disable)
is generated at the output of the enable circuit, until the current out
of this pin is reduced to less than the threshold current. This enable
circuit output is sampled at the beginning of each cycle on the rising
edge of the clock signal. If high, the power MOSFET is turned on for
that cycle (enabled). If low, the power MOSFET remains off (disabled).
Since the sampling is done only at the beginning of each cycle,
subsequent changes in the ENABLE/UNDER- VOLTAGE pin voltage or
current during the remainder of the cycle are ignored.
The current limit state machine reduces the current limit by discrete
amounts at light loads when TinySwitch-4 is likely to switch in the
audible frequency range. The lower current limit raises the effective
switching frequency above the audio range and reduces the trans-
former flux density, including the associated audible noise. The state
machine monitors the sequence of enable events to determine the
load condition and adjusts the current limit level accordingly in
discrete amounts.
Under most operating conditions (except when close to no-load), the
low impedance of the source follower keeps the voltage on the
ENABLE/UNDERVOLTAGE pin from going much below 1.2 V in the
disabled state. This improves the response time of the optocoupler
that is usually connected to this pin.
5.85 V Regulator and 6.4 V Shunt Voltage Clamp
The 5.85 V regulator charges the bypass capacitor connected to the
BYPASS pin to 5.85 V by drawing a current from the voltage on the
DRAIN pin whenever the MOSFET is off. The BYPASS/MULTI-
FUNCTION pin is the internal supply voltage node. When the
MOSFET is on, the device operates from the energy stored in the
bypass capacitor. Extremely low power consumption of the internal
circuitry allows TinySwitch-4 to operate continuously from current it
takes from the DRAIN pin. A bypass capacitor value of 0.1 μF is
sufficient for both high frequency decoupling and energy storage.
In addition, there is a 6.4 V shunt regulator clamping the BYPASS/
MULTI-FUNCTION pin at 6.4 V when current is provided to the
BYPASS/MULTI-FUNCTION pin through an external resistor. This
facilitates powering of TinySwitch-4 externally through a bias winding
to decrease the no-load consumption to well below 50 mW.
BYPASS/MULTI-FUNCTION Pin Undervoltage
The BYPASS/MULTI-FUNCTION pin undervoltage circuitry disables the
power MOSFET when the BYPASS/MULTI-FUNCTION pin voltage drops
below 4.9 V in steady state operation. Once the BYPASS/MULTI-
FUNCTION pin voltage drops below 4.9 V in steady state operation, it
must rise back to 5.85 V to enable (turn-on) the power MOSFET.
Over-Temperature Protection
The thermal shutdown circuitry senses the die temperature. The
threshold is typically set at 142 °C with 75 °C hysteresis. When the
die temperature rises above this threshold the power MOSFET is
disabled and remains disabled until the die temperature falls by 75 °C,
at which point it is re-enabled. A large hysteresis of 75 °C (typical) is
provided to prevent over-heating of the PC board due to a continuous
fault condition.
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3
Rev. D 08/16


TNY289P (Power Integrations)
(TNY284 - TNY290) Off-Line Switcher

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TNY284-290
Current Limit
The current limit circuit senses the current in the power MOSFET.
When this current exceeds the internal threshold (ILIMIT), the power
MOSFET is turned off for the remainder of that cycle. The current
limit state machine reduces the current limit threshold by discrete
amounts under medium and light loads.
The leading edge blanking circuit inhibits the current limit comparator
for a short time (tLEB) after the power MOSFET is turned on. This
leading edge blanking time has been set so that current spikes
caused by capacitance and secondary-side rectifier reverse recovery
time will not cause premature termination of the switching pulse.
Auto-Restart
In the event of a fault condition such as output overload, output
short-circuit, or an open loop condition, TinySwitch-4 enters into
auto-restart operation. An internal counter clocked by the oscillator
is reset every time the ENABLE/UNDERVOLTAGE pin is pulled low.
If the ENABLE/UNDERVOLTAGE pin is not pulled low for 64 ms, the
power MOSFET switching is normally disabled for 2.5 seconds (except
in the case of line undervoltage condition, in which case it is disabled
until the condition is removed). The auto-restart alternately enables
and disables the switching of the power MOSFET until the fault
condition is removed. Figure 6 illustrates auto-restart circuit
operation in the presence of an output short-circuit.
In the event of a line undervoltage condition, the switching of the
power MOSFET is disabled beyond its normal 2.5 seconds until the
line undervoltage condition ends.
Adaptive Switching Cycle On-Time Extension
Adaptive switching cycle on-time extension keeps the cycle on until
current limit is reached, instead of prematurely terminating after the
DCMAX signal goes low. This feature reduces the minimum input
voltage required to maintain regulation, extending hold-up time and
minimizing the size of bulk capacitor required. The on-time extension
is disabled during the start-up of the power supply, until the power
supply output reaches regulation.
Line Undervoltage Sense Circuit
The DC line voltage can be monitored by connecting an external
resistor from the DC line to the ENABLE/UNDERVOLTAGE pin. During
power-up or when the switching of the power MOSFET is disabled in
auto-restart, the current into the ENABLE/UNDERVOLTAGE pin must
exceed 25 μA to initiate switching of the power MOSFET. During
power-up, this is accomplished by holding the BYPASS/MULTI-
300
200
100
0
10
5
0
VDRAIN
VDC-OUTPUT
0 2500
Time (ms)
Figure 6. Auto-Restart Operation.
5000
FUNCTION pin to 4.9 V while the line undervoltage condition exists.
The BYPASS/MULTI-FUNCTION pin then rises from 4.9 V to 5.85 V
when the line undervoltage condition goes away. When the switching
of the power MOSFET is disabled in auto-restart mode and a line
undervoltage condition exists, the auto-restart counter is stopped.
This stretches the disable time beyond its normal 2.5 seconds until
the line undervoltage condition ends.
The line undervoltage circuit also detects when there is no external
resistor connected to the ENABLE/UNDERVOLTAGE pin (less than
~2 μA into the pin). In this case the line undervoltage function is
disabled.
TinySwitch-4 Operation
TinySwitch-4 devices operate in the current limit mode. When
enabled, the oscillator turns the power MOSFET on at the beginning
of each cycle. The MOSFET is turned off when the current ramps up
to the current limit or when the DCMAX limit is reached. Since the
highest current limit level and frequency of a TinySwitch-4 design are
constant, the power delivered to the load is proportional to the
primary inductance of the transformer and peak primary current
squared. Hence, designing the supply involves calculating the primary
inductance of the transformer for the maximum output power
required. If the TinySwitch-4 is appropriately chosen for the power
level, the current in the calculated inductance will ramp up to current
limit before the DCMAX limit is reached.
Enable Function
TinySwitch-4 senses the ENABLE/UNDERVOLTAGE pin to determine
whether or not to proceed with the next switching cycle. The
sequence of cycles is used to determine the current limit. Once a
cycle is started, it always completes the cycle (even when the
ENABLE/UNDERVOLTAGE pin changes state half way through the
cycle). This operation results in a power supply in which the output
voltage ripple is determined by the output capacitor, amount of
energy per switch cycle and the delay of the feedback.
The ENABLE/UNDERVOLTAGE pin signal is generated on the
secondary by comparing the power supply output voltage with a
reference voltage. The ENABLE/UNDERVOLTAGE pin signal is high
when the power supply output voltage is less than the reference
voltage. In a typical implementation, the ENABLE/UNDERVOLTAGE
pin is driven by an optocoupler. The collector of the optocoupler
transistor is connected to the ENABLE/UNDERVOLTAGE pin and the
emitter is connected to the SOURCE pin. The optocoupler LED is
connected in series with a Zener diode across the DC output voltage
to be regulated. When the output voltage exceeds the target
regulation voltage level (optocoupler LED voltage drop plus Zener
voltage), the optocoupler LED will start to conduct, pulling the
ENABLE/UNDERVOLTAGE pin low. The Zener diode can be replaced
by a TL431 reference circuit for improved accuracy.
ON/OFF Operation with Current Limit State Machine
The internal clock of the TinySwitch-4 runs all the time. At the
beginning of each clock cycle, it samples the ENABLE/UNDERVOLTAGE
pin to decide whether or not to implement a switch cycle, and based
on the sequence of samples over multiple cycles, it determines the
appropriate current limit. At high loads, the state machine sets the
current limit to its highest value. At lighter loads, the state machine
sets the current limit to reduced values.
At near maximum load, TinySwitch-4 will conduct during nearly all of
its clock cycles (Figure 7). At slightly lower load, it will “skip”
additional cycles in order to maintain voltage regulation at the power
supply output (Figure 8). At medium loads, cycles will be skipped and
the current limit will be reduced (Figure 9). At very light loads, the
current limit will be reduced even further (Figure 10). Only a small
4
Rev. D 08/16
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(TNY284 - TNY290) Off-Line Switcher

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TNY284-290
percentage of cycles will occur to satisfy the power consumption of
the power supply.
The response time of the ON/OFF control scheme is very fast
compared to PWM control. This provides tight regulation and
excellent transient response.
Power-Up/Down
The TinySwitch-4 requires only a 0.1 μF capacitor on the BYPASS/
MULTI-FUNCTION pin to operate with standard current limit.
Because of its small size, the time to charge this capacitor is kept to
an absolute minimum, typically 0.6 ms. The time to charge will vary
in proportion to the BYPASS/MULTI-FUNCTION pin capacitor value
when selecting different current limits. Due to the high bandwidth
of the ON/OFF feedback, there is no overshoot at the power supply
output. When an external resistor (4 MW) is connected from the
positive DC input to the ENABLE/UNDERVOLTAGE pin, the power
MOSFET switching will be delayed during power-up until the DC line
voltage exceeds the threshold (100 V). Figures 11 and 12 show the
power-up timing waveform in applications with and without an
external resistor (4 MW) connected to the ENABLE/UNDERVOLTAGE
VEN
CLOCK
DCMAX
VEN
CLOCK
DCMAX
IDRAIN
IDRAIN
VDRAIN
Figure 7. Operation at Near Maximum Loading.
VEN
CLOCK
DCMAX
IDRAIN
VDRAIN
PI-2749-021015
Figure 8. Operation at Moderately Heavy Loading.
PI-2667-021015
VEN
CLOCK
DCMAX
IDRAIN
VDRAIN
Figure 9. Operation at Medium Loading.
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PI-2377-021015
VDRAIN
Figure 10. Operation at Very Light Load.
PI-2661-021015
5
Rev. D 08/16


TNY289P (Power Integrations)
(TNY284 - TNY290) Off-Line Switcher

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TNY284-290
pin. Under start-up and overload conditions, when the conduction
time is less than 400 ns, the device reduces the switching frequency
to maintain control of the peak drain current.
During power-down, when an external resistor is used, the power
MOSFET will switch for 64 ms after the output loses regulation. The
power MOSFET will then remain off without any glitches since the
undervoltage function prohibits restart when the line voltage is low.
Figure 13 illustrates a typical power-down timing waveform. Figure 14
illustrates a very slow power-down timing waveform as in standby
applications. The external resistor (4 MW) is connected to the
ENABLE/UNDERVOLTAGE pin in this case to prevent unwanted
restarts.
No bias winding is needed to provide power to the chip because it
draws the power directly from the DRAIN pin (see Functional
Description). This has two main benefits. First, for a nominal
application, this eliminates the cost of a bias winding and associated
components. Secondly, for battery charger applications, the
current-voltage characteristic often allows the output voltage to fall
close to 0 V while still delivering power. TinySwitch-4 accomplishes
this without a forward bias winding and its many associated
components. For applications that require very low no-load power
consumption (50 mW), a resistor from a bias winding to the BYPASS/
MULTI-FUNCTION pin can provide the power to the chip. The
minimum recommended current supplied is 1 mA. The BYPASS/
MULTI-FUNCTION pin in this case will be clamped at 6.4 V. This
method will eliminate the power draw from the DRAIN pin, thereby
reducing the no-load power consumption and improving full-load
efficiency.
Current Limit Operation
Each switching cycle is terminated when the DRAIN current reaches
the current limit of the device. Current limit operation provides good
line ripple rejection and relatively constant power delivery independent
of input voltage.
200
100
VDC-INPUT
0
10
5 VBYPASS
0
400
200
0
0
VDRAIN
1
Time (ms)
2
Figure 11. Power-Up with Optional External UV Resistor (4 MW)
Connected to EN/UV Pin.
200
100
0
VDC-INPUT
10
5 VBYPASS
0
400
200 VDRAIN
0
01 2
Time (ms)
Figure 12. Power-Up without Optional External UV Resistor
Connected to EN/UV Pin.
200
100
VDC-INPUT
0
400
300
200 VDRAIN
100
0
0 .5
Time (s)
Figure 13. Normal Power-Down Timing (without UV).
200
100
VDC-INPUT
0
400
300
200 VDRAIN
100
0
10
2.5
Time (s)
5
Figure 14. Slow Power-Down Timing with Optional External (4 MW)
UV Resistor Connected to EN/UV Pin.
6
Rev. D 08/16
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TNY289P (Power Integrations)
(TNY284 - TNY290) Off-Line Switcher

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TNY284-290
BYPASS/MULTI-FUNCTION Pin Capacitor
The BYPASS/MULTI-FUNCTION pin can use a ceramic capacitor as
small as 0.1 μF for decoupling the internal power supply of the
device. A larger capacitor size can be used to adjust the current limit.
For TNY285-290, a 1 μF BYPASS/MULTI-FUNCTIONAL pin capacitor
will select a lower current limit equal to the standard current limit of
the next smaller device and a 10 μF BYPASS/MULTI-FUNCTIONAL pin
capacitor will select a higher current limit equal to the standard
current limit of the next larger device. The higher current limit level
of the TNY290 is set to 850 mA typical. The TNY284 MOSFET does
not have the capability for increased current limit so this feature is
not available in this device.
40
35
30
25
TNY290
TNY280
20
85 100 115 130 145 160 175 190 205 220 235 250 265
Input Voltage (VAC)
Figure 15. Comparison of Maximum Overpower for TinySwitch-4 and
TinySwitch-III as a Function of Input Voltage (Data Collected from
RDK-295 20 W Reference Design).
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Rev. D 08/16


TNY289P (Power Integrations)
(TNY284 - TNY290) Off-Line Switcher

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TNY284-290
BR1
2KBP10M
1000 V
L1
10 mH
RT1
6
C1
100 nF
F1 275 VAC
5A
90 - 295
VAC
C2
68 µF
450 V
C3
2.2 nF
1 kV
VR1
P6KE150A
R12
2 M
R13
2 M
R1
22
1/2 W
D1
UF4006-E3
D
TinySwitch-4
U1
TNY290PG
S
EN/UV
BP/M
C16
100 nF
100 V
C13
2.2 nF
250 VAC
1 9,10
R3 C5
4.7 1.5 nF
1/2 W 100 V
D4
STPS30L60CT
C6, C7
1500 µF
10 V
7,8
4
35
T1
EE22
R15
1.5 M
1/8 W
D3
1N4937
R2
8.2
C4
100 µF
50 V
VR2
1N5254
27 V
R4
30 k
1/8 W
C9
10 µF
16 V
U3
PC817
C11
2.2 µF
50 V
C8
1000 µF
10 V
L2
2.2 µH
R9
47
R6
10 k
1%
5 V, 4 A
RTN
R8
1 k
1/8 W
R14 C10
3.3 k47 nF
1/8 W 100 V
U2
TL431
R7
10 k
1%
PI-6559-021015
In a PC standby application input stage
will be part of main power supply input
Figure 16. TNY290PG, 5 V, 4 A Universal Input Power Supply.
Applications Example
The circuit shown in Figure 16 is a low cost, high efficiency, flyback
power supply designed for 5 V, 4 A output from universal input using
the TNY290PG.
The supply features undervoltage lockout, primary sensed output
overvoltage latching shutdown protection, high efficiency (>80%),
and very low no-load consumption (<50 mW at 265 VAC). Output
regulation is accomplished using a simple Zener reference and
optocoupler feedback.
The rectified and filtered input voltage is applied to the primary
winding of T1. The other side of the transformer primary is driven by
the integrated MOSFET in U1. Diode D1, C3, R1, and VR1 comprise
the clamp circuit, limiting the leakage inductance turn-off voltage
spike on the DRAIN pin to a safe value.
The output voltage is regulated by TL431 U2. When the output
voltage ripple exceeds the sum of the U2 (CATHODE D6) and
optocoupler LED forward drop, current will flow in the optocoupler LED.
This will cause the transistor of the optocoupler to sink current.
When this current exceeds the ENABLE pin threshold current the next
switching cycle is inhibited. When the output voltage falls below the
feedback threshold, a conduction cycle is allowed to occur and, by
adjusting the number of enabled cycles, output regulation is
maintained. As the load reduces, the number of enabled cycles
decreases, lowering the effective switching frequency and scaling
switching losses with load. This provides almost constant efficiency
down to very light loads, ideal for meeting energy efficiency
requirements.
As the TinySwitch-4 devices are completely self-powered, there is no
requirement for an auxiliary or bias winding on the transformer.
However by adding a bias winding, the output overvoltage protection
feature can be configured, protecting the load against open feedback
loop faults.
When an overvoltage condition occurs, such that bias voltage
exceeds the sum of VR2 and the BYPASS/MULTIFUNCTION (BYPASS/
MULTI-FUNCTIONAL) pin voltage, current begins to flow into the
BYPASS/MULTI-FUNCTIONAL pin. When this current exceeds ISD the
internal latching shutdown circuit in TinySwitch-4 is activated. This
condition is reset when the ENABLE/UNDERVOLTAGE pin current
flowing through R12 and R13 drop below 18.75 mA each AC line
half-cycle. The configuration of Figure 16 is therefore non-latching for
an overvoltage fault. Latching overvoltage protection can be
achieved by connecting R12 and R13 to the positive terminal of C2,
at the expense of higher standby consumption. In the example
shown, on opening the loop, the OVP trips at an output of 17 V.
For lower no-load input power consumption, the bias winding may
also be used to supply the TinySwitch-4 device. Resistor R4 feeds
current into the BYPASS/MULTI-FUNCTIONAL pin, inhibiting the
internal high-voltage current source that normally maintains the
BYPASS/MULTI-FUNCTIONAL pin capacitor voltage (C7) during the
internal MOSFET off-time. This reduces the no-load consumption of
this design from 140 mW to 40 mW at 265 VAC.
Undervoltage lockout is configured by R5 connected between the DC
bus and ENABLE/UNDERVOLTAGE pin of U1. When present, switching
is inhibited until the current in the ENABLE/UNDERVOLTAGE pin
8
Rev. D 08/16
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TNY284-290
exceeds 25 μA. This allows the start-up voltage to be programmed
within the normal operating input voltage range, preventing glitching
of the output under abnormal low voltage conditions and also on
removal of the AC input.
In addition to the simple input pi filter (C1, L1, C2) for differential
mode EMI, this design makes use of E-Shield™ shielding techniques
in the transformer to reduce common mode EMI displacement
currents, and R2 and C4 as a damping network to reduce high
frequency transformer ringing. These techniques, combined with the
frequency jitter of TNY288, give excellent conducted and radiated
EMI performance with this design achieving >12 dBμV of margin to
EN55022 Class B conducted EMI limits.
For design flexibility the value of C7 can be selected to pick one of
the 3 current limits options in U1. This allows the designer to select
the current limit appropriate for the application.
Standard current limit (ILIMIT) is selected with a 0.1 μF BYPASS/
MULTI-FUNCTIONAL pin capacitor and is the normal choice for
typical enclosed adapter applications.
When a 1 μF BYPASS/MULTI-FUNCTIONAL pin capacitor is used,
the current limit is reduced (ILIMITred or ILIMIT-1) offering reduced RMS
device currents and therefore improved efficiency, but at the
expense of maximum power capability. This is ideal for thermally
challenging designs where dissipation must be minimized.
When a 10 μF BYPASS/MULTI-FUNCTIONAL pin capacitor is used,
the current limit is increased (ILIMITinc or ILIMIT+1), extending the
power capability for applications requiring higher peak power or
continuous power where the thermal conditions allow.
Further flexibility comes from the current limits between adjacent
TinySwitch-4 family members being compatible. The reduced current
limit of a given device is equal to the standard current limit of the
next smaller device and the increased current limit is equal to the
standard current limit of the next larger device.
Key Application Considerations
TinySwitch-4 vs. TinySwitch-III
Table 2 compares the features and performance differences between
TinySwitch-4 and TinySwitch-III. TinySwitch-4 is pin compatible to
TinySwitch-III with improved features. It requires minimum design
effort to adapt into a new design. In addition to the feature
enhancement, TinySwitch-4 offers two new packages; eSOP-12B (K)
and SO-8C (D) to meet various application requirements.
Function
BVDSS
Line Compensated OCP
Typical OCP Change from
85 VAC to 265 VAC
UV Threshold
VBP Reset Voltage
Packages
TinySwitch-III
700 V
N/A
TinySwitch-4
725 V
Yes
>40%
<15%
25 mA ±10%
2.6 V Typical
DIP-8C (P),
SMD-8C (G)
25 mA ±5%
3.0 V Typical
DIP-8C (P),
eSOP-12B (K),
SO-8C (D)
Table 2. Comparisons Between TinySwitch-III and TinySwitch-4.
TinySwitch-4 Design Considerations
Output Power Table
The data sheet output power table (Table 1) represents the minimum
practical continuous output power level that can be obtained under
the following assumed conditions:
1. The minimum DC input voltage is 100 V or higher for 85 VAC
input, or 220 V or higher for 230 VAC input or 115 VAC with a
voltage doubler. The value of the input capacitance should be
sized to meet these criteria for AC input designs.
2. Efficiency of 75%.
3. Minimum data sheet value of I2f.
4. Transformer primary inductance tolerance of ±10%.
5. Reflected output voltage (VOR) of 135 V.
6. Voltage only output of 12 V with a fast PN rectifier diode.
7. Continuous conduction mode operation with transient KP* value
of 0.25.
8. Increased current limit is selected for peak and open frame
power columns and standard current limit for adapter columns.
9. The part is board mounted with SOURCE pins soldered to a
sufficient area of copper and/or a heat sink is used to keep the
SOURCE pin temperature at or below 110 °C.
10. Ambient temperature of 50 °C for open frame designs and 40 °C
for sealed adapters.
*Below a value of 1, KP is the ratio of ripple to peak primary current.
To prevent reduced power capability due to premature termination of
switching cycles a transient KP limit of ≥0.25 is recommended. This
prevents the initial current limit (IINIT) from being exceeded at
MOSFET turn-on.
For reference, Table 3 provides the minimum practical power
delivered from each family member at the three selectable current
limit values. This assumes open frame operation (not thermally
limited) and otherwise the same conditions as listed above. These
numbers are useful to identify the correct current limit to select for a
given device and output power requirement.
Overvoltage Protection
The output overvoltage protection provided by TinySwitch-4 uses an
internal latch that is triggered by a threshold current of approximately
5.5 mA into the BYPASS/MULTI-FUNCTIONAL pin. In addition to an
internal filter, the BYPASS/MULTI-FUNCTIONAL pin capacitor forms an
external filter providing noise immunity from inadvertent triggering.
For the bypass capacitor to be effective as a high frequency filter, the
capacitor should be located as close as possible to the SOURCE and
BYPASS/MULTI-FUNCTIONAL pins of the device.
Peak Output Power Table
Product
230 VAC ± 15%
85-265 VAC
ILIMIT-1 ILIMIT ILIMIT+1 ILIMIT-1 ILIMIT ILIMIT+1
TNY284P
TNY285P
TNY286P
TNY287P
TNY288P
TNY289P
TNY290P
9.1 W 10.9 W 9.1 W 7.1 W 8.5 W 7.1 W
10.8 W 12 W 15.1 W 8.4 W 9.3 W 11.8 W
11.8 W 15.3 W 19.4 W 9.2 W 11.9 W 15.1 W
15.1 W 19.6 W 23.7 W 11.8 W 15.3 W 18.5 W
19.4 W 24 W 28 W 15.1 W 18.6 W 21.8 W
23.7 W 28.4 W 32.2 W 18.5 W 22 W 25.2 W
28 W 32.7 W 36.6 W 21.8 W 25.4 W 28.5 W
Table 3. Minimum Practical Power at Three Selectable Current Limit Levels.
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TNY289P (Power Integrations)
(TNY284 - TNY290) Off-Line Switcher

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TNY284-290
For best performance of the OVP function, it is recommended that a
relatively high bias winding voltage is used, in the range of 15 V - 30 V.
This minimizes the error voltage on the bias winding due to leakage
inductance and also ensures adequate voltage during no-load
operation from which to supply the BYPASS/MULTI-FUNCTIONAL pin
for reduced no-load consumption.
Selecting the Zener diode voltage to be approximately 6 V above the
bias winding voltage (28 V for 22 V bias winding) gives good OVP
performance for most designs, but can be adjusted to compensate
for variations in leakage inductance. Adding additional filtering can
be achieved by inserting a low value (10 W to 47 W) resistor in series
with the bias winding diode and/or the OVP Zener as shown by R7 and
R3 in Figure 16. The resistor in series with the OVP Zener also limits
the maximum current into the BYPASS/MULTI-FUNCTIONAL pin.
Reducing No-load Consumption
As TinySwitch-4 is self-powered from the BYPASS/MULTI-
FUNCTIONAL pin capacitor, there is no need for an auxiliary or bias
winding to be provided on the transformer for this purpose. Typical
no-load consumption when self-powered is <150 mW at 265 VAC
input. The addition of a bias winding can reduce this down to <50 mW
by supplying the TinySwitch-4 from the lower bias voltage and
inhibiting the internal high-voltage current source. To achieve this,
select the value of the resistor (R8 in Figure 16) to provide the data
sheet DRAIN supply current. In practice, due to the reduction of the
bias voltage at low load, start with a value equal to 40% greater than
the data sheet maximum current, and then increase the value of the
resistor to give the lowest no-load consumption.
Audible Noise
The cycle skipping mode of operation used in TinySwitch-4 can
generate audio frequency components in the transformer. To limit
this audible noise generation the transformer should be designed
such that the peak core flux density is below 3000 Gauss (300 mT).
Following this guideline and using the standard transformer production
technique of dip varnishing practically eliminates audible noise.
Vacuum impregnation of the transformer should not be used due to
the high primary capacitance and increased losses that result. Higher
flux densities are possible, however careful evaluation of the audible
noise performance should be made using production transformer
samples before approving the design.
Ceramic capacitors that use dielectrics such as Z5U, when used in
clamp circuits, may also generate audio noise. If this is the case, try
replacing them with a capacitor having a different dielectric or
construction, for example a film type.
TinySwitch-4 Layout Considerations
Layout
See Figure 17 for a recommended circuit board layout for TinySwitch-4.
Single Point Grounding
Use a single point ground connection from the input filter capacitor to
the area of copper connected to the SOURCE pins.
Bypass Capacitor (CBP)
The BYPASS/MULTI-FUNCTIONAL pin capacitor must be located
directly adjacent to the BYPASS/MULTI-FUNCTIONAL and SOURCE
pins.
If a 0.1 mF bypass capacitor has been selected it should be a high
frequency ceramic type (e.g. with X7R dielectric). It must be placed
directly between the ENABLE and SOURCE pins to filter external noise
entering the BYPASS pin. If a 1 mF or 10 mF bypass capacitor was
selected then an additional 0.1 mF capacitor should be added across
BYPASS and SOURCE pins to provide noise filtering (see Figure 17).
ENABLE/UNDERVOLTAGE Pin
Keep traces connected to the ENABLE/UNDERVOLTAGE pin short and,
as far as is practical, away from all other traces and nodes above
source potential including, but not limited to, the bypass, drain and
bias supply diode anode nodes.
Primary Loop Area
The area of the primary loop that connects the input filter capacitor,
transformer primary and TinySwitch-4 should be kept as small as
possible.
Primary Clamp Circuit
A clamp is used to limit peak voltage on the DRAIN pin at turn-off.
This can be achieved by using an RCD clamp or a Zener (~200 V) and
diode clamp across the primary winding. To reduce EMI, minimize
the loop from the clamp components to the transformer and
TinySwitch-4.
Thermal Considerations
The SOURCE pins are internally connected to the IC lead frame and
provide the main path to remove heat from the device. Therefore all
the SOURCE pins should be connected to a copper area underneath
the TinySwitch-4 to act not only as a single point ground, but also as
a heat sink. As this area is connected to the quiet source node, this
area should be maximized for good heat sinking. Similarly for axial
output diodes, maximize the PCB area connected to the cathode.
Y Capacitor
The placement of the Y capacitor should be directly from the primary
input filter capacitor positive terminal to the common/ return terminal
of the transformer secondary. Such a placement will route high
magnitude common mode surge currents away from the TinySwitch-4
device. Note – if an input π (C, L, C) EMI filter is used then the
inductor in the filter should be placed between the negative terminals
of the input filter capacitors.
Optocoupler
Place the optocoupler physically close to the TinySwitch-4 to
minimizing the primary-side trace lengths. Keep the high current,
high-voltage drain and clamp traces away from the optocoupler to
prevent noise pick up.
Output Diode
For best performance, the area of the loop connecting the secondary
winding, the output diode and the output filter capacitor, should be
minimized. In addition, sufficient copper area should be provided at
the anode and cathode terminals of the diode for heat sinking. A
larger area is preferred at the quiet cathode terminal. A large anode
area can increase high frequency radiated EMI.
PC Board Leakage Currents
TinySwitch-4 is designed to optimize energy efficiency across the
power range and particularly in standby/no-load conditions. Current
consumption has therefore been minimized to achieve this performance.
The ENABLE/UNDERVOLTAGE pin under-voltage feature for example
has a low threshold (~1 μA) to detect whether an undervoltage
resistor is present.
Parasitic leakage currents into the ENABLE/UNDERVOLTAGE pin are
normally well below this 1 μA threshold when PC board assembly is in
a well controlled production facility. However, high humidity conditions
together with board and/or package contamination, either from
no-clean flux or other contaminants, can reduce the surface resistivity
enough to allow parasitic currents >1 μA to flow into the ENABLE/
UNDERVOLTAGE pin. These currents can flow from higher voltage
exposed solder pads close to the ENABLE/UNDERVOLTAGE pin such
as the BYPASS/MULTI-FUNCTIONAL pin solder pad preventing
10
Rev. D 08/16
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(TNY284 - TNY290) Off-Line Switcher

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TNY284-290
+
High-Voltage
-
Input Filter Capacitor
TOP VIEW
S
S
S
S
*CHF/CBP
D
BP/M
EN/
UV
CBP
Safety Spacing
Y1-
Capacitor
Maximize hatched copper
areas (
) for optimum
heat sinking
Output
Rectifier
Output Filter
Capacitor
PRI
BIAS
PRI
BIAS
T
r
a
n
s
f
o
r
m
e
r
SEC
Opto-
coupler
- DC +
OUT
*CHF is a 0.1 µF high frequency noise bypass capacitor (the high frequency 0.1 µF capacitor eliminates need for CBP if ILIMIT selection requires 0.1 µF).
PI-6651-021015
Figure 17. Recommended Circuit Board Layout for TinySwitch-4 with Undervoltage Lock Out Resistor.
the design from starting up. Designs that make use of the under-
voltage lockout feature by connecting a resistor from the high-voltage
rail to the ENABLE/UNDERVOLTAGE pin are not affected.
If the contamination levels in the PC board assembly facility are
unknown, the application is open frame or operates in a high pollution
degree environment and the design does not make use of the under-
voltage lockout feature, then an optional 390 kW resistor should be
added from ENABLE/UNDERVOLTAGE pin to SOURCE pin to ensure that
the parasitic leakage current into the ENABLE/UNDERVOLTAGE pin is
well below 1 μA.
Note that typical values for surface insulation resistance (SIR) where
no-clean flux has been applied according to the suppliers’ guidelines
are >>10 MW and do not cause this issue.
Quick Design Checklist
As with any power supply design, all TinySwitch-4 designs should be
verified on the bench to make sure that component specifications are
not exceeded under worst case conditions. The following minimum
set of tests is strongly recommended:
1. Maximum drain voltage – Verify that VDS does not exceed 675 V
at highest input voltage and peak (overload) output power. The
50 V margin to the 725 V BVDSS specification gives margin for
design variation.
2. Maximum drain current – At maximum ambient temperature,
maximum input voltage and peak output (overload) power, verify
drain current waveforms for any signs of transformer saturation
and excessive leading edge current spikes at start-up. Repeat
under steady-state conditions and verify that the leading edge
current spike event is below ILIMIT(MIN) at the end of the t .LEB(MIN)
Under all conditions, the maximum drain current should be below
the specified absolute maximum ratings.
3. Thermal Check – At specified maximum output power, minimum
input voltage and maximum ambient temperature, verify that the
temperature specifications are not exceeded for TinySwitch-4,
transformer, output diode, and output capacitors. Enough
thermal margin should be allowed for part-to-part variation of the
RDS(ON) of TinySwitch-4 as specified in the data sheet. Under
low-line, maximum power, a maximum TinySwitch-4 SOURCE pin
temperature of 110 °C is recommended to allow for these
variations.
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TNY289P (Power Integrations)
(TNY284 - TNY290) Off-Line Switcher

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TNY284-290
Absolute Maximum Ratings1,4
DRAIN Voltage ..........................................................-0.3 V to 725 V
DRAIN Peak Current: TNY284................................400 (750) mA2
TNY285.............................. 560 (1050) mA2
TNY286.............................. 720 (1350) mA2
TNY287.............................. 880 (1650) mA2
TNY288............................ 1040 (1950) mA2
TNY289............................ 1200 (2250) mA2
TNY290............................ 1360 (2550) mA2
EN/UV Voltage ............................................................. -0.3 V to 9 V
EN/UV Current .....................................................................100 mA
BP/M Voltage ............................................................... -0.3 V to 9 V
Storage Temperature ...............................................-65 °C to 150 °C
Maximum Junction Temperature3...............................-40 °C to 150 °C
Lead Temperature4................................................................. 260 °C
Notes:
1. All voltages referenced to SOURCE, TA = 25 °C.
2. The higher peak DRAIN current is allowed while the DRAIN voltage
is simultaneously less than 400 V.
3. Normally limited by internal circuitry.
4. 1/16 in. from case for 5 seconds.
5. Maximum ratings specified may be applied one at a time, without
causing permanent damage to the product. Exposure to Absolute
Rating conditions for extended periods of time may affect product
reliability.
Thermal Resistance
Thermal Resistance: P Package:
(qJA) ....................................... 70 °C/W2; 60 °C/W3
(qJC)1 ....................................................... 11 °C/W
D Package:
(qJA) ..................................... 100 °C/W2; 80 °C/W3
(qJC)1 ....................................................... 30 °C/W
K Package:
(qJA) ....................................... 45 °C/W2; 38 °C/W3
(qJC)4..........................................................2 °C/W
Notes:
1. Measured on the SOURCE pin close to the plastic interface.
2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (610 g/m2) copper clad.
3. Soldered to 1 sq. in. (645 mm2), 2 oz. (610 g/m2) copper clad.
4. The case temperature is measured at the bottom-side exposed pad.
Parameter
Symbol
Control Functions
Output Frequency
in Standard Mode
Maximum Duty Cycle
EN/UV Pin Upper
Turnoff Threshold
Current
EN/UV Pin Voltage
fOSC
DCMAX
IDIS
VEN
IS1
DRAIN Supply Current
IS2
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 18
(Unless Otherwise Specified)
TJ = 25 °C
See Figure 5
Average
Peak-to-peak Jitter
S1 Open
IEN/UV = 25 mA
IEN/UV = -25 mA
EN/UV Current > IDIS
(MOSFET Not Switching) See Note A
EN/UV Open
(MOSFET
Switching at fOSC)
See Note B
TNY284
TNY285
TNY286
TNY287
TNY288
TNY289
TNY290
12
Rev. D 08/16
Min
124
62
-150
1.8
0.8
Typ Max Units
132 140
8
67
-122 -90
2.2 2.6
1.2 1.6
330
360 400
410 440
430 470
510 550
615 650
715 800
875 930
kHz
%
mA
V
mA
mA
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TNY284-290
Parameter
Symbol
Control Functions (cont.)
BP/M Pin
Charge Current
ICH1
ICH2
BP/M Pin Voltage
BP/M Pin
Voltage Hysteresis
BP/M Pin
Shunt Voltage
EN/UV Pin Line Under-
voltage Threshold
EN/UV Pin – Reset
Hysteresis (Following
Latch Off with BP/M Pin
Current >ISD)
Circuit Protection
VBP/M
VBP/MH
VSHUNT
ILUV
Standard Current Limit
(BP/M Capacitor =
0.1 mF) See Note D
ILIMIT
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 18
(Unless Otherwise Specified)
VBP/M = 0 V, TJ = 25 °C
See Note C, D
VBP/M = 4 V, TJ = 25 °C
See Note C, D
See Note C
IBP = 2 mA
TJ = 25 °C
TJ = 25 °C
See Note G
di/dt = 50 mA/ms
TJ = 25 °C
See Note E
di/dt = 55 mA/ms
TJ = 25 °C
See Note E
di/dt = 70 mA/ms
TJ = 25 °C
See Note E
di/dt = 90 mA/ms
TJ = 25 °C
See Note E
di/dt = 110 mA/ms
TJ = 25 °C
See Note E
di/dt = 130 mA/ms
TJ = 25 °C
See Note E
di/dt = 150 mA/ms
TJ = 25 °C
See Note E
TNY284P/D/K
TNY285P/D/K
TNY286P/D/K
TNY287P/D/K
TNY288P/D/K
TNY289P/K
TNY290P/K
Min
-6.5
-4.7
5.6
0.80
6.0
23.75
3
233
256
326
419
512
605
698
Typ
-4.5
-2.8
5.85
0.95
6.4
25
5
250
275
350
450
550
650
750
Max Units
-2.5
-1.4
6.3
1.20
6.85
26.25
mA
V
V
V
mA
8 mA
267
294
374
481 mA
588
695
802
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(TNY284 - TNY290) Off-Line Switcher

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TNY284-290
Parameter
Symbol
Circuit Protection (cont.)
Reduced Current Limit
(BP/M Capacitor =
1 mF) See Note D
ILIMITred
Increased Current Limit
(BP/M Capacitor =
10 mF) See Note D
ILIMITinc
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 18
(Unless Otherwise Specified)
di/dt = 42 mA/ms
TJ = 25 °C
See Note E
di/dt = 50 mA/ms
TJ = 25 °C
See Note E
di/dt = 55 mA/ms
TJ = 25 °C
See Notes E
di/dt = 70 mA/ms
TJ = 25 °C
See Notes E
di/dt = 90 mA/ms
TJ = 25 °C
See Notes E
di/dt = 110 mA/ms
TJ = 25 °C
See Notes E
di/dt = 130 mA/ms
TJ = 25 °C
See Notes E
di/dt = 42 mA/ms
TJ = 25 °C
See Notes E, F
di/dt = 70 mA/ms
TJ = 25 °C
See Notes E
di/dt = 90 mA/ms
TJ = 25 °C
See Notes E
di/dt = 110 mA/ms
TJ = 25 °C
See Notes E
di/dt = 130 mA/ms
TJ = 25 °C
See Notes E
di/dt = 150 mA/ms
TJ = 25 °C
See Notes E
di/dt = 170 mA/ms
TJ = 25 °C
See Notes E
TNY284P/D/K
TNY285P/D/K
TNY286P/D/K
TNY287P/D/K
TNY288P/D/K
TNY289P/K
TNY290P/K
TNY284P/D/K
TNY285P/D/K
TNY286P/D/K
TNY287P/D/K
TNY288P/D/K
TNY289P/K
TNY290P/K
Min Typ
196 210
233 250
256 275
326 350
419 450
512 550
605 650
196 210
326 350
419 450
512 550
605 650
698 750
791 850
Max Units
233
277
305
388 mA
499
610
721
233
388
499
610 mA
721
833
943
14
Rev. D 08/16
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TNY284-290
Parameter
Symbol
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 18
(Unless Otherwise Specified)
Circuit Protection (cont.)
Standard Current
Limit,
I2f
=
I2
LIMIT(TYP)
× fOSC(TYP)
TJ = 25 °C
TNY284-290
Power Coefficient
Reduced Current Limit,
I2f
I2f
=
I2
LIMITred(TYP)
× fOSC(TYP)
TNY284-290
TJ = 25 °C
Increased Current Limit,
I2f
=
I2
LIMITinc(TYP)
× fOSC(TYP)
TJ = 25 °C
TNY284-290
Initial Current Limit
See Figure 21
TJ = 25 °C,
See Note G
TNY284-287
IINIT
See Figure 22
TJ = 25 °C,
See Note G
TNY288-290
Leading Edge
Blanking Time
tLEB
Current Limit Delay
Thermal Shutdown
Temperature
Thermal Shutdown
Hysteresis
BP/M Pin Shutdown
Threshold Current
BP/M Pin Power-Up
Reset Threshold Voltage
Output
tILD
TSD
TSDH
ISD
VBP/M(RESET)
ON-State
Resistance
RDS(ON)
TJ = 25 °C
See Note G
TJ = 25 °C
See Note G, H
TNY284
ID = 25 mA
TNY285
ID = 28 mA
TNY286
ID = 35 mA
TJ = 25 °C
TJ = 100 °C
TJ = 25 °C
TJ = 100 °C
TJ = 25 °C
TJ = 100 °C
Min
0.9 ×
I2f
0.9 ×
I2f
0.9 ×
I2f
0.77 ×
ILIMIT(MIN)
0.725 ×
ILIMIT(MIN)
170
135
4
1.6
Typ
I2f
I2f
I2f
215
150
142
75
6.5
3.0
28
42
19
29
14
21
Max Units
1.12 ×
I2f
1.16 ×
I2f
A2Hz
1.16 ×
I2f
mA
ns
ns
150 °C
°C
9 mA
3.6 V
32
48
22
W
33
16
24
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TNY284-290
Parameter
Output (cont.)
Symbol
ON-State
Resistance
RDS(ON)
OFF-State Drain
Leakage Current
Breakdown Voltage
DRAIN Supply Voltage
Auto-Restart
ON-Time at fOSC
Auto-Restart
Duty Cycle
IDSS1
IDSS2
BVDSS
tAR
DCAR
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 18
(Unless Otherwise Specified)
TNY287
ID = 45 mA
TNY288
ID = 55 mA
TNY289
ID = 65 mA
TNY290
ID = 75 mA
VBP/M = 6.2 V
VEN/UV = 0 V
VDS = 560 V
TJ = 125 °C
See Note I
VBP/M = 6.2 V
VEN/UV = 0 V
TJ = 25 °C
TJ = 100 °C
TJ = 25 °C
TJ = 100 °C
TJ = 25 °C
TJ = 100 °C
TJ = 25 °C
TJ = 100 °C
TNY284-286
TNY287-288
TNY289-290
VDS = 375 V,
TJ = 50 °C
See Note G, I
VBP = 6.2 V, VEN/UV = 0 V,
See Note J, TJ = 25 °C
TJ = 25 °C
See Note K
TJ = 25 °C
Min
725
50
Typ Max Units
7.8 9.0
11.7 13.5
5.2 6.0
7.8 9.0
3.9 4.5
5.8 6.7
2.6 3.0
3.9 4.5
50
100
200
15
64
3
W
mA
V
V
ms
%
16
Rev. D 08/16
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TNY284-290
NOTES:
A. IS1 is an accurate estimate of device controller current consumption at no-load, since operating frequency is so low under these conditions.
Total device consumption at no-load is the sum of IS1 and IDSS2.
B. Since the output MOSFET is switching, it is difficult to isolate the switching current from the supply current at the DRAIN. An alternative is
to measure the BYPASS/MULTI-FUNCTIONAL pin current at 6.1 V.
C. BYPASS/MULTI-FUNCTIONAL pin is not intended for sourcing supply current to external circuitry.
D. To ensure correct current limit it is recommended that nominal 0.1 mF / 1 mF / 10 mF capacitors are used. In addition, the BP/M capacitor
value tolerance should be equal or better than indicated below across the ambient temperature range of the target application. The
minimum and maximum capacitor values are guaranteed by characterization.
Nominal BP/M
Pin Cap Value
0.1 mF
1 mF
10 mF
Tolerance Relative to Nominal
Capacitor Value
Min
-60%
-50%
-50%
Max
+100%
+100%
NA
E. For current limit at other di/dt values, refer to Figure 25.
F. TNY284 does not have an increased current limit value, but with a 10 mF BYPASS/MULTI-FUNCTIONAL pin capacitor the current limit is the
same as with a 1 mF BYPASS/MULTI-FUNCTIONAL pin capacitor (reduced current limit value).
G. This parameter is derived from characterization.
H. This parameter is derived from the change in current limit measured at 1X and 4X of the di/dt shown in the ILIMIT specification.
I. IDSS1 is the worst-case OFF-state leakage specification at 80% of BVDSS and maximum operating junction temperature. IDSS2 is a typical
specification under worst-case application conditions (rectified 265 VAC) for no-load consumption calculations.
J. Breakdown voltage may be checked against minimum BVDSS specification by ramping the DRAIN pin voltage up to but not exceeding
minimum BVDSS.
K. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to frequency).
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TNY284-290
SD
S
S BP/M
S EN/UV
470
5
S2
2 M
S1
0.1 µF
150 V
470
10 V
50 V
NOTE: This test circuit is not applicable for current limit or output characteristic measurements.
PI-4079-021015
Figure 18. General Test Circuit.
t2
HV
90%
t1
90%
DRAIN
VOLTAGE
0V
10%
Figure 19. Duty Cycle Measurement.
D=
t1
t2
PI-2048-021015
Typical Performance Characteristics
1.10
1.05
TJ = 25 °C
1.00
0.95
0.90
0.85
0.80
0.75
0.70
0.65
Typical
Minimum
Maximum
0.60
0 123 4 56
TON (µs)
Figure 21. Current Limit vs. TON for TNY284~287.
18
Rev. D 08/16
DCMAX
(internal signal)
EN/UV
VDRAIN
tP
=
1
fOSC
tP
tEN/UV
Figure 20. Output Enable Timing.
PI-2364-021015
1.10
1.05
TJ = 25 °C
1.00
0.95
0.90
0.85
0.80
0.75
0.70
0.65
Typical
Minimum
Maximum
0.60
0 123 4 56
TON (µs)
Figure 22. Current Limit vs. TON for TNY288~290.
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Typical Performance Characteristics (cont.)
1.1
1.0
0.9
-50 -25 0 25 50 75 100 125 150
Junction Temperature (°C)
Figure 23. Breakdown vs. Temperature.
1.4
1.2
1.0
0.8 Normalized
di/dt = 1
0.6 TNY284 50 mA/µs
TNY285 55 mA/µs Note: For the
0.4
TNY286
TNY287
70 mA/µs normalized current
90 mA/µs limit value, use the
0.2
TNY288
TNY289
110 mA/µs
130 mA/µs
typical current limit
specified for the
appropriate BP/M
TNY290 150 mA/µs capacitor.
0
1 2 34
Normalized di/dt
Figure 25. Standard Current Limit vs. di/dt.
1000
100
10
Scaling Factors:
TNY284
TNY285
TNY286
TNY287
TNY288
TNY289
TNY290
1.0
1.5
2.0
3.5
5.6
7.9
11.2
1
1 100 200 300 400 500 600
Drain Voltage (V)
Figure 27. COSS vs. Drain Voltage.
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TNY284-290
1.05
1.00
95
90
85
80
-40 -20
0 20 40 60 80 100 120
Temperature (C)
Figure 24. Standard Current Limit vs. Temperature.
300
Scaling Factors:
250 TNY284 1.0
TNY285 1.5
TNY286 2.0
200 TNY287 3.5
TNY288 5.6
TNY289 7.9
150 TNY290 11.2
100
50
TCASE=25 °C
TCASE=100 °C
0
0
2 468
DRAIN Voltage (V)
Figure 26. Output Characteristic.
10
40
Scaling Factors:
TNY284 1.0
TNY285 1.5
30 TNY286 2.0
TNY287 3.5
TNY288 5.6
TNY289 7.9
20 TNY290 11.2
10
0
0 100 200 300 400 500 600
Drain Voltage (V)
Figure 28. Drain Capacitance Power.
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TNY284-290
Typical Performance Characteristics (cont.)
1.2
1.0
0.8
0.6
0.4
0.2
0
-50 -25 0 25 50 75 100 125
Junction Temperature (°C)
Figure 29. Undervoltage Threshold vs. Temperature.
20
Rev. D 08/16
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TNY284-290
-E-
.240 (6.10)
.260 (6.60)
Pin 1
-D-
.125 (3.18)
.145 (3.68)
-T-
SEATING
PLANE
.100 (2.54) BSC
D S .004 (.10)
.356 (9.05)
.387 (9.83)
PDIP-8C (P Package)
.057 (1.45)
.068 (1.73)
(NOTE 6)
.015 (.38)
MINIMUM
Notes:
1. Package dimensions conform to JEDEC specification
MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP)
package with .300 inch row spacing.
2. Controlling dimensions are inches. Millimeter sizes are
shown in parentheses.
3. Dimensions shown do not include mold flash or other
protrusions. Mold flash or protrusions shall not exceed
.006 (.15) on any side.
4. Pin locations start with Pin 1, and continue counter-clock-
wise to Pin 8 when viewed from the top. The notch and/or
dimple are aids in locating Pin 1. Pin 3 is omitted.
5. Minimum metal to metal spacing at the package body for
the omitted lead location is .137 inch (3.48 mm).
6. Lead width measured at package body.
7. Lead spacing measured with the leads constrained to be
perpendicular to plane T.
.118 (3.00)
.140 (3.56)
.048 (1.22)
.137 (3.48)
.053 (1.35)
MINIMUM
.014 (.36)
.022 (.56)
T
ED
S
.010 (.25)
M
.008 (.20)
.015 (.38)
.300 (7.62) BSC
(NOTE 7)
.300 (7.62)
.390 (9.91)
P08C
PI-3933-081716
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TNY284-290
SO-8C (D Package)
4B
2
4.90 (0.193) BSC
0.10 (0.004) C A-B 2X
A
8
4
D
5
2 3.90 (0.154) BSC
0.10 (0.004) C D
2X
Pin 1 ID
1.27 (0.050) BSC
1
4
1.35 (0.053)
1.75 (0.069)
0.10 (0.004)
0.25 (0.010)
1.25 - 1.65
(0.049 - 0.065)
6.00 (0.236) BSC
SEATING
PLANE
C
1.04 (0.041) REF
0.20 (0.008) C
2X
7X 0.31 - 0.51 (0.012 - 0.020)
0.25 (0.010) M C A-B D
0.40 (0.016)
1.27 (0.050)
0.10 (0.004) C
7X
SEATING PLANE
C
H
0.17 (0.007)
0.25 (0.010)
DETAIL A
GAUGE
PLANE
0 - 8o
0.25 (0.010)
BSC
DETAIL A
Reference
Solder Pad
Dimensions
2.00 (0.079)
D07C
++
1.27 (0.050)
+
4.90 (0.193)
+
0.60 (0.024)
Notes:
1. JEDEC reference: MS-012.
2. Package outline exclusive of mold flash and metal burr.
3. Package outline inclusive of plating thickness.
4. Datums A and B to be determined at datum plane H.
5. Controlling dimensions are in millimeters. Inch dimensions
are shown in parenthesis. Angles in degrees.
PI-4526-012315
22
Rev. D 08/16
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TNY284-290
eSOP-12B (K Package)
Pin #1 I.D.
(Laser Marked)
2
0.400 [10.16]
0.460 [11.68]
0.004 [0.10] C A 2X
2X 7
0.004 [0.10] C B
0.059 [1.50]
Ref, Typ
2
0.350 [8.89]
0.059 [1.50]
Ref, Typ
0.356 [9.04]
Ref.
0.055 [1.40] Ref.
0.010 [0.25]
Ref.
0.325 [8.26]
Max. 7
12
0.010 [0.25]
0.225 [5.72]
Max. 7
0°- 8°
H
Gauge
Plane
Seating Plane
0.034 [0.85]
0.026 [0.65]
C
DETAIL A (Scale = 9X)
0.008 [0.20] C 1 2 3 4
6
B6
2X, 5/6 Lead Tips
0.023
0.018
[[00..5486]]113×
4
0.120 [3.05] Ref
0.070 [1.78]
0.010 (0.25) M C A B
1
TOP VIEW
BOTTOM VIEW
0.028 [0.71]
Ref.
0.098 [2.49]
0.086 [2.18]
0.006 [0.15]
0.000 [0.00]
Seating plane to
package bottom
standoff
0.032 [0.80]
0.029 [0.72]
0.092 [2.34]
0.086 [2.18]
Seating
Plane
0.004 [0.10] C C
Detail A
SIDE VIEW
0.306 [7.77]
Ref.
END VIEW
0.020 [0.51]
Ref.
3
0.016 [0.41]
0.011 [0.28]
11×
0.049 [1.23]
0.046 [1.16]
0.019 [0.48]
Ref.
0.022 [0.56]
Ref.
0.067 [1.70]
0.028 [0.71]
1
2
3
4
0.217 [5.51]
6
0.429 [10.90]
Land Pattern
Dimensions
12
11
10
0.321 [8.15]
9
8
7
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions noted are determined at the outermost
extremes of the plastic body exclusive of mold flash,
tie bar burrs, gate burrs, and interlead flash, but
including any mismatch between the top and bottom of
the plastic body. Maximum mold protrusion is 0.007
[0.18] per side.
3. Dimensions noted are inclusive of plating thickness.
4. Does not include interlead flash or protrusions.
5. Controlling dimensions in inches [mm].
6. Datums A and B to be determined at Datum H.
7. Exposed pad is nominally located at the centerline of
Datums A and B. “Max” dimensions noted include both
size and positional tolerances.
PI-5748a-020515
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TNY284-290
Part Ordering Information
TNY 288 P G - TL
24
Rev. D 08/16
• TinySwitch Product Family
• TNY-4 Series Number
• Package Identifier
P Plastic DIP-8C
D SO-8C
K eSOP-12B
• Lead Finish
G RoHS compliant and Halogen Free
• Tape & Reel and Other Options
Blank Standard Configuration
TL Tape & Reel, 1000 pcs min./mult.
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Notes
TNY284-290
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Rev. D 08/16


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Revision
A
B
C
C
D
Notes
Initial Release.
Added TNY288DG package. Updated TNY287K and TNY288D Peak or Open Frame values in Table 1.
Corrected IINIT parameter on page 15. Updated with new Brand Style.
Minor correction made to Functional Block Diagram.
Updated PDIP-8C (P Package) per PCN-16232.
Date
09/12
08/13
02/15
07/15
08/16
For the latest updates, visit our website: www.power.com
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does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY
HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one
or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of
Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set
forth at http://www.power.com/ip.htm.
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failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or
death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or system, or to affect its safety or effectiveness.
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Power Integrations, Inc. Other trademarks are property of their respective companies. ©2016, Power Integrations, Inc.
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