D70N02L (STMicroelectronics)
STD70N02L

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STD70N02L
STD70N02L-1
N-channel 24V - 0.0068- 60A - DPAK - IPAK
STripFET™ III Power MOSFET
General features
Type
STD70N02L
STD70N02L-1
VDSS
24V
24V
RDS(on)
<0.008
<0.008
RDS(ON) * Qg industry’s benchmark
Conduction losses reduced
Switching losses reduced
Low threshold device
ID
60A
60A
Description
This series of products utilizes the latest
advanced design rules of ST’s proprietary
STripFET™ technology. This is suitable for the
most demanding DC-DC converter application
where high efficiency is to be achieved.
Applications
Switching application
3
1
DPAK
IPAK
3
2
1
Internal schematic diagram
Order codes
Part number
STD70N02L-1
STD70N02L
Marking
D70N02L
D70N02L
Package
IPAK
DPAK
Packaging
Tube
Tape & reel
May 2006
Rev 4
1/17
www.st.com
17
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D70N02L (STMicroelectronics)
STD70N02L

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Contents
Contents
STD70N02L - STD70N02L-1
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves)
............................ 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
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STD70N02L

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STD70N02L - STD70N02L-1
1 Electrical ratings
Table 1.
Symbol
Absolute maximum ratings
Parameter
Vspike (1) Drain-source voltage rating
VDS Drain-source voltage (VGS = 0)
VDGR Drain-gate voltage (RGS = 20k)
VGS Gate-source voltage
ID (2) Drain current (continuous) at TC = 25°C
ID Drain current (continuous) at TC = 100°C
IDM (3) Drain current (pulsed)
PTOT Total dissipation at TC = 25°C
Derating factor
EAS (4) Single pulse avalanche energy
Tj Operating junction temperature
Tstg Storage temperature
1. Guaranted when external Rg=4.7and Tf<Tfmax
2. Value limited by wire bonding
3. Pulse width limited by safe operating area
4. Starting Tj =25°C, Id = 30A, VDD = 15V
Table 2. Thermal data
Symbol
Parameter
Rthj-case Thermal resistance junction-case Max
Rthj-amb Thermal resistance junction-amb Max
Tl Maximum lead temperature for soldering purpose
Electrical ratings
Value
30
24
24
± 20
60
42
240
60
0.4
280
-55 to 175
Unit
V
V
V
V
A
A
A
W
W/°C
mJ
°C
Value
2.5
100
275
Unit
°C/W
°C/W
°C
3/17
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Electrical characteristics
2 Electrical characteristics
STD70N02L - STD70N02L-1
(Tcase =25°C unless otherwise specified)
Table 3. On /off states
Symbol
Parameter
Test conditions
V(BR)DSS
Drain-source breakdown
voltage
ID = 25mA, VGS= 0
IDSS
Zero gate voltage drain VDS = 20V,
current (VGS = 0)
VDS = 20V,Tc = 125°C
IGSS
Gate body leakage
current (VDS = 0)
VGS = ±20V
VGS(th) Gate threshold voltage VDS= VGS, ID = 250µA
RDS(on)
Static drain-source on
resistance
VGS= 10V, ID= 30A
VGS= 5V, ID= 15A
Min. Typ. Max. Unit
24 V
1 µA
10 µA
±100 nA
1 1.8
V
0.0068 0.008
0.090 0.014
Table 4. Dynamic
Symbol
Parameter
Test conditions
gfs (1)
Ciss
Coss
Crss
Qg
Qgs
Qgd
Forward
transconductance
Input capacitance
Output capacitance
Reverse transfer
capacitance
Total gate charge
Gate-source charge
Gate-drain charge
RG Gate input resistance
VDS =15V, ID = 30A
VDS =16V, f=1MHz, VGS=0
VDD=10V, ID = 60A
VGS =10V
(see Figure 15)
f=1MHz Gate DC Bias =0
test signal level =20mV
open drain
QOSS(2) Output charge
VDS =16V, VGS =0V
1. Pulsed: pulse duration = 300µs, duty cycle 1.5%
2. Qoss.= Coss * D Vin, Coss = Cgd + Cgd. (see Appendix A)
Min. Typ. Max. Unit
27 S
1400
400
55
pF
pF
pF
24 32 nC
5 nC
3.4 nC
0.5 1.5
3
9.4 nC
4/17
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STD70N02L - STD70N02L-1
Electrical characteristics
Table 5. Switching times
Symbol
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
VDD=10V, ID=30A,
RG=4.7Ω, VGS=10V
(see Figure 17)
Min. Typ. Max Unit
10 ns
130 ns
27 ns
16 21.6 ns
Table 6. Source drain diode
Symbol
Parameter
Test conditions
ISD
ISDM
Source-drain current
Source-drain current (pulsed)
VSD (1) Forward on voltage
ISD=30A, VGS=0
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=60A, di/dt = 100A/µs,
VDD=20V, Tj=150°C
(see Figure 20)
1. Pulsed: pulse duration = 300µs, duty cycle 1.5%
Min. Typ. Max. Unit
50 A
200 A
1.3 V
36 ns
36 nC
2A
5/17
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Electrical characteristics
STD70N02L - STD70N02L-1
2.1 Electrical characteristics (curves)
Figure 1. Safe operating area
Figure 2. Thermal impedance
Figure 3. Output characterisics
Figure 4. Transfer characteristics
Figure 5. Transconductance
Figure 6. Static drain-source on resistance
6/17
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STD70N02L - STD70N02L-1
Electrical characteristics
Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations
Figure 9. Normalized gate threshold voltage Figure 10. Normalized on resistance vs
vs temperature
temperature
Figure 11. Source-drain diode forward
characteristics
Figure 12. Normalized BVDSS vs temperature
7/17
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Electrical characteristics
Figure 13. Allowable IAV vs time in avalanche
STD70N02L - STD70N02L-1
The previous curve gives the single pulse safe operating area for unclamped inductive
loads, under the following conditions:
PD(AVE) =0.5*(1.3*BVDSS *IAV )
EAS(AR) =PD(AVE) *tAV
Where:
IAV is the allowable current in avalanche
PD(AVE) is the average power dissipation in avalanche (single pulse)
tAV is the time in avalanche
8/17
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STD70N02L - STD70N02L-1
Appendix A
Figure 14. Synchronous buck converter
The power losses associated with the FETs in a Synchronous Buck converter can be
estimated using the equations shown in the table below. The formulas give a good
approximation, for the sake of performance comparison, of how different pairs of devices
affect the converter efficiency. However a very important parameter, the wotking
temperature, is not considered. The real device behavior is really dependent on how the
heat generated inside the devices is removed to allow for a safer working junction
temperature.
The low side (SW2) device requires:
Very low RDS(on) to reduce conduction losses
Small Qgls to reduce the gate charge losses
Small Coss to reduce losses due to output capacitance
Small Qrr to reduce losses on SW1 during its turn-on
The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source voltage to
avoid the cross conduction phenomenon.
The high side (SW1) device requires:
Small Rg and Lg to allow higher gate current peak and to limit the voltage feedback on the
gate
Small Qg to have a faster commutation and to reduce gate charge losses
Low RDS(on) to reduce the conduction losses
9/17
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STD70N02L - STD70N02L-1
Table 7.
Power losses
High side switch (SW1)
Pconduction
RDS(on) IL2 • δ
Low side switch (SW2)
RDS(on) IL2 • (1 δ)
Pswitching
Vin • (Qgsth(SW1) + Qgd(SW1) ) • f I-I-Lg-
Pdiode
recovery
conduction
Not applicable
Not applicable
Pgate(Qg)
PQoss
Qg(SW1) Vgg f
V-----i-n---------Q----o---s--2-s---(-S----W-----1---)-------f
Zero voltage switching
1Vin Qrr(SW2) f
Vf(SW2) IL tdeadtime f
Qgls(SW2) Vgg f
-V----i-n--------Q-----o---s-2--s---(--S---W-----2---)-------f
Table 8. Power losses parameters
Paramter
Meaning
d
Qgsth
Qgls
Pconduction
Pswitching
Pdiode
Pgate
PQoss
Duty-cycle
Post threshold gate charge
Third quadrant gate charge
On state losses
On-off transition losses
Conduction and reverse recovery diode losses
Gate driver losses
Output capacitance losses
10/17
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STD70N02L - STD70N02L-1
3 Test circuits
Test circuits
Figure 15. Switching times test circuit for
resistive load
Figure 16. Gate charge test circuit
Figure 17. Test circuit for inductive load
Figure 18. Unclamped inductive load test
switching and diode recovery times
circuit
Figure 19. Unclamped inductive waveform
Figure 20. Switching time waveform
11/17
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Package mechanical data
4 Package mechanical data
STD70N02L - STD70N02L-1
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at : www.st.com
12/17
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D70N02L (STMicroelectronics)
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STD70N02L - STD70N02L-1
Package mechanical data
DIM.
A
A1
A3
B
B2
B3
B5
B6
C
C2
D
E
G
H
L
L1
L2
TO-251 (IPAK) MECHANICAL DATA
MIN.
2.2
0.9
0.7
0.64
5.2
0.45
0.48
6
6.4
4.4
15.9
9
0.8
mm
TYP.
0.3
0.8
MAX.
2.4
1.1
1.3
0.9
5.4
0.85
0.95
0.6
0.6
6.2
6.6
4.6
16.3
9.4
1.2
1
MIN.
0.086
0.035
0.027
0.025
0.204
0.017
0.019
0.236
0.252
0.173
0.626
0.354
0.031
inch
TYP.
0.012
0.031
H
MAX.
0.094
0.043
0.051
0.031
0.212
0.033
0.037
0.023
0.023
0.244
0.260
0.181
0.641
0.370
0.047
0.039
L2 D
L
L1
0068771-E
13/17
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Package mechanical data
STD70N02L - STD70N02L-1
DIM.
A
A1
A2
B
b4
C
C2
D
D1
E
E1
e
e1
H
L
(L1)
L2
L4
R
V2
MIN.
2.2
0.9
0.03
0.64
5.2
0.45
0.48
6
6.4
4.4
9.35
1
0.6
DPAK MECHANICAL DATA
mm.
TYP
5.1
4.7
2.28
2.8
0.8
0.2
MAX.
2.4
1.1
0.23
0.9
5.4
0.6
0.6
6.2
6.6
4.6
10.1
1
MIN.
0.086
0.035
0.001
0.025
0.204
0.017
0.019
0.236
0.252
0.173
0.368
0.039
0.023
inch
TYP.
0.200
0.185
0.090
0.110
0.031
0.008
MAX.
0.094
0.043
0.009
0.035
0.212
0.023
0.023
0.244
0.260
0.181
0.397
0.039
14/17
0068772-F
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STD70N02L - STD70N02L-1
5 Package mechanical data
DPAK FOOTPRINT
Package mechanical data
All dimensions are in millimeters
TAPE AND REEL SHIPMENT
TAPE MECHANICAL DATA
mm inch
DIM.
MIN. MAX. MIN. MAX.
A0 6.8 7 0.267 0.275
B0 10.4 10.6 0.409 0.417
B1
12.1
0.476
D 1.5 1.6 0.059 0.063
D1 1.5
0.059
E 1.65 1.85 0.065 0.073
F 7.4 7.6 0.291 0.299
K0 2.55 2.75 0.100 0.108
P0 3.9 4.1 0.153 0.161
P1 7.9 8.1 0.311 0.319
P2 1.9 2.1 0.075 0.082
R 40
1.574
W 15.7 16.3 0.618 0.641
REEL MECHANICAL DATA
mm inch
DIM.
MIN. MAX. MIN. MAX.
A 330 12.992
B 1.5
0.059
C 12.8 13.2 0.504 0.520
D 20.2
0.795
G 16.4 18.4 0.645 0.724
N 50
1.968
T
22.4
0.881
BASE QTY
2500
BULK QTY
2500
15/17
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Revision history
6 Revision history
STD70N02L - STD70N02L-1
Table 9. Revision history
Date
Revision
Changes
29-Aug-2005
02-Dec-2005
07-Apr-2006
1 First release
2 Modified Appendix A
3 New template
03-May-2006
4 New value in Table 3, new curve (see Figure 13)
16/17
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STD70N02L - STD70N02L-1
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