N02L163WN1A (NanoAmp Solutions)
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 16 bit

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NanoAmp Solutions, Inc.
1982 Zanker Road, San Jose, CA 95112
ph: 408-573-8878, FAX: 408-573-8877
www.nanoamp.com
N02L163WN1Awww.DataSheet4U.com
2Mb Ultra-Low Power Asynchronous CMOS SRAM
128K × 16bit
Overview
Features
The N02L163WN1A is an integrated memory
device containing a 2 Mbit Static Random Access
Memory organized as 131,072 words by 16 bits.
The device is designed and fabricated using
NanoAmp’s advanced CMOS technology to
provide both high-speed performance and ultra-low
power. The device operates with a single chip
enable (CE) control and output enable (OE) to
allow for easy memory expansion. Byte controls
(UB and LB) allow the upper and lower bytes to be
accessed independently. The N02L163WN1A is
optimal for various applications where low-power is
critical such as battery backup and hand-held
devices. The device can operate over a very wide
temperature range of -40oC to +85oC and is
available in JEDEC standard packages compatible
with other standard 128Kb x 16 SRAMs.
Product Family
• Single Wide Power Supply Range
2.3 to 3.6 Volts
• Very low standby current
2.0µA at 3.0V (Typical)
• Very low operating current
2.0mA at 3.0V and 1µs (Typical)
• Very low Page Mode operating current
0.8mA at 3.0V and 1µs (Typical)
• Simple memory control
Single Chip Enable (CE)
Byte control for independent byte operation
Output Enable (OE) for memory expansion
• Low voltage data retention
Vcc = 1.8V
• Very fast output enable access time
30ns OE access time
• Automatic power down to standby mode
• TTL compatible three-state output driver
• Compact space saving BGA package avail-
able
Part Number
N02L163WN1AB
N02L163WN1AT
N02L163WN1AB1
N02L163WN1AT2
Package Type
Operating
Temperature
Power
Supply
(Vcc)
Speed
Standby
Operating
Current (ISB), Current (Icc),
Typical
Typical
48 - BGA
44 - TSOP II
48 - BGA Pb-Free
-40oC to +85oC
2.3V - 3.6V
55ns @ 2.7V
70ns @ 2.3V
2 µA
2 mA @ 1MHz
44 - TSOP II Green
(DOC# 14-02-014 REV L ECN# 01-1000)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
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N02L163WN1A (NanoAmp Solutions)
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 16 bit

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NanoAmp Solutions, Inc.
Pin Configurations
A4
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
VCC
VSS
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
PIN
ONE
44 A5
43 A6
42 A7
41 OE
40 UB
39 LB
38 I/O15
37 I/O14
36 I/O13
35 I/O12
34 VSS
33 VCC
32 I/O11
31 I/O10
30 I/O9
29 I/O8
28 NC
27 A8
26 A9
25 A10
24 A11
23 NC
123456
A LB OE A0 A1 A2 NC
B I/O8 UB A3 A4 CE I/O0
C I/O9 I/O10 A5 A6 I/O1 I/O2
D VSS I/O11 NC A7 I/O3 VCC
E VCC I/O12 NC A16 I/O4 VSS
F I/O14 I/O13 A14 A15 I/O5 I/O6
G I/O15 NC A12 A13 WE I/O7
H NC A8 A9 A10 A11 NC
48 Pin BGA (top)
6 x 8 mm
Pin Descriptions
Pin Name
A0-A16
WE
CE
OE
LB
UB
I/O0-I/O15
NC
VCC
VSS
Pin Function
Address Inputs
Write Enable Input
Chip Enable Input
Output Enable Input
Lower Byte Enable Input
Upper Byte Enable Input
Data Inputs/Outputs
Not Connected
Power
Ground
N02L163WN1Awww.DataSheet4U.com
(DOC# 14-02-014 REV L ECN# 01-1000)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
2


N02L163WN1A (NanoAmp Solutions)
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 16 bit

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NanoAmp Solutions, Inc.
Functional Block Diagram
Address
Inputs
A0 - A3
Word
Address
Decode
Logic
Address
Inputs
A4 - A16
Page
Address
Decode
Logic
CE
WE
OE Control
UB Logic
LB
32K Page
x 16 word
x 16 bit
RAM Array
N02L163WN1Awww.DataSheet4U.com
Input/
Output
Mux
and
Buffers
I/O0 - I/O7
I/O8 - I/O15
Functional Description
CE WE OE UB LB
I/O0 - I/O151
MODE
POWER
HXXXX
L XXHH
L L X3 L1 L1
L H L L1 L1
L HHX X
High Z
High Z
Data In
Data Out
High Z
Standby2
Active
Write3
Read
Active
Standby
Active
Active
Active
Active
1. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - I/O7
are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown.
2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally
isolated from any external influence and disabled from exerting any influence externally.
3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
Capacitance1
Item
Symbol
Test Condition
Input Capacitance
I/O Capacitance
CIN VIN = 0V, f = 1 MHz, TA = 25oC
CI/O VIN = 0V, f = 1 MHz, TA = 25oC
1. These parameters are verified in device characterization and are not 100% tested
Min Max Unit
8 pF
8 pF
(DOC# 14-02-014 REV L ECN# 01-1000)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
3


N02L163WN1A (NanoAmp Solutions)
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 16 bit

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NanoAmp Solutions, Inc.
N02L163WN1Awww.DataSheet4U.com
Absolute Maximum Ratings1
Item
Symbol
Rating
Unit
Voltage on any pin relative to VSS
Voltage on VCC Supply Relative to VSS
Power Dissipation
Storage Temperature
Operating Temperature
Soldering Temperature and Time
VIN,OUT
VCC
PD
TSTG
TA
TSOLDER
–0.3 to VCC+0.3
–0.3 to 4.5
500
–40 to 125
-40 to +85
260oC, 10sec
V
V
mW
oC
oC
oC
1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operating section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Operating Characteristics (Over Specified Temperature Range)
Item
Symbol
Test Conditions
Min.
Typ1
Max Unit
Supply Voltage
VCC
2.3 3.6 V
Data Retention Voltage
VDR Chip Disabled2
1.8
V
Input High Voltage
VIH
1.8 VCC+0.3 V
Input Low Voltage
VIL
–0.3 0.6 V
Output High Voltage
VOH
IOH = 0.2mA
VCC–0.2
V
Output Low Voltage
VOL IOL = -0.2mA
0.2 V
Input Leakage Current ILI VIN = 0 to VCC
0.5 µA
Output Leakage Current
ILO OE = VIH or Chip Disabled
0.5 µA
Read/Write Operating Supply Current
@ 1 µs Cycle Time2
ICC1
VCC=3.6 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0
2.0 4.0 mA
Read/Write Operating Supply Current
@ 70 ns Cycle Time2
ICC2
VCC=3.6 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0
12 16.0 mA
Page Mode Operating Supply Current
@ 70ns Cycle Time2 (Refer to Power
Savings with Page Mode Operation
ICC3
VCC=3.6 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0
4
mA
diagram)
Read/Write Quiescent Operating Sup-
ply Current3
ICC4
VCC=3.6 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0,
f=0
3.0 mA
Maximum Standby Current3
VIN = VCC or 0V
ISB1 Chip Disabled
tA= 85oC, VCC = 3.6 V
2.0 20 µA
Maximum Data Retention Current3
IDR
VCC = 1.8V, VIN = VCC or 0
Chip Disabled, tA= 85oC
10 µA
1. Typical values are measured at Vcc=Vcc Typ., TA=25°C and are not 100% tested.
2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive
output capacitance expected in the actual system.
3. This device assumes a standby mode if the chip is disabled (CE high). In order to achieve low standby current all inputs must be
within 0.2 volts of either VCC or VSS
(DOC# 14-02-014 REV L ECN# 01-1000)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
4


N02L163WN1A (NanoAmp Solutions)
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 16 bit

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NanoAmp Solutions, Inc.
N02L163WN1Awww.DataSheet4U.com
Power Savings with Page Mode Operation (WE = VIH)
Page Address (A4 - A16 )
Word Address (A0 - A3)
CE
Word 1
Open page
Word 2
...
Word 16
OE
LB, UB
Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal
organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power
saving feature.
The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open
and 16-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant
bits and addressing the 16 words within the open page, power is reduced to the page mode value which is
considerably lower than standard operating currents for low power SRAMs.
(DOC# 14-02-014 REV L ECN# 01-1000)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
5


N02L163WN1A (NanoAmp Solutions)
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 16 bit

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NanoAmp Solutions, Inc.
N02L163WN1Awww.DataSheet4U.com
Timing Test Conditions
Item
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
Operating Temperature
Timing
Item
Read Cycle Time
Address Access Time
Chip Enable to Valid Output
Output Enable to Valid Output
Byte Select to Valid Output
Chip Enable to Low-Z output
Output Enable to Low-Z Output
Byte Select to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Byte Select Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
Chip Enable to End of Write
Address Valid to End of Write
Byte Select to End of Write
Write Pulse Width
Address Setup Time
Write Recovery Time
Write to High-Z Output
Data to Write Time Overlap
Data Hold from Write Time
End Write to Low-Z Output
Symbol
tRC
tAA
tCO
tOE
tLB, tUB
tLZ
tOLZ
tLBZ, tUBZ
tHZ
tOHZ
tLBHZ, tUBHZ
tOH
tWC
tCW
tAW
tLBW, tUBW
tWP
tAS
tWR
tWHZ
tDW
tDH
tOW
0.1VCC to 0.9 VCC
5ns
0.5 VCC
CL = 30pF
-40 to +85 oC
2.3 - 3.6 V
Min.
Max.
70
70
70
35
35
10
5
10
0 20
0 20
0 20
10
70
50
50
50
40
0
0
20
40
0
10
2.7 - 3.6 V
Min.
Max.
55
55
55
30
30
10
5
10
0 20
0 20
0 20
10
55
40
40
40
40
0
0
20
35
0
10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(DOC# 14-02-014 REV L ECN# 01-1000)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
6


N02L163WN1A (NanoAmp Solutions)
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 16 bit

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NanoAmp Solutions, Inc.
Timing of Read Cycle (CE = OE = VIL, WE = VIH)
tRC
Address
tAA
tOH
Data Out
Previous Data Valid
Timing Waveform of Read Cycle (WE= VIH)
tRC
Address
CE
OE
LB, UB
Data Out
tAA
tCO
tLZ
tOE
tOLZ
tLBLZ, tUBLZ
High-Z
tLB, tUB
N02L163WN1Awww.DataSheet4U.com
Data Valid
tHZ
tOHZ
tLBHZ, tUBHZ
Data Valid
(DOC# 14-02-014 REV L ECN# 01-1000)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
7


N02L163WN1A (NanoAmp Solutions)
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 16 bit

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NanoAmp Solutions, Inc.
N02L163WN1Awww.DataSheet4U.com
Timing Waveform of Write Cycle (WE control)
tWC
Address
CE
tAW
tCW
tLBW, tUBW
tWR
LB, UB
tAS
WE
tWP
tDW
tDH
Data In
High-Z
tWHZ
Data Valid
tOW
Data Out
High-Z
Timing Waveform of Write Cycle (CE Control)
tWC
Address
CE
LB, UB
tAW
tCW
tAS
tLBW, tUBW
tWR
tWP
WE
tDW tDH
Data In
Data Out
Data Valid
tLZ
tWHZ
High-Z
(DOC# 14-02-014 REV L ECN# 01-1000)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
8


N02L163WN1A (NanoAmp Solutions)
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 16 bit

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NanoAmp Solutions, Inc.
44-Lead TSOP II Package (T44)
18.41±0.13
10.16±0.13
N02L163WN1Awww.DataSheet4U.com
11.76±0.20
0.80mm REF
DETAIL B
0.45
0.30 SEE DETAIL B
1.10±0.15
0.20
0.00
Note:
1. All dimensions in inches (Millimeters)
2. Package dimensions exclude molding flash
0.80mm REF
0o-8o
(DOC# 14-02-014 REV L ECN# 01-1000)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
9


N02L163WN1A (NanoAmp Solutions)
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 16 bit

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NanoAmp Solutions, Inc.
N02L163WN1Awww.DataSheet4U.com
Ball Grid Array Package
A1 BALL PAD
CORNER (3)
D
0.28±0.05
1.24±0.10
E
1. 0.35±0.05 DIA.
K TYP
TOP VIEW
SIDE VIEW
2. SEATING PLANE - Z
0.15 Z
0.05 Z
SD
A1 BALL PAD
CORNER
1. DIMENSION IS MEASURED AT THE
MAXIMUM SOLDER BALL DIAMETER.
PARALLEL TO PRIMARY Z.
2. PRIMARY DATUM Z AND SEATING
PLANE ARE DEFINED BY THE
e SPHERICAL CROWNS OF THE
SOLDER BALLS.
SE
3. A1 BALL PAD CORNER I.D. TO BE
MARKED BY INK.
J TYP
e
BOTTOM VIEW
Dimensions (mm)
DE
6±0.10 8±0.10
SD
0.375
e = 0.75
SE
0.375
J
1.125
K
1.375
BALL
MATRIX
TYPE
FULL
(DOC# 14-02-014 REV L ECN# 01-1000)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
10


N02L163WN1A (NanoAmp Solutions)
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 16 bit

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NanoAmp Solutions, Inc.
N02L163WN1Awww.DataSheet4U.com
Ordering Information
N02L163WN1AX-XX X
Temperature I = Industrial, -40°C to 85°C
Performance
55 = 55ns
Package Type
T = 44-pin TSOP II
B = 48-ball BGA
T2 = 44-pin TSOP II Green Package
B1 = 48-ball BGA Pb-Free Package
Revision History
Revision #
A
B
C
D
E
F
G
H
I
J
K
L
Date
Dec. 1999
Sept. 2000
Oct. 2000
Oct. 2000
Jan. 2001
Mar. 2001
May 2001
June 2001
Sept. 2001
Dec. 2001
Nov. 2002
Oct. 2004
Change Description
Initial Preliminary Release
Modified Voltage Range and Standby Current Limits.
Added Missing Tas Parameter Specification.
Modified Standby Current Specifications.
Extensive Modification to use voltage regulator design
Modified BGA pinout, access time 70ns @ 2.7V, misc. errata
Changed access time to 55ns, modified 44-Lead TSOP Package diagram
Revised voltage range in Timing table, revised Dimensions table
Minor parametric modifications, full production release
Part number change from EM128L16, modified Overview and Features, added
Page Mode Operation diagram, revised Operating Characteristics table, Package
diagram, Functional Description table and Ordering Information diagram
Replaced Isb and Icc on Product Family table with typical values
Added Pb-Free and Green Package Option
© 2001 - 2002 Nanoamp Solutions, Inc. All rights reserved.
NanoAmp Solutions, Inc. ("NanoAmp") reserves the right to change or modify the information contained in this data sheet and the products described therein, without prior notice.
NanoAmp does not convey any license under its patent rights nor the rights of others. Charts, drawings and schedules contained in this data sheet are provided for illustration pur-
poses only and they vary depending upon specific applications.
NanoAmp makes no warranty or guarantee regarding suitability of these products for any particular purpose, nor does NanoAmp assume any liability arising out of the application
or use of any product or circuit described herein. NanoAmp does not authorize use of its products as critical components in any application in which the failure of the NanoAmp
product may be expected to result in significant injury or death, including life support systems and critical medical instruments.
(DOC# 14-02-014 REV L ECN# 01-1000)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
11




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