UPD8880 (NEC)
COLOR CCD LINEAR IMAGE SENSOR

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DATA SHEET
MOS INTEGRATED CIRCUIT
µ PD8880
(10680 × 10680) PIXELS × 3 COLOR CCD LINEAR IMAGE SENSOR
DESCRIPTION
The µ PD8880 is a color CCD (Charge Coupled Device) linear image sensor which changes optical images to
electrical signal and has the function of color separation.
The µ PD8880 has 3 rows of (10680+10680) staggered pixels, and each row has a dual-sided readout type of
charge transfer register. And it has reset feed-through level clamp circuits and voltage amplifiers. Therefore, it is
suitable for 2400 dpi/A4 color image scanners, color facsimiles and so on.
FEATURES
Valid photocell : (10680+10680) pixels × 3
Photocell pitch : 4 µ m
Line spacing : 64 µ m (16 lines) Red line - Green line, Green line - Blue line
Color filter
8 µm (2 lines) Odd line – Even line (for each color)
: Primary colors (red, green and blue), pigment filter (with light resistance 107 lx•hour)
Resolution
: 96 dot/mm A4 (210 × 297 mm) size (shorter side)
: 2400 dpi US letter (8.5” × 11”) size (shorter side)
Drive clock level : CMOS output under 5 V operation
Data rate
: 8 MHz Max.
Power supply : +12 V
On-chip circuits : Reset feed-through level clamp circuits
:: Voltage amplifiers
ORDERING INFORMATION
Part Number
Package
µ PD8880CY
CCD linear image sensor 32-pin plastic DIP (10.16 mm (400))
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. S16032EJ3V0DS00 (3rd edition)
Date Published July 2003 NS CP (K)
Printed in Japan
The mark shows major revised points.
2002


UPD8880 (NEC)
COLOR CCD LINEAR IMAGE SENSOR

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BLOCK DIAGRAM
VOD GND GND
29 1 16
φ 2L
19
VOUT1
(Blue)
30
VOUT2
(Green)
31
VOUT3
(Red)
32
32
φ CLB φ RB
14
φ1L
µ PD8880
CCD analog shift register
Transfer gate
· · · · Photocell
(Blue)
Transfer gate
CCD analog shift register
CCD analog shift register
Transfer gate
· · · · Photocell
(Green)
Transfer gate
CCD analog shift register
CCD analog shift register
Transfer gate
· · · · Photocell
(Red)
Transfer gate
CCD analog shift register
φ2 φ1
20 13
18
φTG1
(Blue)
17
φ TG2
(Green)
15
φTG3
(Red)
54
φ2 φ1
2 Data Sheet S16032EJ3V0DS


UPD8880 (NEC)
COLOR CCD LINEAR IMAGE SENSOR

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µ PD8880
PIN CONFIGURATION (Top View)
CCD linear image sensor 32-pin plastic DIP (10.16 mm (400))
µ PD8880CY
Ground GND 1
Reset gate clock φ RB 2
Reset feed-through level
clamp clock
φ CLB
3
Shift register clock 1
φ1 4
Shift register clock 2
φ2 5
Internal connection
IC 6
Internal connection
IC 7
No connection
NC 8
No connection
NC 9
No connection
NC 10
Internal connection
IC 11
Internal connection
IC 12
Shift register clock 1
φ 1 13
Last stage shift register clock 1 φ 1L 14
Transfer gate clock 3
(for Red)
φ TG3
15
Ground GND 16
32 VOUT3 Output signal 3 (Red)
31 VOUT2 Output signal 2 (Green)
30 VOUT1 Output signal 1 (Blue)
29 VOD Output drain voltage
28 NC
No connection
27 IC
Internal connection
26 IC
Internal connection
25 NC
No connection
24 NC
No connection
23 NC
No connection
22 IC
Internal connection
21 IC
Internal connection
20 φ 2
Shift register clock 2
19 φ 2L Last stage shift register clock 2
18
φ TG1
Transfer gate clock 1
(for Blue)
17
φ TG2
Transfer gate clock 2
(for Green)
Cautions 1. Leave pins 6 , 7, 11, 12, 21, 22, 26, 27 (IC) unconnected.
2. Connect the No connection pins (NC) to GND.
Data Sheet S16032EJ3V0DS
3


UPD8880 (NEC)
COLOR CCD LINEAR IMAGE SENSOR

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PHOTOCELL STRUCTURE DIAGRAM
µ PD8880
2 µm
2 µm
Channel stopper
Aluminum
shield
PHOTOCELL ARRAY STRUCTURE DIAGRAM (Line spacing)
4 µm
4 µm
4 µm
Blue photocell array
Blue photocell array
4 µm
4 µm
4 µm
Green photocell array
Green photocell array
4 µm
4 µm
4 µm
Red photocell array
Red photocell array
2 lines
(8 µ m)
14 lines
(56 µ m)
2 lines
(8 µ m)
14 lines
(56 µ m)
2 lines
(8 µ m)
16 lines
(64 µ m)
16 lines
(64 µ m)
4 Data Sheet S16032EJ3V0DS


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COLOR CCD LINEAR IMAGE SENSOR

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µ PD8880
ABSOLUTE MAXIMUM RATINGS (TA = +25°C)
Parameter
Output drain voltage
Shift register clock voltage
Reset gate clock voltage
Reset feed-through level clamp
clock voltage
Transfer gate clock voltage
Operating ambient temperature Note
Storage temperature
Symbol
VOD
Vφ 1, Vφ 2, Vφ 1L, Vφ 2L
Vφ RB
Vφ CLB
Vφ TG1 to Vφ TG3
TA
Tstg
Note Use at the condition without dew condensation.
Ratings
0.3 to +15
0.3 to +8
0.3 to +8
0.3 to +8
0.3 to +8
0 to +60
40 to +70
Unit
V
V
V
V
V
°C
°C
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any
parameter. That is, the absolute maximum ratings are rated values at which the product is on the
verge of suffering physical damage, and therefore the product must be used under conditions that
ensure that the absolute maximum ratings are not exceeded.
RECOMMENDED OPERATING CONDITIONS (TA = +25°C)
Parameter
Output drain voltage
Shift register clock high level
Shift register clock low level
Reset gate clock high level
Reset gate clock low level
Reset feed-through level clamp clock
high level
Reset feed-through level clamp clock
low level
Transfer gate clock high level
Transfer gate clock low level
CCD Transfer speed
Data rate
Symbol
VOD
Vφ 1_H, Vφ 2_H, Vφ 1LH, Vφ 2LH
Vφ 1_L, Vφ 2_L, Vφ 1LL, Vφ 2LL
Vφ RBH
Vφ RBL
Vφ CLBH
Vφ CLBL
Vφ TG1H to Vφ TG3H
Vφ TG1L to Vφ TG3L
fφ 1, fφ 2
fφ RB
Min.
11.4
4.8
0.3
4.5
0.3
4.5
0.3
4.8
0.3
Typ.
12.0
5.0
0
5.0
0
5.0
0
Vφ
Note
1_H
0
1
2
Max.
12.6
5.5
+0.2
5.5
+0.5
5.5
+0.5
Vφ
Note
1_H
+0.15
6
8
Unit
V
V
V
V
V
V
V
V
V
MHz
MHz
Note When Transfer gate clock high level (Vφ TG1H to Vφ TG3H) is higher than Shift register clock high level (Vφ 1_H),
Image lag can increase.
Data Sheet S16032EJ3V0DS
5


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COLOR CCD LINEAR IMAGE SENSOR

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µ PD8880
ELECTRICAL CHARACTERISTICS
TA = +25°C, VOD = 12 V, data rate (fφ RB) = 2 MHz, storage time = 11.0 ms, input signal clock = 5 Vp-p,
light source : 3200 K halogen lamp + C-500S (infrared cut filter, t = 1 mm) + HA-50 (heat absorbing filter, t = 3 mm)
Parameter
Saturation voltage 1
Saturation voltage 2
Photo response non-uniformity
Average dark signal
Dark signal non-uniformity
Power consumption
Output impedance
Response
Red
Green
Blue
Image lag
Offset level Note 3
Output fall delay time Note 4
Total transfer efficiency
Register imbalance
Response peak
Red
Green
Blue
Dynamic range
Reset feed-through noise Note 3
Random noise (CDS)
Symbol
Test Conditions
Vsat1
Note 1
Vsat2
Note 2
PRNU VOUT = 1.0 V
ADS Light shielding
DSNU Light shielding
PW
ZO
RR
RG
RB
IL VOUT = 1.0 V
VOS
td VOUT = 1.0 V
TTE
VOUT = 1.0 V, fφ 1, fφ 2 = 6 MHz
RI VOUT = 1.0 V
DR1
DR2
RFTN
σ CDS
Vsat1/DSNU, Note 1
Vsat1/σ CDS, Note 1
Light shielding
Light shielding
Min.
2.5
1.5
2.52
2.31
1.26
4.5
92
2000
Typ.
3.5
2.5
6
0.4
2.0
290
0.3
3.60
3.30
1.80
1.0
6.0
25
98
1.0
630
540
460
1750
3500
500
1.0
Max.
20
4.0
8.0
450
1
4.68
4.29
2.34
7.0
7.5
4.0
+500
Unit
V
V
%
mV
mV
mW
k
V/lx•s
V/lx•s
V/lx•s
%
V
ns
%
%
nm
nm
nm
times
times
mV
mV
Notes 1. Vsat1: fφ 1, fφ 2 4 MHz, fφ RB 8 MHz
2. Vsat2: 4 MHz < (fφ 1, fφ 2) < 6 MHz, fφ RB 8 MHz (refer to TIMING CHART 3)
3. Refer to TIMING CHART 2.
4. When the fall time of φ 1L (t1’) is the Typ. value (refer to TIMING CHART 2).
6 Data Sheet S16032EJ3V0DS


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COLOR CCD LINEAR IMAGE SENSOR

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µ PD8880
INPUT PIN CAPACITANCE (TA = +25°C, VOD = 12 V)
Parameter
Shift register clock pin capacitance 1
Shift register clock pin capacitance 2
Last stage shift register clock pin capacitance 1
Last stage shift register clock pin capacitance 2
Reset gate clock pin capacitance
Reset feed-through level clamp clock pin capacitance
Transfer gate clock pin capacitance
Symbol Pin name Pin No.
Cφ 1 φ 1
4
13
φ 1 total capacitance
Cφ 2 φ 2
5
20
φ 2 total capacitance
Cφ 1L
φ 1L
14
Cφ 2L
φ 2L
19
Cφ RB
φ RB
2
Cφ CLB
φ CLB
3
Cφ TG
φ TG1
18
φ TG2
17
φ TG3
15
Min.
Typ.
1100
1100
2200
1100
1100
2200
70
70
20
20
200
200
200
Max.
Unit
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
Remarks 1. Pins 4 and 13 (φ 1), 5 and 20 (φ 2) are each connected inside of the device.
2. Cφ 1 and Cφ 2 show the equivalent capacity of the real drive including the capacity of between φ 1 and
φ 2.
Data Sheet S16032EJ3V0DS
7


UPD8880 (NEC)
COLOR CCD LINEAR IMAGE SENSOR

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TIMING CHART 1-1 (Bit clamp mode, for each color)
φ TG1 to φ TG3
φ 1, φ 1L
φ 2, φ 2L
φ RB
φ CLB
Note
VOUT1 to VOUT3
Optical black
(48 pixels)
Valid photocell
(21360 pixels)
Invalid photocell
(4 pixels)
Invalid photocell
(4 pixels)
Note Set the φ RB and φ CLB to high level during this period.
Note


UPD8880 (NEC)
COLOR CCD LINEAR IMAGE SENSOR

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TIMING CHART 1-2 (Line clamp mode, for each color)
φ TG1 to φ TG3
φ 1, φ 1L
φ 2, φ 2L
φ RB
φ CLB
(φTG1 to φ TG3)
Note
VOUT1 to VOUT3
Optical black
(48 pixels)
Valid photocell
(21360 pixels)
Invalid photocell
(4 pixels)
Invalid photocell
(4 pixels)
Note Set the φ RB to high level during this period.
Remark Inverse pulse of the φ TG1 to φ TG3 can be used as φ CLB.
Note


UPD8880 (NEC)
COLOR CCD LINEAR IMAGE SENSOR

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TIMING CHART 2-1 (Bit clamp mode, for each color)
φ1
φ2
φ 1L
φ 2L
φ RB
φ CLB
t5 t3 t6
t1
90%
10%
90%
10%
t1’
90%
10%
90%
10%
t4
90%
10%
t7 t9 t8 t10 t11
90%
10%
td
VOUT
RFTN
10%
µ PD8880
t2
t2’
t5 t3 t6
t4
t7 t9 t8 t10 t11
td
VOS
Symbol
Min.
Typ.
Max.
Unit
t1, t2
0 30 ns
t1’, t2’
0 5 ns
t3
20 100
ns
t4
75 200
ns
t5, t6
0 10 ns
t7
30 100
ns
t8
20 100
ns
t9, t10
0 10 ns
t11 5 25 ns
10 Data Sheet S16032EJ3V0DS


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COLOR CCD LINEAR IMAGE SENSOR

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TIMING CHART 2-2 (Line clamp mode, for each color)
φ1
φ2
φ 1L
φ 2L
φ RB
t5 t3 t6
90%
10%
t1
90%
10%
90%
10%
90%
10%
t1’
90%
10%
t4
“H”
φ CLB
VOUT
RFTN
td
10%
µ PD8880
t2
t2’
t5 t3 t6
t4
td
VOS
Symbol
Min.
Typ.
Max.
Unit
t1, t2
0 30 ns
t1’, t2’
0 5 ns
t3
20 100
ns
t4
75 200
ns
t5, t6
0 10 ns
TIMING CHART 3 (Sift Register Pulse φ 1, φ 2 = 6 MHz (Max.))
φ1
4.8 V or more
30 ns or more
0.2 V or less
φ2
30 ns or more
Data Sheet S16032EJ3V0DS
11


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COLOR CCD LINEAR IMAGE SENSOR

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φ TG1 to φ TG3, φ 1, φ 2 TIMING CHART
φ TG1 to φ TG3
φ1
90%
t13
90%
10%
t15
φ2
φ RB
φ CLB
(Bit clamp mode)
φ CLB
(Line clamp mode)
t17
90%
t7
90%
t22 t20
90%
10%
t9
t12 t14
t16
Note 1
t18
Note 2
t21 t23
t19 t10
µ PD8880
Symbol
Min.
Typ.
Max.
Unit
t7
t9, t10
t12
t13, t14
t15, t16
t17, t18
t19
t20, t21
t22, t23
30
0
5000
0
900
200
t12
0
30
100
10
10000
50
1000
400
t12
50
350
50000
50000
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes 1. Set the φ RB and φ CLB to high level during this period.
2. Set the φ RB to high level during this period.
Remark Inverse pulse of the φ TG1 to φ TG3 can be used as φ CLB.
12 Data Sheet S16032EJ3V0DS


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COLOR CCD LINEAR IMAGE SENSOR

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µ PD8880
φ 1, φ 2 cross points
φ2
φ1
1.5 V to 3.5 V
1.5 V to 3.5 V
φ 1, φ 2L cross points
φ1
φ 2L
2 V or more
0.5 V or more
φ 2, φ 1L cross points
φ2
φ 1L
2 V or more
0.5 V or more
Remark Adjust cross points (φ 1, φ 2), (φ 1, φ 2L) and (φ 2, φ 1L) with input resistance of each pin.
Data Sheet S16032EJ3V0DS
13


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COLOR CCD LINEAR IMAGE SENSOR

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µ PD8880
DEFINITIONS OF CHARACTERISTIC ITEMS
1. Saturation voltage : Vsat
Output signal voltage at which the response linearity is lost.
2. Saturation exposure : SE
Product of intensity of illumination (lx) and storage time (s) when saturation of output voltage occurs.
3. Photo response non-uniformity : PRNU
The output signal non-uniformity of all the valid pixels when the photosensitive surface is applied with the light
of uniform illumination. This is calculated by the following formula.
PRNU (%) = x × 100
x
x : maximum of xj x
21360
Σ xj
j=1
x=
21360
xj : Output voltage of valid pixel number j
VOUT
Register Dark
DC level
x
x
4. Average dark signal : ADS
Average output signal voltage of all the valid pixels at light shielding. This is calculated by the following
formula.
21360
Σ dj
j=1
ADS (mV) =
21360
dj : Dark signal of valid pixel number j
14 Data Sheet S16032EJ3V0DS


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COLOR CCD LINEAR IMAGE SENSOR

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µ PD8880
5. Dark signal non-uniformity : DSNU
Absolute maximum of the difference between ADS and voltage of the highest or lowest output pixel of all the
valid pixels at light shielding. This is calculated by the following formula.
DSNU (mV) : maximum of dj ADS j = 1 to 21360
dj : Dark signal of valid pixel number j
VOUT
Register Dark
DC level
ADS
DSNU
6. Output impedance : ZO
Impedance of the output pins viewed from outside.
7. Response : R
Output voltage divided by exposure (lx•s).
Note that the response varies with a light source (spectral characteristic).
8. Image lag : IL
The rate between the last output voltage and the next one after read out the data of a line.
φ TG
Light
ON
OFF
VOUT
VOUT
V1
IL (%) = V1 × 100
VOUT
Data Sheet S16032EJ3V0DS
15


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COLOR CCD LINEAR IMAGE SENSOR

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µ PD8880
9. Register Imbalance : RI
The rate of the difference between the averages of the output voltage of Odd and Even bits, against the
average output voltage of all the valid pixels.
2
n
RI (%) =
n
2
(V2j –1 – V2j)
j=1
n
1
n Vj
j=1
× 100
n : Number of valid pixels
Vj : Output voltage of each pixel
10. Random noise (CDS) : σ CDS
Random noise σ CDS is defined as the standard deviation of a valid pixel output signal with 100 times (=100
lines) data sampling at dark (light shielding). σ CDS is calculated by the following procedure.
1. One valid photocell in one reading is fixed as measurement point.
2. The output level is measured during the reset feed-through period which is averaged over 100 ns to get
“VDi”.
3. The output level is measured during the Video Output time averaged over 100 ns to get “VOi”.
4. The correlated double sampling output is defined by VCDSi = VDi – VOi
5. Repeat the above procedure (1 to 4) for 100 times (= 100 lines).
6. Calculate the standard deviation σ CDS using the following formula equation.
σ CDS (mV) =
100
Σ (VCDSi – V)2
i=1
100
Σ1 100
, V=
VCDSi
100 i = 1
Video Output
Reset feed-through
16 Data Sheet S16032EJ3V0DS


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COLOR CCD LINEAR IMAGE SENSOR

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µ PD8880
STANDARD CHARACTERISTIC CURVES (Reference Value)
DARK OUTPUT TEMPERATURE
CHARACTERISTIC
8
STORAGE TIME OUTPUT VOLTAGE
CHARACTERISTIC (TA = +25°C)
2
4
1
2
1
0.5
0.25 0.2
0.1
0 10 20 30 40 50
Operating Ambient Temperature TA (°C)
0.1
1
5
Storage Time (ms)
TOTAL SPECTRAL RESPONSE CHARACTERISTICS
(without infrared cut filter and heat absorbing filter ) (TA = +25°C)
100
R
B
80
G
10
60
40
20
0
400
500 600 700
Wavelength (nm)
G
B
800
Data Sheet S16032EJ3V0DS
17


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COLOR CCD LINEAR IMAGE SENSOR

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µ PD8880
APPLICATION CIRCUIT EXAMPLE
+5 V
+
10 µF/16 V 0.1 µF
φ RB
φ CLB
φ1
φ2
φ1
φ 1L
200
47
1
1
1
100
4.7
µPD8880
1
GND
2
φ RB
3
φ CLB
4
φ1
5
φ2
6
IC
7
IC
8
NC
9
NC
10
NC
11
IC
12
IC
13
φ1
14
φ 1L
15
φ TG3
16
GND
32
VOUT3
31
VOUT2
30
VOUT1
29
VOD
28
NC
27
IC
26
IC
25
NC
24
NC
23
NC
22
IC
21
IC
20
φ2
19
φ 2L
18
φ TG1
17
φ TG2
B3
B2
B1
1
100
4.7
4.7
+12 V
+
0.1 µF 47 µF/25 V
+5 V
+
0.1 µF 10 µF/16 V
φ TG
φ2
φ 2L
Cautions 1. Leave pins 6, 7, 11, 12, 21, 22, 26, 27 (IC) unconnected.
2. Connect the No connection pins (NC) to GND.
Remarks 1. The inverters shown in the above application circuit example are the 74HC04 (fφ RB < 2 MHz, (fφ 1, fφ 2)
< 1 MHz) or 74AC04 (2 MHz fφ RB 8 MHz, 1 MHz (fφ 1, fφ 2) 6 MHz).
2. The input clock register of φ RB (2 pin) shown in the above application circuit example are the 200
(74HC04) or 300 (74AC04).
3. Inverters B1 to B3 in the above application circuit example are shown in the figure blow.
B1 to B3 EQUIVALENT CIRCUIT
CCD
VOUT
100
100
2SC945
2 k
+12 V
+
47 µF/25 V
18 Data Sheet S16032EJ3V0DS


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COLOR CCD LINEAR IMAGE SENSOR

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µ PD8880
PACKAGE DRAWING
µ PD8880CY
CCD LINEAR IMAGE SENSOR 32-PIN PLASTIC DIP (10.16 mm (400) )
(Unit : mm)
55.2±0.5
1st valid pixel
32
54.8±0.5
5.9±0.3 1
17
1
12.6±0.5
46.7
1.02±0.15
16
4.1±0.5
2.0
4.55±0.5
10.16±0.20
(1.80) 2
0.46±0.1
2.54±0.25
(5.42)
4.21±0.5
2.58±0.3 3
10
.16
+0.7
0.2
0.25±0.05
Name
Plastic cap
Dimensions
52.2×6.4×0.7
Refractive index
1.5
1 1st valid pixel
The center of the pin1
2 The surface of the CCD chip
The top of the cap
3 The bottom of the package
The surface of the CCD chip
32C-1CCD-PKG4-2
Data Sheet S16032EJ3V0DS
19


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COLOR CCD LINEAR IMAGE SENSOR

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µ PD8880
RECOMMENDED SOLDERING CONDITIONS
When soldering this product, it is highly recommended to observe the conditions as shown below.
If other soldering processes are used, or if the soldering is performed under different conditions, please make sure
to consult with our sales offices.
Type of Through-hole Device
µ PD8880CY : CCD linear image sensor 32-pin plastic DIP (10.16 mm (400))
Process
Conditions
Partial heating method
Pin temperature : 300°C or below, Heat time : 3 seconds or less (per pin)
Cautions 1. During assembly care should be taken to prevent solder or flux from contacting the plastic
cap. The optical characteristics could be degraded by such contact.
2. Soldering by the solder flow method may have deleterious effects on prevention of plastic cap
soiling and heat resistance. So the method cannot be guaranteed.
20 Data Sheet S16032EJ3V0DS


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µ PD8880
NOTES ON HANDLING THE PACKAGES
1 DUST AND DIRT PROTECTING
The optical characteristics of the CCD will be degraded if the cap is scratched during cleaning. Don’t either
touch plastic cap surface by hand or have any object come in contact with plastic cap surface. Should dirt
stick to a plastic cap surface, blow it off with an air blower. For dirt stuck through electricity ionized air is
recommended. And if the plastic cap surface is grease stained, clean with our recommended solvents.
CLEANING THE PLASTIC CAP
Care should be taken when cleaning the surface to prevent scratches.
We recommend cleaning the cap with a soft cloth moistened with one of the recommended solvents below.
Excessive pressure should not be applied to the cap during cleaning. If the cap requires multiple cleanings it is
recommended that a clean surface or cloth be used.
RECOMMENDED SOLVENTS
The following are the recommended solvents for cleaning the CCD plastic cap.
Use of solvents other than these could result in optical or physical degradation in the plastic cap.
Please consult your sales office when considering an alternative solvent.
Solvents
Ethyl Alcohol
Methyl Alcohol
Isopropyl Alcohol
N-methyl Pyrrolidone
Symbol
EtOH
MeOH
IPA
NMP
2 MOUNTING OF THE PACKAGE
The application of an excessive load to the package may cause the package to warp or break, or cause chips
to come off internally. Particular care should be taken when mounting the package on the circuit board. Don't
have any object come in contact with plastic cap. You should not reform the lead frame. We recommended to
use a IC-inserter when you assemble to PCB.
Also, be care that the any of the following can cause the package to crack or dust to be generated.
1. Applying heat to the external leads for an extended period of time with soldering iron.
2. Applying repetitive bending stress to the external leads.
3. Rapid cooling or heating
3 OPERATE AND STORAGE ENVIRONMENTS
Operate in clean environments. CCD image sensors are precise optical equipment that should not be subject
to mechanical shocks. Exposure to high temperatures or humidity will affect the characteristics. So avoid
storage or usage in such conditions.
Keep in a case to protect from dust and dirt. Dew condensation may occur on CCD image sensors when the
devices are transported from a low-temperature environment to a high-temperature environment. Avoid such
rapid temperature changes.
For more details, refer to our document "Review of Quality and Reliability Handbook" (C12769E)
4 ELECTROSTATIC BREAKDOWN
CCD image sensor is protected against static electricity, but destruction due to static electricity is sometimes
detected. Before handling be sure to take the following protective measures.
1. Ground the tools such as soldering iron, radio cutting pliers of or pincer.
2. Install a conductive mat or on the floor or working table to prevent the generation of static electricity.
3. Either handle bare handed or use non-chargeable gloves, clothes or material.
4. Ionized air is recommended for discharge when handling CCD image sensor.
5. For the shipment of mounted substrates, use box treated for prevention of static charges.
6. Anyone who is handling CCD image sensors, mounting them on PCBs or testing or inspecting PCBs on
which CCD image sensors have been mounted must wear anti-static bands such as wrist straps and ankle
straps which are grounded via a series resistance connection of about 1 M.
Data Sheet S16032EJ3V0DS
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NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note:
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity
as much as possible, and quickly dissipate it once, when it has occurred. Environmental control
must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using
insulators that easily build static electricity. Semiconductor devices must be stored and transported
in an anti-static container, static shielding bag or conductive material. All test and measurement
tools including work bench and floor should be grounded. The operator should be grounded using
wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need
to be taken for PW boards with semiconductor devices on it.
2 HANDLING OF UNUSED INPUT PINS FOR CMOS
Note:
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided
to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels
of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused
pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of
being an output pin. All handling related to the unused pins must be judged device by device and
related specifications governing the devices.
3 STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note:
Power-on does not necessarily define initial status of MOS device. Production process of MOS
does not define the initial operation status of the device. Immediately after the power source is
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the
reset signal is received. Reset operation must be executed immediately after power-on for devices
having reset function.
Data Sheet S16032EJ3V0DS
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The information in this document is current as of July, 2003. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or
data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all
products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without the prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from the use of NEC Electronics products listed in this document
or any other liability arising from the use of such products. No license, express, implied or otherwise, is
granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others.
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of a customer's equipment shall be done under the full
responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by
customers or third parties arising from the use of these circuits, software and information.
While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products,
customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To
minimize risks of damage to property or injury (including death) to persons arising from defects in NEC
Electronics products, customers must incorporate sufficient safety measures in their design, such as
redundancy, fire-containment and anti-failure features.
NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and
"Specific".
The "Specific" quality grade applies only to NEC Electronics products developed based on a customer-
designated "quality assurance program" for a specific application. The recommended applications of an NEC
Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of
each NEC Electronics product before using it in a particular application.
"Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio
and visual equipment, home electronic appliances, machine tools, personal electronic equipment
and industrial robots.
"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support).
"Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems and medical equipment for life support, etc.
The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC
Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications
not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to
determine NEC Electronics' willingness to support a given application.
(Note)
(1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its
majority-owned subsidiaries.
(2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as
defined above).
M8E 02. 11-1




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