TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Toshiba Bipolar Linear Integrated Circuit Silicon Monolithic
TA1316AN
TA1316AN
YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double
Scan TV
TA1316AN is a component signal and sync processor for Digital
TV, Progressive scan TV and Double scan TV.
TA1316AN provides high performance signal processors in the
luminance and color difference blocks. The sync circuit can
process 525I/P, 625I/P, 750P, 1125I/P, PAL100 Hz and
NTSC120 Hz formats.
TA1316AN provides I2C bus interface, so various functions and
controls are adjustable via the bus.
Features
Luminance Block
Black stretch, DC restoration
Dynamic DŽ correction
SRT (LTI)
Y group delay correction (shoot balance correction)
APACON white peak limit
White pulse limit (white letter improvement)
Hi-bright color
Color detail enhancer (CDE)
VSM output
Color Difference Block
Flesh color correction
Dynamic Y/C correction
Color SRT (CTI)
Color DŽ
White peak blue correction
Text Block
OSD blending SW
ACB (only black level)
2 analog RGB inputs
Synchronization Block
Horizontal synchronization
(15.75 kHz, 31.5 kHz, 33.75 kHz, 45 kHz)
Vertical synchronization
(525I/P, 625I/P, 750P, 1125I/P, PAL 100 Hz, NTSC 120 Hz)
2-and 3-level sync. separation circuit
Accept both positive and negative HD/VD input
Mask for copy-guard signal
Vertical blanking
Weight: 5.55 g (typ.)
1 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Block Diagram
TA1316AN
19 25 29 32
345
8 9 10
Y/C VCC 55
Y/C GND 6
CLAMP
CLAMP
CP
SW
RGB VCC 40
RGB GND 44
SCL 30
SDA 31
DAC2 36
(ACB PLUSE)
28
SCP OUT 18
SCP IN 17
H-OUT 26
HORIZONTAL
FREQUENCY 22
SW
HVCO 21
AFC FILTER 20
H CURVE 23
CORRECTION
FBP IN 24
VP OUT 27
SYNC IN 14
HD1 IN 16
HD2 IN 13
VD1 IN 15
VD2 IN 12
R OUT 43
G OUT 42
B OUT 41
I2CBUS
DECODER
SW
DAC2
SW
DAC1
SYNC OUT
+
YHDPbPr/YCbCrĺ YUV CONVERT
U
V
Y
BLACK
UVĺ IQ
STRETCH
CONVERTER
FRESH
COLOR
BLACK LEVEL
CORECTION
IQĺ UV
CONVERTER
DYNAMIC γ
BLACK PEAK
DETECT
DARK
DET
SW
Y/C LEVEL
COMP
DC REST
SHARPNESS
DELAY LINE
APL
DETECT
H DUTY
H
FREQUENCY
SW
H C/D
HORIZONTAL
PHASE
H CURVE
CORRECTION
HVCO
H-AFC
CP/BPP
EXT
BPP
BPP
SW
EXT
CP
CLAMP
PULSE
CP
SW
CP
+
H-BPP V-BPP
FBP/BLK H-RAMP 2 × fH
VP OUT
SYNC
SEPA
HD IN SW
V C/D
V
FREQUENCY
SW
CLAMP
PULSE
EXT
V-BLK
ACB
PULSE
HD
POLARITY H-BLK + V-BLK
TINT
SRT
YNR
DL/
COLOR
SRT
GROUP
DELAY +
CORRECTION
APACON
WPL
SHARPNESS
CONTROL
COLOR
UNI-COLOR
CP
RELATIVE
PHASE/
AMPLITUDE
G-Y
MATRIX
B-Y
R-Y G-Y
COLOR
γ
+
SUB-
CONTRAST
UNI-
COLOR
CLAMP
WPL
WPS
HI-BRIGHT
COLOR
Yout-γ
Y DETAIL
CONTROL
CDE
BRIGHTNESS
ABCL
AMP
HALF TONE
/C MUTE
HALF TONE
HPF
V
INTEGRAL
V-CLP
WP BLUE
COLOR
PEAK
DETECT
VSM AMP
VD IN SW
CP
CLAMP
VSM
MUTE
RGB OUT
BLK
SW
CP
CLAMP
S/H
RGB
Y
MATRIX
DRIVE
MIXER SW/
BLUE BACK
OSD
ACL SW
CP
CUT OFF
RGB
BRIGHTNESS
CLAMP YM SW
OSD
AMP
CP
CLAMP OR
IK RGB
CONTRAST
7 MATRIX SW
2 BPH FILTER
1 DARK AREA
DET FILTER
56 APL FILTER
53 ABCL IN
11
COLOR
LIMITER
54 VSM OUT
39
ANALOG
OSD R IN
38 ANALOG
OSD G IN
37 ANALOG
OSD B IN
51 YS1
(ANALOG OSD)
50 YS2
(ANALOG OSD)
45 48 47 46
35 34 33 49 52
2 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin Assignment
DARK AREA DET FILTER 1
BPH FILTER 2
Y1 IN 3
Cb1/Pb1 IN 4
Cr1/Pr1 IN 5
Y/C GND 6
MATRIX SW 7
Y2 IN 8
Cb2/Pb2 IN 9
Cr2/Pr2 IN 10
COLOR LIMITER 11
VD2 IN 12
HD2 IN 13
SYNC IN 14
VD1 IN 15
HD1 IN 16
SCP IN 17
SCP OUT 18
DEF/DAC VCC 19
AFC FILTER 20
HVCO 21
HORIZONTAL FREQUENCY SW 22
H CURVE CORRECTION 23
FBP IN 24
DEF/DAC GND 25
H-OUT 26
VP OUT 27
28
TA1316AN
TA1316AN
56 APL FILTER
55 Y/C VCC
54 VSM OUT
53 ABCL IN
52 YM/P-MUTE/BLK
51 YS 1 (analog OSD)
50 YS 2 (analog OSD)
49 YS 3 (analog RGB)
48 R S/H
47 G S/H
46 B S/H
45 IK IN
44 RGB GND
43 R OUT
42 G OUT
41 B OUT
40 RGB VCC
39 ANALOG OSD R IN
38 ANALOG OSD G IN
37 ANALOG OSD B IN
36 DAC2 (ACB pulse)
35 ANALOG R IN
34 ANALOG G IN
33 ANALOG B IN
32 I2L GND
31 SDA
30 SCL
29 I2L VDD
3 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin Functions
Pin
No.
Pin Name
Function
1
DARK AREA DET
FILTER
Connect filter for detecting
black area.
Voltage value of this pin
controls dynamic γ circuit gain.
1
2 BPH FILTER
Connect filter for detecting
black peak.
Voltage value of this pin
controls black stretch gain.
2
Interface Circuit
55
5 k
6
55
200
1 k
6
4
TA1316AN
Input Signal/Output Signal
DC
DC
2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
Function
3 Y1 IN
Inputs Y1 signal via clamp
capacitor.
Recommended input
amplitude: 1 Vp-p (including
sync) at 100% color bar.
3
1 k
1 k
5 k
Interface Circuit
55
6
4 Cb1/Pb1 IN
Inputs Cb1/Pb1 signal via
clamp capacitor.
Recommended input
amplitude: 700 mVp-p at 100%
color bar.
4
1 k
1 k
5 k
55
6
TA1316AN
Input Signal/Output Signal
1 Vp-p (including sync) at 100% color bar
or
700 mVp-p at 100% color bar for Cb1/Pb1
5 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
Function
5 Cr1/Pr1 IN
6 Y/C GND
7 MATRIX SW
Inputs Cr1/Pr1 signal via clamp
capacitor.
Recommended input
amplitude: 700 mVp-p at 100%
color bar.
5
1 k
1 k
5 k
GND pin for Y/C block.
Matrix switching pin for YCbCr
or YPbPr input.
Switches matrix according to
voltage value input to this pin
when BUS control “YUV
INPUT MODE” = 00 or 01.
Then, control by pin has
priority over control by BUS
(see table 4).
When pin is not used, connect
0.01 µF capacitor between pin
and GND.
7
BUS
1 k
Interface Circuit
55
6
55
6
TA1316AN
Input Signal/Output Signal
100 mVp-p at 100% color bar for Cr1/Pr1
When YUV INPUT MODE = 00 or 01,
0~0.6 V: YCbCr Internal YUV
0.9~5 V: YPbPr Internal YUV
Open: BUS control
6 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
Function
8 Y2 IN
Inputs Y2 signal via clamp
capacitor.
Recommended input
amplitude: 1 Vp-p (including
sync) at 100% color bar.
8
1 k
1 k
5 k
Interface Circuit
55
6
9 Cb2/Pb2 IN
Inputs Cb2/Pb2 signal via
clamp capacitor.
Recommended input
amplitude: 700 mVp-p at 100%
color bar.
9
1 k
1 k
5 k
55
6
TA1316AN
Input Signal/Output Signal
1 Vp-p (including sync) at 100% color bar
or
700 mVp-p at 100% color bar for Cb2/Pb2
7 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
Function
10 Cr2/Pr2 IN
Inputs Cr2/Pr2 signal via clamp
capacitor.
Recommended input
amplitude: 700 mVp-p at 100%
color bar.
10
1 k
1 k
5 k
11 COLOR LIMITER
Connect filter for detecting
color limit.
11
5 k
Interface Circuit
55
6
55
6
TA1316AN
Input Signal/Output Signal
700 mVp-p at 100% color bar for Cr2/Pr2
DC
8 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
Function
12 VD2 IN
Inputs vertical sync signal
VD2. Signal input can have
both positive and negative
polarity.
1 k
12
13 HD2 IN
Inputs horizontal sync signal
HD2. Signal input can have
both positive and negative
1 k
13
polarity.
Interface Circuit
19
25
19
25
TA1316AN
Input Signal/Output Signal
Threshold:
0.75 V
or
Threshold:
0.75 V
Threshold:
0.75 V
or
Threshold:
0.75 V
9 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
Function
Interface Circuit
19
14 SYNC IN
15 VD1 IN
Inputs sync signal via clamp
capacitor.
14
1 k
25
Inputs vertical sync signal
VD1. Signal input can have
both positive and negative
polarity.
1 k
15
19
25
TA1316AN
Input Signal/Output Signal
White 100%: 1 Vp-p
or
Threshold:
0.75 V
or
Threshold:
0.75 V
10 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
Function
16 HD1 IN
Inputs horizontal sync signal
HD1. Input signal can have
both positive and negative
1 k
16
polarity.
17 SCP IN
18 SCP OUT
Inputs SCP from up converter.
Input signals are clamp pulse
(CP) and black peak detection
stop pulse (BPP).
17
5 k
Outputs SCP.
Output signals are clamp pulse
(CP) and black peak detection
stop pulse (BPP).
(Note) Don’t use
Horizontal-BPP (H-BPP) for
the timing pulse of picture
period on the screen (e.g.
H-BLK) because H-BPP width
will be changed by the
temperature.
18
200
Interface Circuit
19
25
19
25
19
25
11
TA1316AN
Input Signal/Output Signal
Threshold:
0.75 V
or
Threshold:
0.75 V
2.2 V~2.8 V: BPP
4.7 V~9 V: CP
CP: 5.0 V
BPP: 2.5 V
0V
2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
19 DEF/DAC VCC
Function
VCC pin for DEF/DAC block.
To ascertain the correct
voltage for VCC, please refer to
the table entitled Maximum
Ratings.
20 AFC FILTER
Connect filter for detecting
AFC.
300
20
21 HVCO
Connect ceramic oscillator for
horizontal oscillation.
Use Murata
CSBLA503KECZF30
oscillator.
21
1 k
10 k
Interface Circuit
19
25
19
25
12
TA1316AN
Input Signal/Output Signal
DC
2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
HORIZONTAL
22 FREQUENCY
SW
Function
Horizontal frequency select
pin.
Selects horizontal frequency
according to voltage value
input to this pin.
When selecting horizontal
frequency by BUS control,
leave pin open. Control by pin
has priority over control by
BUS.
22
When this IC will be used on
CRT, the frequency of H-out
(pin 26) should be controlled
by DC voltage which is divided
from voltage of DEF VCC (pin
19) by resisters.
1 k
30 k
23
H CURVE
CORRECTION
Corrects curve at high-tension
fluctuation.
Input AC component of
high-tension fluctuation.
When pin is not used, connect
0.01 µF capacitor between pin
and GND.
23
1 k
Interface Circuit
19
6.5 V
25
13
TA1316AN
Input Signal/Output Signal
19
7.5 V
4.5 V
1.5 V
At BUS control (horizontal frequency):
output voltage value
00 (15.75 kHz): DC 9 V
01 (31.5 kHz): DC 6 V
10 (33.75 kHz): DC 3 V
11 (45 kHz): DC 0 V
At pin 22 control, horizontal frequency
and input voltage value
0~1.0 V:
2.0~4.0 V:
5.0~7.0 V:
8.0~9.0 V:
45 kHz
33.75 kHz
31.5 kHz
15.75 kHz
25
DC
2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
Function
Interface Circuit
19
24 FBP IN
25 DEF/DAC GND
26 H-OUT
Input FBP and H-BLK for
horizontal AFC.
24 500
1 k
GND pin for DEF/DAC block.
Horizontal output pin. Open
collector output.
26
5 k
25
19
25
14
TA1316AN
Input Signal/Output Signal
max: 9 V
H-AFC threshold: 3.0 V
BLK threshold: 1.5 V
2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
27 VP OUT
28
DAC1
(SYNC OUT)
29 I2L VDD
Function
Outputs vertical pulse.
When a current is applied to
the pin, external blanking is
carried out by ORing this
signal with the internal
blanking signal.
27
(Note) When H-POSITION will
be changed, VP width will
change. Use the start phase of
VP.
200
Outputs 1-bit DAC or
composite SYNC signal after
sync separation.
Open-collector output
(The output level for this pin
cannot be guaranteed since
leakage from internal signals
may occur.)
28
500
VDD pin for I2L block.
Connect 2 V (typ.).
Power to pin 29 should be
supplied from pin 19 via zener
diode through resister.
Interface Circuit
19
32
25
19
32
25
15
TA1316AN
Input Signal/Output Signal
VP output:
5V
0V
Start phase
V-BLK input current: 780 µA~1 mA
DC or SYNC OUT
2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
Function
30 SCL
SCL pin for I2C BUS.
30
31 SDA
SDA pin for I2C BUS.
31
32 I2L GND
GND pin for I2L block.
Interface Circuit
19
5 k
SCL
25
32
19
50 5 k
ACK
SDA
25
32
16
TA1316AN
Input Signal/Output Signal
2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
Function
33 ANALOG B IN
34 ANALOG G IN
35 ANALOG R IN
Inputs analog R/G/B signal via
clamp capacitor.
Recommended input
amplitude: 0.7 Vp-p (no sync)
at 100% white
33
34
35
1 k
1 k
1 k
36
DAC2
(ACB pulse)
Outputs 1-bit DAC or ACB
pulse
Open-collector output
36
500
Interface Circuit
40
44
40
44
17
TA1316AN
Input Signal/Output Signal
100 IRE: 0.7 Vp-p
DC or ACB pulse
2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
Function
37 ANALOG OSD B IN
38 ANALOG OSD G IN
39 ANALOG OSD R IN
Inputs analog OSD signal via
clamp capacitor.
Recommended input
amplitude: 0.7 Vp-p (no sync)
at 100% white
37
38
39
40 RGB VCC
VCC pin for text/RGB block.
To ascertain the correct
voltage for VCC, please refer to
the table entitled Maximum
Ratings.
41 B OUT
42 G OUT
43 R OUT
Outputs R/G/B signal.
Recommended output
amplitude: 100 IRE = 2.3 Vp-p
41
42
43
44 RGB GND
GND pin for text/RGB block.
1 k
1 k
1 k
200
Interface Circuit
40
44
40
44
18
TA1316AN
Input Signal/Output Signal
100 IRE: 0.7 Vp-p
100 IRE: 2.3 Vp-p
Conditions:
UNI-COLOR = max
SUB-CONT = Cent
Y IN = 0.7 Vp-p
2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
45 IK IN
46 B S/H
47 G S/H
48 R S/H
Function
Inputs the feedback signal
from CRT. (BLK level should
be 0 V to 3 V.)
When ACB is not used,
connect this pin to the RGB
VCC pin.
1 k
45
Interface Circuit
40
44
40
Sample-and-hold (S/H) pin.
In ACB mode connect a 2.2-µF
capacitor. In CUTOFF mode
connect a 0.01-µF capacitor.
46
47
48
500
1 k5 k
44
19
TA1316AN
Input Signal/Output Signal
RGB
0 V~3 V
1 Vp-p (typ.)
or RGB VCC
DC
2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
49
YS3
(analog RGB)
50 YS2
(analog OSD)
51 YS1
(analog OSD)
Function
Selects input between internal
RGB and external analog RGB
according to voltage value
input to this pin.
When analog RGB is selected,
mutes VSM output.
49
300
300
Switches between internal
RGB and OSD input signals.
Voltage applied to YS1 and
YS2 adjusts blend ratio of
internal RGB and OSD signals.
When YS1 or YS2 is High,
mutes VSM output.
Blend ratio
YS2 YS1 Int RGB:
OSD RGB
L L 10:0
50
51
H L 7:3
L H 5:5
H H 0:10
300
Interface Circuit
40
44
40
44
TA1316AN
Input Signal/Output Signal
0~0.5 V: Internal
1.5~9 V: Analog RGB, VSM mute
0~0.5 V: Internal
1.1~1.7 V: VSM mute
2.9~9 V: OSD, VSM mute
20 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
52 YM/P-MUTE/BLK
53 ABCL IN
Function
Fast half-tone switch for
internal RGB signal.
Also performs image mute or
blanking.
52
ABL and ACL input pin.
Can set gain and start point for
ABL and dynamic ABL by BUS 53
control.
300
Interface Circuit
40
44
40
30 k3 k
44
TA1316AN
Input Signal/Output Signal
0~0.5 V: Internal
1.2~1.8 V: Half-tone
2.7~4.0 V: P-mute
7~9 V: Blanking
DC
21 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Pin
No.
Pin Name
54 VSM OUT
55 Y/C VCC
56 APL FILTER
Function
Interface Circuit
Outputs Y signal for VSM
which passes through HPF
circuit (primary differential
circuit).
Mutes output signal using pins
49, 50 and 51.
54
200
VCC pin for Y/C block.
To ascertain the correct
voltage for VCC, please refer to
the table entitled Maximum
Ratings.
Connect filter for correcting DC
restoration.
Leaving this pin open enables
user to monitor Y signal after
black stretch and dynamic γ.
56
40 k
1 k
1 k
40
6
55
6
22
TA1316AN
Input Signal/Output Signal
2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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TA1316AN
Bus Control Map
Write Mode
Slave Address: 88H
Sub-Add
D7
D6
D5
D4
D3
D2
D1
D0
Preset
00
H-FREQ
H-DUTY YUV-SW DAC1
DAC2
SYNC INPUT-SW 1000 0000
01
HORIZONTAL POSITION
CLP-PHS 1000 0000
02
ACB-MODE
SCP-SW HBP-PHS SYNC SEP-LEVEL
TEST
1000 0000
03 V-BLK PHASE
VERTICAL FREQUENCY
1000 0000
04 COMPRESSION-BLK PHASE-1
COMPRESSION-BLK PHASE-2
1000 0000
05 P-MODE1
UNI-COLOR
1000 0000
06
BRIGHTNESS
1000 0000
07 OSD-ACL
COLOR
1000 0000
08
TINT
RGB-ACL 1000 0000
09
PICTURE SHARPNESS
YNR
1000 0000
0A
RGB BRIGHTNESS
DCRR-SW 1000 0000
0B HI BRT
RGB CONTRAST
1000 0000
0C
SUB CONTRAST
WPS
YUV INPUT MODE 1000 0000
0D
DRIVE GAIN1
DR-R 1000 0000
0E
DRIVE GAIN2
DR-B/G 1000 0000
0F
R CUT OFF
1000 0000
10
G CUT OFF
1000 0000
11
B CUT OFF
1000 0000
12 R-Y/B-Y GAIN
R-Y/B-Y PHASE
1000 0000
13 G-Y/B-Y GAIN
G-Y/B-Y PHASE
1000 0000
14 COLOR SRT GAIN
C-SRT FREQ
COLOR γ
CLT 1000 0000
15
C.D.E.
Y/C GAIN COMP1
Y/C GAIN COMP2
FRESH-COLOR
1000 0000
16 VSM PHASE
VSM GAIN
APACON PEAK FREQ 1000 0000
17 DC REST POINT
DC REST RATE
DC REST LIMIT
1000 0000
18 BLACK STRETCH POINT
APL VS BSP
B.L.C.
B.D.L BS-ARE 1000 0000
19 SHR-TRACKING
WPL-LEVEL
WPL-FREQ
1000 0000
1A DYNAMIC ABL POINT
DYNAMIC ABL GAIN
P-MODE2
1000 0000
1B ABL POINT
ABL GAIN
RGB OUT MODE
1000 0000
1C
DYNC γ -POINT
DYNC γ GAIN VS DARK AREA
STATIC γ -GAIN
Y-OUT γ 1000 0000
1D
OSD BRIGHT
OSD CONTRAST Y/C-DL1
APACON WPL
1000 0000
1E Y DETAIL CONTROL
WP BLUE POINT
1000 0000
1F
Y GROUP DELAY CORRECTION
Y/C-DL2
WP BLUE GAIN
1000 0000
Read Mode
Slave Address: 89H
D7 D6 D5 D4 D3 D2 D1 D0
0
POR
IK-IN RGB-OUT YUV-IN H-OUT VP-OUT RGB-IN SYNC-IN
23 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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TA1316AN
Bus Control Functions
Write Mode
Parameter
H-FREQUENCY
H-DUTY
YUV-SW
DAC 1
DAC 2
SYNC INPUT-SW
HORIZONTAL
POSITION
CLP-PHS
ACB MODE
SCP-SW
HBP-PHS
SYNC SEP-LEVEL
TEST
Explanation
Preset
Selects horizontal oscillation frequency.
00: 15.75 kHz, 01: 31.5 kHz, 10: 33.75 kHz, 11: 45 kHz
33.75 kHz
Control by pin 22 has priority over BUS control. When this IC will be used on CRT,
the frequency of H-out should be controlled by pin 22.
Switches horizontal output duty.
0: 41%, 1: 47%
41%
Switches YUV input.
0: INPUT-1 (Y1/Cb1/Cr1), 1: INPUT-2 (Y2/Cb2/Cr2)
Switches DAC control output.
Don't use this function
INPUT-1
Open
Switches DAC control output.
0: On (low), 1: Open (high)
When TEST = 00, controls 1-bit DAC when output is open-collector.
On
When TEST = 01, outputs ACB reference pulse from pin 36.
Selects sync input.
00: Selects HD1/VD1 input.
01: Selects HD2/VD2 input.
HD/VD1
10/11: Selects SYNC input.
Adjusts horizontal picture phase.
0000000 (10.5%)~1111111 (+10.5%)
Center
(Note) When H-POSITION will be changed, VP width (pin 27) will change.
Switches clamp pulse phase.
0: 0.7-µs (2.5%) width with 1.1-µs (3.8%) delay from HD stop phase
1: 0.7-µs (2.4%) width with 0.2-µs (0.7%) delay from HD stop phase
While quiescent, 0.8-µs (2.7%) width with 1.2-µs (4.2%) delay from FBP start
phase
1.1-µs delay
Also switches CP phase of SCP-OUT (pin 18).
Sets ACB mode. Selects reference level for convergence.
00: ACB off (cutoff BUS control), 01: ACB on (5 IRE),
ACB on (10 IRE)
10: ACB on (10 IRE), 11: ACB on (20 IRE)
Switches SCP (sandcastle pulse) mode.
0: Internal mode, 1: External input mode
Also switches SCP-OUT (pin 18).
Inside IC
(Note) Don’t use H-BPP for the timing pulse, because H-BPP width of internal
mode will be changed by the temperature.
Switches horizontal black peak detection pulse phase.
0: ±6.3% of FBP, 1: ±3.5% of FBP
6.3% width
Selects SYNC separation level.
00: 8.5%, 01: 20%, 10: 30%, 11: 40%
min
Test mode
When TEST = 00, controls 1-bit DAC when output is open-collector.
When TEST = 01, outputs H-SYNC from pin 28 and ACB reference pulse from pin 00
36.
Do not use TEST = 10/11 because this is used for IC Shipment Test mode.
24 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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TA1316AN
Parameter
Explanation
Preset
V-BLK PHASE
V-FREQUENCY
COMPRESSION-BLK
PHASE-1/2
P-MODE1/2
UNI-COLOR
BRIGHTNESS
OSD-ACL
COLOR
TINT
RGB-ACL
PICTURE-SHARPNESS
YNR
RGB-BRIGHTNESS
DCRR-SW
HI BRT
RGB-CONTRAST
SUB-CONTRAST
WPS
YUV INPUT MODE
Adjusts vertical BLK stop phase.
00000 (16H) ~11110 (46H) (1 H/STEP),
11111: Internal V-BLK off
Vertical free-running frequency. Sets vertical pull-in range (Table 1).
32 H
1281 H
Adjusts compression BLK phase. Adjusts BLK at top and bottom (Table 2).
Off
Selects picture mode. Selects between picture mute, half-tone, blue background,
and Y mute (Table 3).
P-MUTE 1
Adjusts unicolor.
0000000 (16.5dB) ~111 (0dB)
min
Adjusts brightness.
00000000 (40 IRE) ~11111111 (+40 IRE)
Center
Turns OSD-ACL on/off.
0: Off, 1: On
On
Adjusts color.
0000000: Color mute,
C-MUTE
0000001 (20dB or more) ~1111111 (+4.6dB)
Adjusts tint.
0000000 (32 deg) ~1111111 (+32 deg)
Center
Switches analog RGB-ACL sensitivity.
0: 6dB, 1: Normal
6 dB
Adjusts sharpness.
0000000 (10dB or more) ~1111111 (+17dB (at peak FREQ) )
Center
YNR: Turns luminance (Y) noise reduction (NR) on/off.
0: Off, 1: On
Lower two bits of PICTURE-SHARPNESS (09-D2/D1)
= 00: Trap (at peak FREQ)
= 11: Flat
Off
YNR level is controlled by lower two bits (09-D2) of PICTURE-SHARPNESS.
DL-APACON gain control by PICTURE-SHARPNESS is invalid.
Adjusts RGB brightness.
0000000 (20 IRE) ~1111111 (+20 IRE)
Center
Switches DC restoration rate.
0: 100% or more, 1: 100% or less
100% or more
Turns high bright color on/off.
0: Off, 1: On
On
Adjusts RGB contrast.
0000000 (16.5dB) ~1111111 (0dB)
min
Adjusts sub-contrast.
00000 (3.5dB) ~11111 (+2.6dB)
Center
Adjusts WPS level.
0: 110 IRE 1: 130 IRE
110 IRE
Selects Y/color difference signal input mode.
00: Y/Cb/Cr, 01: Y/Pb/Pr, 10: Through, 11: Y/U/V (TA1270)
Control by pin takes priority at 00 and 01 (table 4).
Y/Cb/Cr
(Ref.) Y/Cb/Cr: ITU-R BT 601
Y/Pb/Pr: ITU-R BT 709 (1125/60/2:1)
25 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Parameter
DRIVE GAIN1/2
DR-R
DR-B/G
R/G/B CUT OFF
R-Y/B-Y GAIN
R-Y/B-Y PHASE
G-Y/B-Y GAIN
G-Y/B-Y PHASE
COLOR SRT GAIN
C-SRT-FREQ
COLOR γ
CLT
CDE
Y/C GAIN COMP1/2
FRESH-COLOR
VSM-PHASE
VSM GAIN
APACON PEAK f0
DC REST POINT
DC REST RATE
DC REST LIMIT
Explanation
Adjusts drive gain 1 and drive gain 2.
0000000 (5dB) ~1111111 (+3dB)
Switches reference RGB drive gain (Table 5).
Adjusts R/G/B cutoff.
1) RGB-OUT when ACB off
00000000 (1.9 V) ~11111111 (2.9 V)
2)SENS-IN when ACB on
00000000 (0.5 Vp-p) ~11111111 (1.5 Vp-p)
Adjusts R-Y/B-Y relative amplitude.
0000 (0.54) ~1111 (0.85)
Adjusts R-Y/B-Y relative phase.
0000 (90 deg) ~1111 (111.5 deg)
Adjusts G-Y/B-Y relative amplitude.
0000 (0.28) ~1111 (0.38)
Adjusts G-Y/B-Y relative phase.
0000 (232 deg) ~1111 (256 deg)
Adjusts color SRT gain.
000 (min) ~111 (max)
Selects color SRT peak frequency.
00: 4.5 MHz, 01: 5.8 MHz, 10: 8.5 MHz, 11: Off
Selects color γ correction point.
00: Off, 01: 0.23 Vp-p, 10: 0.40 Vp-p, 11: 0.58 Vp-p
Switches color limiter level.
0: 1.65 Vp-p, 1: 2 Vp-p
Adjusts color detail enhancer.
00: min 11: max
Selects dynamic Y/C compensation.
COMP1, 00: Off, 01: min, 10: mid, 11: max
COMP2, 00: Off, 01: min, 10: mid, 11: max
Selects flesh color.
00: Off, 01: ±33.7 deg, Normal,
10: ±9.5 deg, High, 11: ±9.5 deg, Normal
Adjusts VSM phase.
000 (37.5 ns) ~101 (normal) ~111 (+15 ns)
Adjusts VSM gain.
000: OFF, 001: +3 dB, 111: +19 dB
Selects APACON peak frequency.
00: 13.5 MHz, 01: 9.5 MHz, 10: 7.3 MHz, 11: 4.7 MHz
DC restoration point
000: 0%, 111: 51%
Adjusts DC restoration rate.
000 (100%) ~111 (135% (65%) )
Selects DC restoration limit point.
00: 57%, 01: 71 , 10: 78%, 11: 78%
26
TA1316AN
Preset
Center
R
Center
Center
min
Center
min
Center
4.3 MHz
Off
1.65 Vp-p
Center
All off
Off
7.5 ns
Off
13.5 MHz
Center
100%
min
2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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TA1316AN
Parameter
Explanation
Preset
Adjusts black stretch point 1.
BLACK STRETCH POINT
000: OFF, 001 (34 IRE) ~111 (53 IRE)
Center
APL VS BSP
Adjusts black stretch point 2.
00 (0 IRE) ~11 (24 IRE) up
0 IRE
Turns black level automatic correction on/off.
B.L.C
Max: 8.5 IRE, black stretch has priority.
Off
0: Off, 1: On
B.D.L.
Switches black detection level.
0: 3 IRE, 1: 0 IRE
3 IRE
BS-ARE
Turns black stretch area on/off.
0: On, 1: Off
On
SHR-TRACKING
SHR tracking (adjusts SRT component gain.)
00 (SRT-GAIN max) ~11 (SRT-GAIN min)
Center
WPL-LEVEL
Adjusts white letter improvement amplitude.
000: min 111: max
min
WPL-FREQ
Adjusts white letter improvement start frequency.
000 (5 MHz) ~111 (16 MHz)
5 MHz
DYNAMIC ABL POINT
Adjusts dynamic ABL detection voltage.
000 (min) ~111 (max)
Center
DYNAMIC ABL GAIN
Adjusts dynamic ABL sensitivity.
000 (min) ~111 (max)
min
ABL POINT
Adjusts ABL detection voltage.
000 (min) ~111 (max)
Center
ABL GAIN
Adjusts ABL sensitivity.
000 (min) ~111 (max)
min
RGB-OUT MODE
Switches RGB output mode (switch for RGB output mode for test and adjustment).
Normal
00: Normal, 01: R only, 10: G only, 11: B only
DYNCγ-POINT
Switches dynamic Y γ point.
00: 20 IRE, 01: 21.5 IRE, 10: 23.5 IRE, 11: 25 IRE
23.5 IRE
DYNCγ GAIN VS DARK
AREA
Turns dynamic Y γ gain VS dark area on/off.
000 (min) ~
111 (max (when 25 IRE or below is 25% or more of area ratio, +3dB) )
min
STATICγ-GAIN
Turns static Y γ dark area gain on/off.
00: Off (0dB) 11: max (1.5dB, at this time, DYNCγ gain is +1.5dB max)
Off
Y-outγ
Turns Y-out γ on/off.
0: Off, 1: On
Off
OSD BRIGHT
Adjusts OSD brightness.
00: 5 IRE, 01: 0 IRE, 10: 5 IRE, 11: 10 IRE
5 IRE
OSD-CONTRAST
Adjusts OSD contrast.
00 (min (9.5dB) ) ~11 (max (0dB) )
min
Adjust Y/C relative phase: Y phase before RGB matrix is changed.
Y/C DL1/2
Y/C DL2 = 0 and Y/C DL1 = 0: 10 ns, Y/C DL2 = 0 and Y/C DL1 = 1: 5 ns
10 ns
Y/C DL2 = 1 and Y/C DL1 = 0: 0 ns, Y/C DL2 = 1 and Y/C DL1 = 1: +5 ns
APACON WPL
Adjusts APACON white peak limiter.
000 (Off) ~111 (Maximum effect of positive limiter)
Off
27 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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TA1316AN
Parameter
Y DETAIL CONTROL
WP BLUE POINT
Y-GROUP DELAY
CORRECTION
WP BLUE GAIN
Explanation
Controls Y detail: Adjusts differential signal for frequency other than picture
sharpness.
00000 (min (trap) ) ~11111 (max (+6dB) )
Peak frequency linked to APACON PEAK FREQ
00: 5.5 MHz, 01: 3.7 MHz, 10: 14.5 MHz, 11: 10 MHz
Adjusts white peak blue point.
000 (60 IRE) ~111 (112 IRE)
Corrects Y group delay.
0000: Decreases preshoot gain (increases overshoot gain).
1111: Decreases overshoot gain (increases preshoot gain).
Adjusts white peak blue gain.
000 (min (+2.3 dB) ) ~111 (max (+10 dB) )
Preset
Center
min
Center
min
Table 1: Vertical Frequency
Data
V PULL-IN Range
000 48~1281H
001 48~849H
010 48~725H
011 48~660H
100 48~613H
101 48~363H
110 48~307H
111 VP-OUT HI
V-BPP
Start Phase
Stop Phase
1100H
730H
600H
545H
500H
290H
V-BLK P.
(C.BLK P.)
+20 H
240H
Format/V-FREQUENCY, H-FREQUENCY
1125P/30 Hz (33.75 kHz)
750P/60 Hz (45 kHz)
625P/50 Hz (31.5 kHz)
1125I/60 Hz (33.75 kHz)
525P/60 Hz (31.5 kHz)
PAL/SECAM/50 Hz (15.625 kHz),
100 Hz (31.5 kHz)
NTSC/60 Hz (15.734 kHz),
120 Hz (31.5 kHz)
Table 2: Compression-BLK Phase
V-FREQUENCY
000
001
010
011
100
101
110
111
PHASE-1 (start phase)
PHASE-2 (stop phase)
1088H~1118H
720H~750H
592H~622H
528H~558H
488H~518H
280H~310H
224H~254H
50H~78H
(0000: C-BLK OFF)
C-BLK OFF
28 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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TA1316AN
Table 3: P-Mode
05-D7 1A-D1 1A-D0
MODE
Details
Can mute picture or half-tone main signal using YM pin.
0 0 0 NORMAL 1 Can insert analog RGB-IN using Ys3; OSD-IN using Ys1/Ys2.
Analog RGB-IN > P-Mute
Mutes main signal Y in whole picture using BUS.
0 0 1 Y-MUTE Can insert analog RGB-IN using Ys3; OSD-IN using Ys1/Ys2.
Analog RGB-IN > P-Mute
Half-tones main signal in whole picture using BUS.
010
YM 1
Can insert P-Mute using YM pin.
Can insert analog RGB-IN using Ys3.
Blends OSD-IN with main H/T signal using Ys1/Ys2.
Analog RGB-IN > P-Mute
Blue-backs main signal using BUS.
011
Can insert P-Mute using YM pin.
BB
Can insert analog RGB-IN using Ys3; OSD-IN using Ys1/Ys2.
Analog RGB-IN > P-Mute
Mutes main signal in whole picture using BUS.
1 0 0 P-MUTE 1 Can insert analog RGB-IN using Ys3; OSD-IN using Ys1/Ys2.
Analog RGB-IN > P-Mute
101
YM2 Cannot be used.
1 1 0 P-MUTE 2 Cannot be used.
1 1 1 NORMAL 2 Cannot be used.
Output priority: main signal < BB < P-MUTE < RGB-IN < OSD-IN
Table 4: YUV INPUT MODE
YUV INPUT MODE
00
01
10
11
Pin 7
LOW
HIGH
OPEN
LOW
HIGH
OPEN
MATRIX
YCbCr Internal YUV
YPbPr Internal YUV
YCbCr Internal YUV
YCbCr Internal YUV
YPbPr Internal YUV
YPbPr Internal YUV
Through
YUV Internal YUV
29 2002-10-04


TA1316AN (Toshiba Semiconductor)
YCbCr/YPbPr Signal and Sync Processor

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Table 5: DR-R, DR-B/G
0D-D0
0
0
1
1
0E-D0
0
1
0
1
Reference Axis
R
R
G
B
Drive Gain1
G
G
R
G
TA1316AN
Drive Gain2
B
B
B
R
Read Mode
Parameter
POR
IK-IN
RGB-OUT
YUV-IN
H-OUT
VP-OUT
RGB-IN
SYNC-IN
Explanation
Power-on reset
0: Register preset, 1: Normal
After power-on, 0 is read on first read; 1 on subsequent reads.
IK input detection: detects input to pin 45.
0: NG (no input), 1: OK (input)
RGB-OUT self-check result: detects output from pins 41, 42 and 43.
0: NG (no output), 1: OK (output)
Returns OK when signal is detected on all three outputs. If signals are small, does not return
OK.
YUV-IN self-check result: detects input to pins 3, 4 and 5 or pins 8, 9 and 10.
0: NG (no input), 1: OK (input)
Returns OK when AC signal is detected on all three inputs. If signals are small or are DC
voltage, does not return OK.
H-OUT self-check result: detects output from pin 26.
0: NG (no output), 1: OK (output)
VP-OUT self-check result: detects output from pin 27.
0: NG (no output), 1: OK (output)
RGB-IN self-check result: detects input to pins 33, 34 and 35.
0: NG (no input), 1: OK (input)
Returns OK when AC signal is detected on all three inputs. If signals are small or are DC
voltage, does not return OK.
SYNC-IN self-check result: detects input to pin 14.
0: NG (no input), 1: OK (input)
30 2002-10-04




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