IN74ACT32 (IK Semiconductor)
Quad 2-Input OR Gate

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TECHNICAL DATA
Quad 2-Input OR Gate
High-Speed Silicon-Gate CMOS
IN74ACT32
The IN74ACT32 is identical in pinout to the LS/ALS32, HC/HCT32.
The IN74ACT32 may be used as a level converter for interfacing TTL or
NMOS outputs to High Speed CMOS inputs.
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0 µA; 0.1 µA @ 25°C
Outputs Source/Sink 24 mA
ORDERING INFORMATION
IN74ACT32N Plastic
IN74ACT32D SOIC
TA = -40° to 85° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 14 =VCC
PIN 7 = GND
www.datasheet4u.com
FUNCTION TABLE
Inputs
AB
LL
LH
HL
HH
Output
Y
L
H
H
H
1


IN74ACT32 (IK Semiconductor)
Quad 2-Input OR Gate

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IN74ACT32
MAXIMUM RATINGS*
Symbol
Parameter
Value
VCC
VIN
VOUT
IIN
IOUT
ICC
PD
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Sink/Source Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
-0.5 to +7.0
-0.5 to VCC +0.5
-0.5 to VCC +0.5
±20
±50
±50
750
500
Tstg Storage Temperature
-65 to +150
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
Unit
V
V
V
mA
mA
mA
mW
°C
°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
VIN, VOUT
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
TJ Junction Temperature (PDIP)
TA Operating Temperature, All Package Types
IOH Output Current - High
IOL Output Current - Low
tr, tf Input Rise and Fall Time *
(except Schmitt Inputs)
* VIN from 0.8 V to 2.0 V
VCC =4.5 V
VCC =5.5 V
Min Max Unit
4.5 5.5
V
0 VCC V
140 °C
-40 +85 °C
-24 mA
24 mA
0 10 ns/V
0 8.0
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or
VOUT)VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.
2


IN74ACT32 (IK Semiconductor)
Quad 2-Input OR Gate

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IN74ACT32
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
Test Conditions
VCC
V
VIH Minimum High-
VOUT= VCC-0.1 V
Level Input Voltage
4.5
5.5
VIL Maximum Low -
VOUT=0.1 V or VCC-0.1 V
Level Input Voltage
4.5
5.5
VOH Minimum High-
IOUT -50 µA
Level Output Voltage
*VIN=VIH or VIL
IOH=-24 mA
IOH=-24 mA
VOL Maximum Low-
IOUT 50 µA
Level Output Voltage
*VIN=VIL
IOL=24 mA
IOL=24 mA
IIN Maximum Input
Leakage Current
VIN=VCC or GND
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
5.5
ICCT
IOLD
Additional Max
ICC/Input
+Minimum Dynamic
Output Current
VIN=VCC - 2.1 V
VOLD=1.65 V Max
5.5
5.5
IOHD +Minimum Dynamic VOHD=3.85 V Min
Output Current
5.5
ICC Maximum Quiescent VIN=VCC or GND
Supply Current
(per Package)
5.5
* All outputs loaded; thresholds on input associated with output under test.
+Maximum test duration 2.0 ms, one output loaded at a time.
Guaranteed Limits
25 °C
-40°C to
85°C
2.0 2.0
2.0 2.0
0.8 0.8
0.8 0.8
4.4 4.4
5.4 5.4
3.86 3.76
4.86 4.76
0.1 0.1
0.1 0.1
0.36 0.44
0.36 0.44
±0.1 ±1.0
1.5
75
-75
4.0 40
Unit
V
V
V
V
µA
mA
mA
mA
µA
3


IN74ACT32 (IK Semiconductor)
Quad 2-Input OR Gate

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IN74ACT32
AC ELECTRICAL CHARACTERISTICS (VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=3.0 ns)
Symbol
Parameter
tPLH Propagation Delay, Input A or B to
Output Y (Figure 1)
tPHL Propagation Delay, Input A or B to
Output Y (Figure 1)
CIN Maximum Input Capacitance
Guaranteed Limits
25 °C
-40°C to
85°C
Min Max Min Max
1.0 9.0 1.0 10.0
1.0 9.0 1.0 10.0
4.5 4.5
Unit
ns
ns
pF
CPD Power Dissipation Capacitance
Typical @25°C,VCC=5.0 V
20
pF
Figure 1. Switching Waveforms
4


IN74ACT32 (IK Semiconductor)
Quad 2-Input OR Gate

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IN74ACT32
N SUFFIX PLASTIC DIP
(MS - 001AA)
A
14
1
8
B
7
FL
C
-T- SEATING
PLANE
N
G
KM
D
J
H
NOTES:
0.25 (0.010) M T
1. Dimensions “A”, “B” do not include mold flash or protrusions.
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
Symbol
A
B
C
D
F
G
H
J
K
L
M
N
Dimension, mm
MIN MAX
18.67 19.69
6.1 7.11
5.33
0.36 0.56
1.14 1.78
2.54
7.62
0° 10°
2.92 3.81
7.62 8.26
0.2 0.36
0.38
D SUFFIX SOIC
(MS - 012AB)
14
H
A
8
BP
1G
7
C
R x 45
-T-
D
NOTES:
SEATING
K PLANE
0.25 (0.010) M T C M
J
F
1. Dimensions A and B do not include mold flash or protrusion.
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side
for A; for B 0.25 mm (0.010) per side.
Symbol
A
B
C
D
F
G
H
MJ
K
M
P
R
Dimension, mm
MIN MAX
8.55 8.75
3.8 4
1.35 1.75
0.33 0.51
0.4 1.27
1.27
5.27
0° 8°
0.1 0.25
0.19 0.25
5.8 6.2
0.25 0.5
5




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