MC-4R96CPE6C (NEC)
Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
MC-4R96CPE6C
Direct RambusTM DRAM RIMMTM Module
96M-BYTE (48M-WORD x 16-BIT)
Description
The Direct Rambus RIMM module is a general-purpose high-performance memory module subsystem suitable for
use in a broad range of applications including computer memory, personal computers, workstations, and other
applications where high bandwidth and low latency are required.
MC-4R96CPE6C modules consists of six 128M Direct Rambus DRAM (Direct RDRAM™) devices (µPD488448).
These are extremely high-speed CMOS DRAMs organized as 8M words by 16 bits. The use of Rambus Signaling
Level (RSL) technology permits 600MHz, 711MHz or 800MHz transfer rates while using conventional system and
board design technologies.
Direct RDRAM devices are capable of sustained data transfers at 1.25 ns per two bytes (10 ns per sixteen bytes).
The architecture of the Direct RDRAM enables the highest sustained bandwidth for multiple, simultaneous,
randomly addressed memory transactions. The separate control and data buses with independent row and column
control yield over 95 % bus efficiency. The Direct RDRAM's 32 banks support up to four simultaneous transactions
per device.
Features
184 edge connector pads with 1mm pad spacing
96 MB Direct RDRAM storage
Each RDRAM® has 32 banks, for 192 banks total on module
Gold plated contacts
RDRAMs use Chip Scale Package (CSP)
Serial Presence Detect support
Operates from a 2.5 V supply
Low power and powerdown self refresh modes
Separate Row and Column buses for higher efficiency
Over Drive Factor (ODF) support
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M14806EJ2V0DS00 (2nd edition)
Date Published August 2000 NS CP (K)
Printed in Japan
The mark 5 shows major revised points.
©
2000


MC-4R96CPE6C (NEC)
Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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MC-4R96CPE6C
Order information
Part number
Organization I/O Freq. RAS access time
MHz
ns
Package
Mounted devices
MC-4R96CPE6C - 845
MC-4R96CPE6C - 745
MC-4R96CPE6C - 653
48M x 16
800
711
600
45 184 edge connector pads RIMM 6 pieces of
45 with heat spreader
µPD488448FF
53 Edge connector : Gold plated FBGA (µBGA®) package
2 Preliminary Data Sheet M14806EJ2V0DS00


MC-4R96CPE6C (NEC)
Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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Module Pad Configuration
MC-4R96CPE6C
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
Side B
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91
B92
GND
LDQA7
GND
LDQA5
GND
LDQA3
GND
LDQA1
GND
LCFM
GND
LCFMN
GND
NC
GND
LROW2
GND
LROW0
GND
LCOL3
GND
LCOL1
GND
LDQB0
GND
LDQB2
GND
LDQB4
GND
LDQB6
GND
LDQB8
GND
LCMD
VCMOS
SIN
VCMOS
NC
GND
NC
VDD
VDD
NC
NC
NC
NC
GND
LDQA8
GND
LDQA6
GND
LDQA4
GND
LDQA2
GND
LDQA0
GND
LCTMN
GND
LCTM
GND
NC
GND
LROW1
GND
LCOL4
GND
LCOL2
GND
LCOL0
GND
LDQB1
GND
LDQB3
GND
LDQB5
GND
LDQB7
GND
LSCK
VCMOS
SOUT
VCMOS
NC
GND
NC
VDD
VDD
NC
NC
NC
NC
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
Side A
NC
NC
NC
NC
VREF
GND
SA0
VDD
SA1
SVDD
SA2
VDD
RCMD
GND
RDQB8
GND
RDQB6
GND
RDQB4
GND
RDQB2
GND
RDQB0
GND
RCOL1
GND
RCOL3
GND
RROW0
GND
RROW2
GND
NC
GND
RCFMN
GND
RCFM
GND
RDQA1
GND
RDQA3
GND
RDQA5
GND
RDQA7
GND
NC
NC
NC
NC
VREF
GND
SCL
VDD
SDA
SVDD
SWP
VDD
RSCK
GND
RDQB7
GND
RDQB5
GND
RDQB3
GND
RDQB1
GND
RCOL0
GND
RCOL2
GND
RCOL4
GND
RROW1
GND
NC
GND
RCTM
GND
RCTMN
GND
RDQA0
GND
RDQA2
GND
RDQA4
GND
RDQA6
GND
RDQA8
GND
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
A83
A84
A85
A86
A87
A88
A89
A90
A91
A92
LCFM, LCFMN,
RCFM, RCFMN : Clock from master
LCTM, LCTMN,
RCTM, RCTMN : Clock to master
LCMD, RCMD : Serial Command Pad
LROW2 - LROW0,
RROW2 - RROW0 : Row bus
LCOL4 - LCOL0,
RCOL4 - RCOL0 : Column bus
LDQA8 - LDQA0,
RDQA8 - RDQA0 : Data bus A
LDQB8 - LDQB0,
RDQB8 - RDQB0 : Data bus B
LSCK, RSCK : Clock input
SA0 - SA2 : Serial Presence Detect Address
SCL, SDA : Serial Presence Detect Clock
SIN, SOUT : Serial I/O
SVDD
: SPD Voltage
SWP
: Serial Presence Detect Write Protect
VCMOS
: Supply voltage for serial pads
VDD : Supply voltage
VREF
: Logic threshold
GND
: Ground reference
NC : These pads are not connected
Preliminary Data Sheet M14806EJ2V0DS00
3


MC-4R96CPE6C (NEC)
Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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Module Pad Names
Pad Signal Name Pad Signal Name
A1 GND B1 GND
A2 LDQA8 B2 LDQA7
A3 GND B3 GND
A4 LDQA6 B4 LDQA5
A5 GND B5 GND
A6 LDQA4 B6 LDQA3
A7 GND B7 GND
A8 LDQA2 B8 LDQA1
A9 GND B9 GND
A10 LDQA0 B10 LCFM
A11 GND B11 GND
A12 LCTMN B12 LCFMN
A13 GND B13 GND
A14 LCTM B14
NC
A15 GND B15 GND
A16 NC B16 LROW2
A17 GND B17 GND
A18 LROW1 B18 LROW0
A19 GND B19 GND
A20 LCOL4 B20 LCOL3
A21 GND B21 GND
A22 LCOL2 B22 LCOL1
A23 GND B23 GND
A24 LCOL0 B24 LDQB0
A25 GND B25 GND
A26 LDQB1 B26 LDQB2
A27 GND B27 GND
A28 LDQB3 B28 LDQB4
A29 GND B29 GND
A30 LDQB5 B30 LDQB6
A31 GND B31 GND
A32 LDQB7 B32 LDQB8
A33 GND B33 GND
A34 LSCK B34 LCMD
A35
VCMOS
B35
VCMOS
A36 SOUT B36
SIN
A37
VCMOS
B37
VCMOS
A38 NC B38 NC
A39 GND B39 GND
A40 NC B40 NC
A41 VDD B41 VDD
A42 VDD B42 VDD
A43 NC B43 NC
A44 NC B44 NC
A45 NC B45 NC
A46 NC B46 NC
MC-4R96CPE6C
Pad Signal Name Pad Signal Name
A47 NC B47 NC
A48 NC B48 NC
A49 NC B49 NC
A50 NC B50 NC
A51
VREF
B51
VREF
A52 GND B52 GND
A53 SCL B53 SA0
A54 VDD B54 VDD
A55 SDA B55 SA1
A56 SVDD B56 SVDD
A57 SWP B57 SA2
A58 VDD B58 VDD
A59 RSCK B59 RCMD
A60 GND B60 GND
A61 RDQB7 B61 RDQB8
A62 GND B62 GND
A63 RDQB5 B63 RDQB6
A64 GND B64 GND
A65 RDQB3 B65 RDQB4
A66 GND B66 GND
A67 RDQB1 B67 RDQB2
A68 GND B68 GND
A69 RCOL0 B69 RDQB0
A70 GND B70 GND
A71 RCOL2 B71 RCOL1
A72 GND B72 GND
A73 RCOL4 B73 RCOL3
A74 GND B74 GND
A75 RROW1 B75 RROW0
A76 GND B76 GND
A77 NC B77 RROW2
A78 GND B78 GND
A79 RCTM B79
NC
A80 GND B80 GND
A81 RCTMN B81 RCFMN
A82 GND B82 GND
A83 RDQA0 B83
RCFM
A84 GND B84 GND
A85 RDQA2 B85 RDQA1
A86 GND B86 GND
A87 RDQA4 B87 RDQA3
A88 GND B88 GND
A89 RDQA6 B89 RDQA5
A90 GND B90 GND
A91 RDQA8 B91 RDQA7
A92 GND B92 GND
4 Preliminary Data Sheet M14806EJ2V0DS00


MC-4R96CPE6C (NEC)
Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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MC-4R96CPE6C
Module Connector Pad Description
(1/2)
Signal
GND
LCFM
I/O
I
LCFMN
I
LCMD
I
LCOL4..LCOL0
I
LCTM
I
LCTMN
I
LDQA8..LDQA0 I/O
LDQB8..LDQB0 I/O
LROW2..LROW0
LSCK
I
I
NC —
RCFM
I
RCFMN
I
RCMD
I
RCOL4..RCOL0
I
RCTM
I
RCTMN
I
RDQA8..RDQA0 I/O
RDQB8..RDQB0 I/O
RROW2..RROW0 I
Type
RSL
RSL
VCMOS
RSL
RSL
RSL
RSL
RSL
RSL
VCMOS
RSL
RSL
VCMOS
RSL
RSL
RSL
RSL
RSL
RSL
Description
Ground reference for RDRAM core and interface. 72 PCB connector pads.
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Positive polarity.
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Negative polarity.
Serial Command used to read from and write to the control registers. Also used
for power management.
Column bus. 5-bit bus containing control and address information for column
accesses.
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Positive polarity.
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Negative polarity.
Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. LDQA8 is non-functional on modules with x16 RDRAM devices.
Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. LDQB8 is non-functional on modules with x16 RDRAM devices.
Row bus. 3-bit bus containing control and address information for row accesses.
Serial clock input. Clock source used to read from and write to the RDRAM
control registers.
These pads are not connected. These 24 connector pads are reserved for future
use.
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Positive polarity.
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Negative polarity.
Serial Command Input used to read from and write to the control registers. Also
used for power management.
Column bus. 5-bit bus containing control and address information for column
accesses.
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Positive polarity.
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Negative polarity.
Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. RDQA8 is non-functional on modules with x16 RDRAM
devices.
Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. RDQB8 is non-functional on modules with x16 RDRAM
devices.
Row bus. 3-bit bus containing control and address information for row accesses.
Preliminary Data Sheet M14806EJ2V0DS00
5


MC-4R96CPE6C (NEC)
Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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MC-4R96CPE6C
Signal
RSCK
SA0
SA1
SA2
SCL
SDA
SIN
SOUT
SVDD
SWP
VCMOS
VDD
VREF
I/O Type
Description
(2/2)
I VCMOS Serial clock input. Clock source used to read from and write to the RDRAM
control registers.
I
SVDD
Serial Presence Detect Address 0.
I
SVDD
Serial Presence Detect Address 1.
I
SVDD
Serial Presence Detect Address 2.
I
SVDD
Serial Presence Detect Clock.
I/O SVDD Serial Presence Detect Data (Open Collector I/O).
I/O VCMOS Serial I/O for reading from and writing to the control registers. Attaches to SIO0
of the first RDRAM on the module.
I/O VCMOS Serial I/O for reading from and writing to the control registers. Attaches to SIO1
of the last RDRAM on the module.
— — SPD Voltage. Used for signals SCL, SDA, SWP, SA0, SA1 and SA2.
I SVDD Serial Presence Detect Write Protect (active high). When low, the SPD can be
written as well as read.
— — CMOS I/O Voltage. Used for signals CMD, SCK, SIN, SOUT.
— — Supply voltage for the RDRAM core and interface logic.
— — Logic threshold reference voltage for RSL signals.
6 Preliminary Data Sheet M14806EJ2V0DS00


MC-4R96CPE6C (NEC)
Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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Block Diagram
MC-4R96CPE6C
SIO 0
SIO 1
SCK
CMD
VREF
SIO 0
SIO 1
SCK
CMD
VREF
SIO 0
SIO 1
SCK
CMD
VREF
SIO 0
SIO 1
SCK
CMD
VREF
U1
U2
U3
U6
SCL
SWP
47 k
SVDD
SERIAL PD
SVDD
SCL
WP
VCC
U0 SDA
A0 A1 A2
SDA
SA0 SA1 SA2
0.1 µF
VDD
2 per
RDRAM
0.1 µF
VCMOS
1 per
2 RDRAMs
0.1 µF
VREF
1 per
2 RDRAMs
Plus one
Near Connector
0.1 µF
Remarks 1. Rambus Channel signals form a loop through the RIMM module, with the exception of the SIO chain.
2. See Serial Presence Detection Specification for information on the SPD device and its contents.
Preliminary Data Sheet M14806EJ2V0DS00
7


MC-4R96CPE6C (NEC)
Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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MC-4R96CPE6C
Electrical Specification
Absolute Maximum Ratings
Symbol
VI,ABS
VDD,ABS
TSTORE
Parameter
Voltage applied to any RSL or CMOS signal pad with respect to GND
Voltage on VDD with respect to GND
Storage temperature
MIN.
0.3
0.5
50
MAX.
VDD + 0.3
VDD + 1.0
+100
Unit
V
V
°C
Caution
Exposing the device to stress above those listed in Absolute Maximum Ratings could cause
permanent damage. The device is not meant to be operated under conditions outside the limits
described in the operational section of this specification. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
DC Recommended Electrical Conditions
Symbol
Parameter and conditions
VDD
VCMOS
Supply voltage
CMOS I/O power supply at pad
VREF
VIL
VIH
VIL,CMOS
VIH,CMOS
VOL,CMOS
VOH,CMOS
IREF
ISCK,CMD
ISIN,SOUT
Reference voltage
RSL input low voltage
RSL input high voltage
CMOS input low voltage
CMOS input high voltage
CMOS output low voltage, IOL,CMOS = 1 mA
CMOS output high voltage, IOH,CMOS = 0.25 mA
VREF current, VREF,MAX
CMOS input leakage current, (0 VCMOS VDD)
CMOS input leakage current, (0 VCMOS VDD)
MIN.
MAX.
Unit
2.50 0.13
2.50 + 0.13
V
2.5V controllers 2.5 0.13
2.5 + 0.25
V
1.8V controllers
1.8 0.1
1.8 + 0.2
1.4 0.2
1.4 + 0.2
V
VREF 0.5
VREF 0.2
V
VREF + 0.2
VREF + 0.5
V
0.3
0.5VCMOS 0.25 V
0.5VCMOS+0.25
VCMOS 0.3
VCMOS + 0.3
0.3
V
V
V
60.0
+60.0
µA
60.0
+60.0
µA
10.0
+10.0
µA
8 Preliminary Data Sheet M14806EJ2V0DS00


MC-4R96CPE6C (NEC)
Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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MC-4R96CPE6C
AC Electrical Specifications
Symbol
Parameter and Conditions
MIN. TYP. MAX. Unit
Z
Module Impedance
25.2 28 30.8
TPD Average clock delay from finger to finger of all RSL clock nets
-845
1.40 ns
(CTM, CTMN,CFM, and CFMN)
-745 1.40
TPD
Propagation delay variation of RSL signals with respect to TPD Note1,2
-653
21
1.40
+21 ps
TPD-CMOS Propagation delay variation of SCK and CMD signals with respect to
an average clock delay Note1
Vα/VIN
Attenuation Limit
100
-845
+100 ps
14 %
-745 14
-653 9
VXF/VIN Forward crosstalk coefficient
-845
3%
(300ps input rise time 20% - 80%)
-745 3
-653 3
VXB/VIN Backward crosstalk coefficient
-845
1.8 %
(300ps input rise time 20% - 80%)
-745 1.8
-653 1.8
RDC DC Resistance Limit
-845 0.7
-745 0.7
-653 0.7
Notes 1. TPD or Average clock delay is defined as the average delay from finger to finger of all RSL clock nets (CTM,
CTMN, CFM, and CFMN).
2. If the RIMM module meets the following specification, then it is compliant to the specification.
If the RIMM module does not meet these specifications, then the specification can be adjusted by the
“Adjusted TPD Specification” table.
Adjusted TPD Specification
Symbol
Parameter and conditions
Adjusted MIN./MAX.
Absolute
Unit
MIN. MAX.
TPD Propagation delay variation of RSL signals with respect to TPD +/[17+(18*N*Z0)] Note 30 +30 ps
Note N = Number of RDRAM devices installed on the RIMM module.
Z0 = delta Z0% = (MAX. Z0 MIN. Z0) / (MIN. Z0)
(MAX. Z0 and MIN. Z0 are obtained from the loaded (high impedance) impedance coupons of all RSL layers
on the module.)
Preliminary Data Sheet M14806EJ2V0DS00
9


MC-4R96CPE6C (NEC)
Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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MC-4R96CPE6C
RIMM Module Current Profile
IDD
IDD1
RIMM module power conditions Note1
One RDRAM in Read Note2, balance in NAP mode
-845
MAX.
711
Unit
mA
-745
646
IDD2 One RDRAM in Read Note2, balance in Standby mode
-653
-845
561
1,240
mA
-745
1,150
IDD3 One RDRAM in Read Note2, balance in Active mode
-653
-845
1,015
1,590
mA
-745
1,450
IDD4 One RDRAM in Write, balance in NAP mode
-653
-845
1,265
671
mA
-745
616
IDD5 One RDRAM in Write, balance in Standby mode
-653
-845
536
1,200
mA
-745
1,120
IDD6 One RDRAM in Write, balance in Active mode
-653
-845
990
1,550
mA
-745
1,420
-653
1,240
Notes 1. Actual power will depend on individual RDRAM component specifications, memory controller and usage
patterns. Power does not include Refresh Current.
2. I/O current is a function of the % of 1’s, to add I/O power for 50 % 1’s for a x16 need to add 257 mA for the
following : VDD = 2.5 V, VTERM = 1.8 V, VREF = 1.4 V and VDIL = VREF 0.5 V.
10 Preliminary Data Sheet M14806EJ2V0DS00


MC-4R96CPE6C (NEC)
Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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MC-4R96CPE6C
Timing Parameters
The following timing parameters are from the RDRAMs pins, not the RIMM. Please refer to the RDRAM data sheet
(µPD488448) for detailed timing diagrams.
Para-
Description
MIN.
MAX.
meter
-845 -745 -653
tRC Row Cycle time of RDRAM banks - the interval between ROWA packets with 28 28 28 —
ACT commands to the same bank.
tRAS
RAS-asserted time of RDRAM bank - the interval between ROWA packet with ACT 20
20
20
Note 2
64µs
command and next ROWR packet with PRERNote1 command to the same bank.
tRP Row Precharge time of RDRAM banks - the interval between ROWR packet with 8 8 8 —
PRERNote1 command and next ROWA packet with ACT command to the same
bank.
tPP Precharge-to-precharge time of RDRAM device - the interval between
successive ROWR packets with PRER Note1 commands to any banks of the
same device.
8 8 8—
tRR RAS-to-RAS time of RDRAM device - the interval between successive ROWA 8 8 8 —
packets with ACT commands to any banks of the same device.
tRCD RAS-to-CAS Delay - the interval from ROWA packet with ACT command to
9 7 7—
COLC packet with RD or WR command. Note - the RAS-to-CAS delay seen
by the RDRAM core (tRCD-C) is equal to tRCD-C = 1 + tRCD because of differences
in the row and column paths through the RDRAM interface.
tCAC CAS Access delay - the interval from RD command to Q read data. The
equation for tCAC is given in the TPARM register.
tCWD CAS Write Delay - interval from WR command to D write data.
8 8 8 12
6666
tCC CAS-to-CAS time of RDRAM bank - the interval between successive COLC 4 4 4 —
commands.
tPACKET Length of ROWA, ROWR, COLC, COLM or COLX packet.
4444
tRTR Interval from COLC packet with WR command to COLC packet which causes 8 8 8 —
retire, and to COLM packet with bytemask.
tOFFP The interval (offset) from COLC packet with RDA command, or from COLC
4444
packet with retire command (after WRA automatic precharge), or from COLC
packet with PREC command, or from COLX packet with PREX command to
the equivalent ROWR packet with PRER. The equation for tOFFP is given in the
TPARM register.
tRDP Interval from last COLC packet with RD command to ROWR packet with
PRER.
4 4 4—
tRTP Interval from last COLC packet with automatic retire command to ROWR
packet with PRER.
4 4 4—
Notes 1. Or equivalent PREC or PREX command.
2. This is a constraint imposed by the core, and is therefore in units of ms rather than tCYCLE.
Units
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
tCYCLE
Preliminary Data Sheet M14806EJ2V0DS00
11


MC-4R96CPE6C (NEC)
Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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MC-4R96CPE6C
Standard RIMM Module Marking
The RIMM modules available from NEC are marked per Figure 1 below. This marking assists users to specify and
verify if the correct RIMM modules are installed in their systems. In the diagram, a label is shown attached to the
RIMM module's heat spreader. Information contained on the label is specific to the RIMM module and provides
RDRAM information without requiring removal of the RIMM module's heat spreader.
Figure 1. RIMM Module marking example
AB
CD
JAPAN
128MB/8d nonECC
MC-4R128CEE6C-845 800-45
0020B9001
G100 S100
©1996 HCS, Inc. 800-748-0241
No. 6043B-ISO
GE
HI F
J
Label Field
Description
Marked Text
A Vendor logo
Vendor logo area
NEC
B Manufacturing Country Country of origin
JAPAN, USA, FRANCE
C Module Memory Capacity Number of 8-bit or 9-bit MBytes of RDRAM storage in 64MB, 96MB, 128MB, 192MB,
RIMM module
256MB
Number of RDRAMs
Number of RDRAM devices contained in the RIMM /4d, /6d, /8d, /12d, /16d
module
D ECC Support
Indicates whether the RIMM module supports 8-bit non ECC, ECC
(non ECC) or 9-bit (ECC) Bytes
E Part No.
NEC RIMM Part No.
See table Order information
F Memory Speed
Data transfer speed for RIMM module
800, 711, 600
tRAC Row Access Time
-45, -53
G Manufacturing Lot No. Manufactured Year code, Week code, In-house code YYWW∗∗∗∗∗
H Gerber Version
PCB Gerber file revision used on RIMM Module
G100 as Rev 1.00
I SPD Version
SPD code version
S100 as Rev 1.00
J Caution Logo
Units
MBytes
RDRAM
devices
MHz
ns
12 Preliminary Data Sheet M14806EJ2V0DS00


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MC-4R96CPE6C
Package Drawings
184 EDGE CONNECTOR PADS RIMM (SOCKET TYPE) (1/2)
R
PS
A (AREA B)
128 M Direct RDRAM
ON M
K
G
A
L
H
D
B
B
I
E
C
A1 (AREA A)
EEPROM
J
F
M1 (AREA B)
Q
M2 (AREA A)
V
T
detail of A part
W R1.00
Y
X
detail of B part
C1
R1.00
B1
Z
ITEM
A
A1
B
B1
C
C1
D
E
F
G
H
I
J
K
L
M
M1
M2
N
O
P
Q
R
S
T
V
W
X
Y
Z
MILLIMETERS
133.35 TYP.
133.35±0.13
55.175
1.00±0.10
11.50
3.00±0.10
45.00
32.00
45.00
5.675
47.625
25.40
47.625
6.35
1.00 TYP.
31.75±0.13
11.97
19.78
29.21
17.78
4.00±0.10
R 2.00
3.00±0.10
φ 2.44
1.27±0.10
2.43 MAX.
0.80±0.10
2.99
0.15
2.00±0.10
Preliminary Data Sheet M14806EJ2V0DS00
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MC-4R96CPE6C (NEC)
Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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MC-4R96CPE6C
184 EDGE CONNECTOR PADS RIMM (SOCKET TYPE) (2/2)
A
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,PadA1
C
B
E
F
C Pad A92 G
DH
ITEM
A
B
C
D
E
F
G
H
DESCRIPTION
PCB length
MIN. TYP. MAX.
133.22 133.35 133.48
UNIT
mm
PCB height for 1.25" RIMM Module
31.62 31.75 31.88
mm
Center-center pad width from pad A1 to A46,
A47 to A92, B1 to B46 or B47 to B92
Spacing from PCB left edge to connector key notch
44.95 45.00 45.05
- 55.175 -
mm
mm
Spacing from contact pad PCB edge
to side edge retainer notch
PCB thickness
- 17.78 -
1.17 1.27 1.37
mm
mm
Heat spreader thickness from PCB surface (one side) to
heat spreader top surface
RIMM thickness
-
-
- 3.09 mm
- 4.46 mm
14 Preliminary Data Sheet M14806EJ2V0DS00


MC-4R96CPE6C (NEC)
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MC-4R96CPE6C
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note:
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity
as much as possible, and quickly dissipate it once, when it has occurred. Environmental control
must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using
insulators that easily build static electricity. Semiconductor devices must be stored and transported
in an anti-static container, static shielding bag or conductive material. All test and measurement
tools including work bench and floor should be grounded. The operator should be grounded using
wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need
to be taken for PW boards with semiconductor devices on it.
2 HANDLING OF UNUSED INPUT PINS FOR CMOS
Note:
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided
to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels
of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused
pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of
being an output pin. All handling related to the unused pins must be judged device by device and
related specifications governing the devices.
3 STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note:
Power-on does not necessarily define initial status of MOS device. Production process of MOS
does not define the initial operation status of the device. Immediately after the power source is
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the
reset signal is received. Reset operation must be executed immediately after power-on for devices
having reset function.
Preliminary Data Sheet M14806EJ2V0DS00
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Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT

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MC-4R96CPE6C
Rambus, RDRAM and the Rambus Logo are registered trademarks of Rambus Inc.
DirectRambus, DirectRDRAM, RIMM, RModule and RSocket are trademarks of Rambus Inc.
µBGA is a registered trademark of Tessera Inc.
CAUTION FOR HANDLING MEMORY MODULES
When handling or inserting memory modules, be sure not to touch any components on the modules, such as
the memory IC, chip capacitors and chip resistors. It is necessary to avoid undue mechanical stress on these
components to prevent damaging them.
When re-packing memory modules, be sure the modules are NOT touching each other. Modules in contact
with other modules may cause excessive mechanical stress, which may damage the modules.
The information in this document is current as of August, 2000. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or
data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all
products and/or types are available in every country. Please check with an NEC sales representative
for availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of
third parties by or arising from the use of NEC semiconductor products listed in this document or any other
liability arising from the use of such products. No license, express, implied or otherwise, is granted under any
patents, copyrights or other intellectual property rights of NEC or others.
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of customer's equipment shall be done under the full
responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third
parties arising from the use of these circuits, software and information.
While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers
agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
risks of damage to property or injury (including death) to persons arising from defects in NEC
semiconductor products, customers must incorporate sufficient safety measures in their design, such as
redundancy, fire-containment, and anti-failure features.
NEC semiconductor products are classified into the following three quality grades:
"Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products
developed based on a customer-designated "quality assurance program" for a specific application. The
recommended applications of a semiconductor product depend on its quality grade, as indicated below.
Customers must check the quality grade of each semiconductor product before using it in a particular
application.
"Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio
and visual equipment, home electronic appliances, machine tools, personal electronic equipment
and industrial robots
"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
"Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems and medical equipment for life support, etc.
The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's
data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not
intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness
to support a given application.
(Note)
(1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries.
(2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for
NEC (as defined above).
M8E 00. 4




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