IDT74FCT2534ATD (Integrated Device Tech)
FAST CMOS OCTAL D REGISTERS (3-STATE)

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Integrated Device Technology, Inc.
FAST CMOS OCTAL D IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT
REGISTERS (3-STATE)
IDT54/74FCT534T/AT/CT
IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FEATURES:
• Common features:
– Low input and output leakage 1µA (max.)
– CMOS power levels
– True TTL input and output compatibility
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
– Meets or exceeds JEDEC standard 18 specifications
– Product available in Radiation Tolerant and Radiation
Enhanced versions
– Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
– Available in DIP, SOIC, SSOP, QSOP, CERPACK
and LCC packages
• Features for FCT374T/FCT534T/FCT574T:
– Std., A, C and D speed grades
– High drive outputs (-15mA IOH, 48mA IOL)
• Features for FCT2374T/FCT2574T:
– Std., A, and C speed grades
– Resistor outputs (-15mA IOH, 12mA IOL Com.)
(-12mA IOH, 12mA IOL Mil.)
– Reduced system switching noise
DESCRIPTION
The FCT374T/FCT2374T, FCT534T and FCT574T/
FCT2574T are 8-bit registers built using an advanced dual
metal CMOS technology. These registers consist of eight D-
type flip-flops with a buffered common clock and buffered 3-
state output control. When the output enable (OE) input is
LOW, the eight outputs are enabled. When the OE input is
HIGH, the outputs are in the high-impedance state.
Input data meeting the set-up and hold time requirements
of the D inputs is transferred to the Q outputs on the LOW-to-
HIGH transition of the clock input.
The FCT2374T and FCT2574T have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot and controlled output fall times-reducing
the need for external series terminating resistors. FCT2xxxT
parts are plug-in replacements for FCTxxxT parts.
FUNCTIONAL BLOCK DIAGRAM FCT374/FCT2374T AND FCT574/FCT2574T
D0 D1 D2 D3 D4 D5
CP
CP D
Q
CP D
Q
CP D
Q
CP D
Q
CP D
Q
CP D
Q
D6
CP D
Q
D7
CP D
Q
OE
Q0 Q1 Q2
FUNCTIONAL BLOCK DIAGRAM FCT534T
D0 D1 D2
CP
CP D
Q
CP D
Q
CP D
Q
Q3
D3
CP D
Q
Q4
D4
CP D
Q
Q5
D5
CP D
Q
Q6 Q7
2569 drw 01
D6 D7
CP D
Q
CP D
Q
OE
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
2569 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1995 Integrated Device Technology, Inc.
6.13
AUGUST 1995
DSC-4214/5
1


IDT74FCT2534ATD (Integrated Device Tech)
FAST CMOS OCTAL D REGISTERS (3-STATE)

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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT54/74FCT374T
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
1 20
2 19
3 P20-1 18
4 D20-1 17
5 SO20-2 16
6
SO20-7
SO20-8
15
7 & 14
8 E20-1 13
9 12
10 11
VCC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
INDEX
3 2 20 19
D1 4
1 18 D7
Q1 5
17 D6
Q2
6
L20-2 16
Q6
D2 7
15 Q5
D3 8
14 D5
9 10 11 12 13
LCC
TOP VIEW
2569 drw 03
IDT54/74FCT574T
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
1 20
2 19
3 P20-1 18
4 D20-1 17
5 SO20-2 16
SO20-7
6 SO20-8 15
7 & 14
8 E20-1 13
9 12
10 11
VCC
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
IDT54/74FCT534T
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
1 20
2 19
3 18
4 P20-1 17
5
D20-1
SO20-2
16
6 SO20-8 15
7 & 14
8 E20-1 13
9 12
10 11
VCC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
DIP/SOIC/QSOP/CERPACK
TOP VIEW
INDEX
3 2 20 19
D2 4
1 18 Q1
D3 5
17 Q2
D4 6
L20-2 16
Q3
D5 7
15 Q4
D6 8
14 Q5
9 10 11 12 13
LCC
TOP VIEW
INDEX
3 2 20 19
D1 4
1 18 D7
Q1 5
17 D6
Q2 6
L20-2 16 Q6
D2 7
15 Q5
D3 8
14 D5
9 10 11 12 13
LCC
TOP VIEW
2569 drw 04
2569 drw 05
6.13 2


IDT74FCT2534ATD (Integrated Device Tech)
FAST CMOS OCTAL D REGISTERS (3-STATE)

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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names
DN
CP
QN
QN
OE
Description
D flip-flop data inputs
Clock Pulse for the register. Enters data on
LOW-to-HIGH transition.
3-state outputs, (true)
3-state outputs, (inverted)
Active LOW 3-state Output Enable input
2569 tbl 01
FUNCTION TABLE(1)
Function
OE
HI-Z H
H
LOAD REGISTER
L
L
H
H
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
NC = No Change
= LOW-to-HIGH transition
Inputs
CP
L
H
534 374/574
Outputs
Internal
Outputs
Internal
DN QN QN QN QN
X Z NC Z NC
X Z NC Z NC
LHL LH
H LHHL
L Z L ZH
H ZH ZL
2569 tbl 02
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
VTERM(2) Terminal Voltage
with Respect to
GND
VTERM(3) Terminal Voltage
with Respect to
GND
TA Operating
Temperature
TBIAS Temperature
Under Bias
TSTG Storage
Temperature
PT Power Dissipation
Commercial
–0.5 to +7.0
–0.5 to
VCC +0.5
0 to +70
–55 to +125
–55 to +125
0.5
Military
–0.5 to +7.0
–0.5 to
VCC +0.5
–55 to +125
–65 to +135
–65 to +150
0.5
Unit
V
V
°C
°C
°C
W
IOUT
DC Output
–60 to +120 –60 to +120 mA
Current
NOTES:
2569 lnk 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals only.
3. Outputs and I/O terminals only.
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input
Capacitance
VIN = 0V 6 10 pF
COUT
Output
Capacitance
VOUT = 0V 8
12 pF
NOTE:
2569 lnk 04
1. This parameter is measured at characterization but not tested.
6.13 3


IDT74FCT2534ATD (Integrated Device Tech)
FAST CMOS OCTAL D REGISTERS (3-STATE)

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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
VIH
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
Min. Typ.(2) Max. Unit
2.0 — —
V
VIL Input LOW Level
II H Input HIGH Current(4)
II L Input LOW Current(4)
Guaranteed Logic LOW Level
VCC = Max.
VI = 2.7V
VI = 0.5V
— — 0.8 V
— — ±1 µA
— — ±1
IOZH
IOZL
II
High Impedance Output Current
(3-State Output pins)(4)
Input HIGH Current(4)
VCC = Max.
VO = 2.7V
VO = 0.5V
VCC = Max., VI = VCC (Max.)
— — ±1 µA
— — ±1
— — ±1 µA
VIK Clamp Diode Voltage
VCC = Min., IIN = –18mA
— –0.7 –1.2 V
VH Input Hysteresis
— 200 — mV
ICC Quiescent Power Supply Current VCC = Max., VIN = GND or VCC
— 0.01
1 mA
2569 lnk 05
OUTPUT DRIVE CHARACTERISTICS FOR FCT374T/534T/574T
Symbol
Parameter
Test Conditions(1)
VOH Output HIGH Voltage
VCC = Min.
IOH = –6mA MIL.
VIN = VIH or VIL
IOH = –8mA COM'L.
IOH = –12mA MIL.
IOH = –15mA COM'L.
VOL Output LOW Voltage
VCC = Min.
IOL = 32mA MIL.
IOS Short Circuit Current
VIN = VIH or VIL
IOL = 48mA COM'L.
VCC = Max., VO = GND(3)
Min. Typ.(2) Max. Unit
2.4 3.3 —
V
2.0 3.0 —
V
— 0.3 0.5
V
–60 –120 –225 mA
OUTPUT DRIVE CHARACTERISTICS FOR FCT2374T/2574T
2569 lnk 06
Symbol
IODL
IODH
Parameter
Output LOW Current
Output HIGH Current
Test Conditions(1)
VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3)
VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3)
Min.
16
–16
Typ.(2)
48
–48
Max.
Unit
mA
mA
VOH Output HIGH Voltage
VCC = Min.
IOH = –12mA MIL.
2.4 3.3 —
V
VIN = VIH or VIL
IOH = –15mA COM'L.
VOL Output LOW Voltage
VCC = Min.
IOL = 12mA
— 0.3 0.50 V
VIN = VIH or VIL
NOTES:
2569 lnk 07
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.
6.13 4


IDT74FCT2534ATD (Integrated Device Tech)
FAST CMOS OCTAL D REGISTERS (3-STATE)

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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2) Max. Unit
ICC
Quiescent Power Supply Current VCC = Max.
TTL Inputs HIGH
VIN = 3.4V(3)
— 0.5 2.0 mA
ICCD
IC
Dynamic Power Supply
Current(4)
Total Power Supply Current(6)
VCC = Max.
Outputs Open
OE = GND
One Input Toggling
50% Duty Cycle
VCC = Max.
Outputs Open
VIN = VCC FCTxxxT
— 0.15 0.25 mA/
VIN = GND
MHz
FCT2xxxT — 0.06 0.12
VIN = VCC FCTxxxT — 1.5 3.5 mA
VIN = GND
fCP = 10MHz
50% Duty Cycle
OE = GND
fi = 5MHz
FCT2xxxT — 0.6 2.2
VIN = 3.4 FCTxxxT — 2.0 5.5
VIN = GND
50% Duty Cycle
FCT2xxxT
1.1 4.2
One Bit Toggling
VCC = Max.
VIN = VCC FCTxxxT — 3.8 7.3(5)
Outputs Open
VIN = GND
fCP = 10MHz
FCT2xxxT —
1.5 4.0(5)
50% Duty Cycle
OE = GND
VIN = 3.4 FCTxxxT — 6.0 16.3(5)
Eight Bits Toggling
VIN = GND
fi = 2.5MHz
FCT2xxxT —
3.8 13.0(5)
50% Duty Cycle
NOTES:
2569 tbl 08
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
6.13 5


IDT74FCT2534ATD (Integrated Device Tech)
FAST CMOS OCTAL D REGISTERS (3-STATE)

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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT374T/534T/574T
FCT2374T/2574T
Com'l.
Mil.
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
tH
tW
Parameter
Propagation Delay
CP to QN(3)
Output Enable Time
Output Disable Time
Set-up Time HIGH
or LOW, DN to CP
Hold Time HIGH
or LOW, DN to CP
CP Pulse Width
HIGH or LOW
Conditions(1)
CL = 50pF
RL = 500
Min.(2)
2.0
Max.
10.0
Min.(2)
2.0
Max.
11.0
1.5 12.5 1.5 14.0
1.5 8.0 1.5 8.0
2.0 — 2.0 —
1.5 — 1.5 —
7.0 — 7.0 —
FCT374AT/534AT/574AT
FCT2374AT/2574AT
Com'l.
Mil.
Min.(2) Max. Min.(2) Max.
2.0 6.5 2.0 7.2
Unit
ns
1.5 6.5 1.5 7.5 ns
1.5 5.5 1.5 6.5 ns
2.0 — 2.0 — ns
1.5 — 1.5 — ns
5.0 — 6.0 — ns
2569 tbl 09
FCT374CT/534CT/574CT
FCT2374CT/2574CT
Com'l.
Mil.
Symbol
Parameter
Conditions(1)
Min.(2)
tPLH Propagation Delay
tPHL
CP to QN(3)
CL = 50pF
RL = 500
2.0
tPZH Output Enable Time
1.5
tPZL
tPHZ Output Disable Time
1.5
tPLZ
tSU Set-up Time HIGH
2.0
or LOW, DN to CP
tH Hold Time HIGH
1.5
or LOW, DN to CP
tW CP Pulse Width
HIGH or LOW(4)
5.0
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. ON for FCT374/2374T and FCT574/2574T, ON for FCT534T.
4. This parameter is guaranteed but not tested.
Max.
5.2
5.5
5.0
Min.(2)
2.0
1.5
1.5
2.0
1.5
6.0
Max.
6.2
6.2
5.7
FCT374DT/574DT
Com'l.
Mil.
Min.(2) Max. Min.(2) Max.
2.0 4.2 — —
Unit
ns
1.5 4.8 — — ns
1.5 4.0 — — ns
2.0 — — — ns
1.0 — — — ns
3.0 — — — ns
2569 tbl 10
6.13 6


IDT74FCT2534ATD (Integrated Device Tech)
FAST CMOS OCTAL D REGISTERS (3-STATE)

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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V CC
7.0V
VIN
Pulse
Generator
D.U.T.
RT
VOUT
50pF
CL
500
500
2569 drw 06
SWITCH POSITION
Test
Switch
Open Drain
Disable Low
Closed
Enable Low
All Other Tests
Open
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
DATA
INPUT
TIMING
tSU tH
3V
1.5V
0V
3V
LOW-HIGH-LOW
PULSE
1.5V
INPUT
1.5V
ASYNCHRONOUS CONTROL
PRESET
tREM
0V
3V
tW
CLEAR
ETC.
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
tSU tH
3V
1.5V
0V
2569 drw 08
ETC.
2569 drw 07
PROPAGATION DELAY
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
ENABLE AND DISABLE TIMES
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
2569 drw 09
ENABLE
DISABLE
3V
CONTROL
INPUT
tPZL
1.5V
tPLZ
0V
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
tPZH
3.5V
1.5V
tPHZ
3.5V
0.3V VOL
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
0.3V VOH
0V
2569 drw 10
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns
6.13 7


IDT74FCT2534ATD (Integrated Device Tech)
FAST CMOS OCTAL D REGISTERS (3-STATE)

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IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT XX
FCT X
Temp. Range
Family
XXXX
Device Type
X
Package
X
Process
Blank
B
Commercial
MIL-STD-883, Class B
P Plastic DIP
D CERDIP
SO Small Outline IC
L Leadless Chip Carrier
E CERPACK
PY Shrink Small Outline Package
Q Quarter-size Small Outline Package
374T
574T
534T
374AT
574AT
534AT
374CT
574CT
534CT
374DT
574DT
Blank
2
54
74
Non-Inverting Octal D Register
Non-Inverting Octal D Register
Inverting Octal D Register
High Drive
Balanced Drive
–55°C to +125°C
0°C to +70°C
2569 drw 11
6.13 8




IDT74FCT2534ATD.pdf
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