TDA9102T (ST Microelectronics)
H/V PROCESSOR FOR TTL V.D.U

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TDA9102C/T
H/V PROCESSOR FOR TTL V.D.U
HORIZONTAL SECTION
. SYNCHRONIZATION INPUT : TTL COMPAT-
IBLE, NEGATIVE EDGE TRIGGERED
. SYNCHRONIZATION INDEPENDENT FROM
DUTY CYCLE TIME
. OSCILLATOR : FREQUENCY RANGE FROM
15kHz to 100kHz
. HORIZONTAL OUTPUT PULSE SHAPER
AND SHIFTER
. PHASE COMPARATOR BETWEEN SYN-
CHRO AND OSCILLATOR (PLL1)
. PHASE COMPARATOR BETWEEN FLYBACK
AND OSCILLATOR (PLL2)
. INTERNAL VOLTAGE REGULATOR
. DC COMPATIBLE CONTROLS FOR PHASE
AND FREQUENCY
. HORIZONTAL OUTPUT DUTY CYCLE : 41%
VERTICAL SECTION
. SYNCHRONIZATION INPUT : TTL COMPAT-
IBLE, NEGATIVE EDGE TRIGGERED
. SYNCHRONIZATION INDEPENDENT FROM
DUTY CYCLE TIME
. OSCILLATOR : FREQUENCY RANGE FROM
30Hz to 120Hz
. RAMP GENERATOR WITH VARIABLE GAIN
STAGE
. VERTICAL RAMP VOLTAGE REFERENCE
. INTERNAL VOLTAGE REGULATOR
. DC COMPATIBLE CONTROLS FOR FRE-
QUENCY, AMPLITUDE AND LINEARITY
DESCRIPTION
The TDA9102C/T is a monolithic integrated circuit
for horizontal and vertical sync processing in mono-
chrome and color video displays driven by input
TTL compatible signals.
The TDA9102C/T is supplied in a 20 pin dual in line
package with pin 11 connected to ground and used
for heatsinking.
May 1994
DIP20 (0.25)
(Plastic package)
ORDER CODES : TDA9102C/T
PIN CONNECTIONS
Substrate Ground 11
Vertical Frequency Preset 12
C13 13
Vertical TTL Input 14
Vertical Ramp Output 15
Vertical Amplitude Adjust 16
Vertical Linearity Adjust 17
Linearity Output 18
Vertical Reference Voltage 19
VS 20
10 Horizontal Phase Adjust
9 Phase Comparator 2 Output
8 Horizontal Flyback Input
7 Horizontal Output
6 Horizontal Power Ground
5 C5
4 Horizontal TTL Input
3 Phase Comparator 1 Output
2 C2
1 R1
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TDA9102T (ST Microelectronics)
H/V PROCESSOR FOR TTL V.D.U

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TDA9102C/T
BLOCK DIAGRAM
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TDA9102T (ST Microelectronics)
H/V PROCESSOR FOR TTL V.D.U

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TDA9102C/T
ABSOLUTE MAXIMUM RATINGS
Symbol
VS
VSYNC
IOH
I15
I19
Ptot
Tstg , Tj
Parameter
Supply Voltage
Sync Input Peak Voltage
Output Sinking Peak Current (Pin 7 ; t < 3µs)
Output Current (Pin 15)
Output Current (Pin 19)
Total power dissipation (Tamb < 70oC)
Storage and Junction Temperature
Value
18
+ VS
2
- 10
- 10
1
- 40, + 150
Unit
V
V
A
mA
mA
W
oC
THERMAL DATA
Symbol
Parameter
Rth(j-a) Junction-ambient Thermal Resistance
Value
80
Unit
oC/W
ELECTRICAL CHARACTERISTICS
(Tamb = 25oC, VS = 12V, refer to the test circuits, unless otherwise specified)
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
HORIZONTAL SECTION
VS
IS
V1
I1
V2
K0
V3 - V1
I3
K3
V4
I4
T4
V5
t5
t7
V7 sat
tD
IFLY
V8
I8
I9
Supply Voltage Range
Supply Current
Voltage Reference at Pin 1
Current at Pin 1
Voltage Swing at Pin 2
Free Running Frequency Constant
Control Voltage Range
Peak Control Current
Gain Phase Comparator φ1
K3 = 2 x I3 / 360
Sync Threshold Input (neg. edge)
Current at Pin 4
Input Pulse Duration T = 1/fH
Monostable Threshold
Internal Pulse Width (t5 = C5 x V5 /I5)
Output Pulse Duration (low) - T = 1/fH
Output Saturation Voltage
Permissible delay between output pulse
leading edge and flyback pulse leading edge
(for
keeping
a
constant
duty
cycle)
;
T
=
1
fH
Flyback Input Current at Pin 8
Clamp voltage at Pin 8
Current for switching low the output pulse
Peak control current
I1 = 0.5mA
fo = 1/(K0 x R1 x C2)
(See technical note 1)
q Sync high
q Sync low
q Input high
q Input low
@ fH = 27.64kHz
C5 = 220 pF
(see technical note 2)
fH = 27kHz
fH = 70kHz
I7 = 600 mA
See technical note 4
@ fH = 27kHz
q Flyback On
q Flyback Off
q I8 = 1mA
q I8 = - 1mA
10.5 12 15.5
V
40 70 mA
3.2 3.5 3.8
V
- 1 mA
3.7 4 4.3 VPP
2.8 3.04 3.2
1.6 2.5
V
3 mA
17
µA
degree
2 8V
0.8 V
10 µA
- 10 µA
1 0.9T µs
5.6 6 6.4
V
3.6 µs
0.38T 0.41T 0.44T
0.35T 0.39T 0.43T
1.2 2.5
0.41 T - t FLY
µs
µs
V
s
0.7 2
-1
0.6
- 0.6
0.7 2
0.9
mA
mA
V
V
mA
mA
3/7


TDA9102T (ST Microelectronics)
H/V PROCESSOR FOR TTL V.D.U

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TDA9102C/T
ELECTRICAL CHARACTERISTICS (continued)
(Tamb = 25oC, VS = 12V, refer to the test circuits, unless otherwise specified)
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
HORIZONTAL SECTION
K9
V10
K10
HADJ
K1
K2
Phase sensitivity at Pin 9
(See technical note 3)
Control voltage range
Phase control sensitivity at Pin 10
Horizontal phase adjustment for V10 varying
from 0.5 to 4.5V (27.64kHz)
Phase jitter constant
(jitter =
K1
106 .
)
fH
Frequency drift versus supply voltage
K2
=
dF . 106
dV . fH
Zero degree phase: flyback
centered on the middle of the
pulse at Pin 5
VS = 10.5V to 15.5V
67.5
degree
V
0.5 4.5 V
20
22.5
25
degree
V
- 45 + 45 degree
100 150
400
ppm
ppm
V
VERTICAL SECTION
V12
I13
I12
V13
tFALL
fVL
fVH
K14
V14
I14
t14
V15
II15I
K15
K16
I16
I17
V18
K18
V19
I19
Voltage reference at Pin 12
Current gain at Pin 13
Typical Vertical Sawtooth Amplitude
(Pin 13) for Center Frequency
Discharge time at Pin 13
Maximum Vertical Frequency
Minimum Vertical Frequency
Synchro
window
constant
ts
=
K14
fV
Sync input threshold (negative edge)
Current at Pin 14
Input pulse duration
T
=
1
fV
Average value of voltage on Pin 15
Output current at Pin 15
Buffer gain constant at Pin 15
V15PP = K15 . V13PP
Buffer variable gain constant at Pin 15 :
K16
=
V15PP
V16 . V13PP
Input bias current at Pin 16
Input bias current at Pin 17
Average
voltage
at
Pin
18
:
V18
=
2
+
V18PP
2
Linearity
correction
constant
:
K18
=
V18PP
V17
Voltage reference at Pin 19
Current at Pin 19
I12 = 100µA
(I12 max. = 200µA)
To be adjusted by I12
3.2 3.5 3.8
0.94 1 1.06
4
C18 = 0.22 µF, V13 = 4VPP
Vertical Sync Low
CPin 13 = 220nF, RPin 12 = 58k
Vertical Sync High
CPin 13 = 220nF, RPin 12 = 58k
10 22
84
56
(See technical note 6)
0.333
q Sync high
q Sync Low
28
0.8
q Input high
q Input Low V14 = 0.8V
- 10
10
@ fV = 64.75Hz
10 0.5T
V13 = 4VPP, V16 = 2.5V
V16 = 2.5V
4
1
0.95
2.5V < V16 < 4.5V
0.5V < V16 < 2.5V
0.1
0.1
V16 = 0.5V
V17 = 4.5V
V17 = 3.5V, R18 not connected
- 50
3
50
V13PP = 4V,1.5V < V17 < 4.5V
1
(See technical note 5)
7.6 8 8.4
2
V
VPP
µs
Hz
Hz
V
V
µA
µA
µs
V
mA
V -1
V -1
µA
µA
V
V
mA
4/7


TDA9102T (ST Microelectronics)
H/V PROCESSOR FOR TTL V.D.U

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TDA9102C/T
ELECTRICAL CHARACTERISTICS (continued)
(Tamb = 25oC, VS = 12V, refer to the test circuits, unless otherwise specified)
Symbol
Parameter
Test conditions Min. Typ. Max.
VERTICAL SECTION
K17
Frequency
drift
versus
supply
voltage
K17
=
dF . 106
dV . fV
VS = 10.5V to 15.5V
300
Unit
ppm
V
Technical note 1
HORIZONTAL
OSCILLATOR
Technical note 3
K9 = 67.5 degrees/volt represents the slope of the
oscillator charging period of the waveform at
ϕ1 HOR. SYNC.
Pin 2:
K9
=
360
x 0.75
4
degree
V
V3H
V3H VDC
2
C2
1 R2
if
R1 I1
V3L
3
C1 R3
C3
V3L VDC
fH (nom) = 26.8 kHz
R1 = 6.8k
R2 = 56 k
C2 = 1.8 nF
fpull-in
=
fH
(nom)
V3 V1 /
V1 / R1
R2
=
fH (nom)
If
Io
(A)
where: V1 = 3.5V and V3 - V1is the control
voltage range.
The voltage at Pin 3 is limited by two clamping
diodes at the voltage V3H and V3L
When the PLL1 is synchronized and perfectly
tuned, V3 = V1.
Technical note 4
The second PLL can recover the storage of hori-
zontal output stage maintaining a constant duty
cycle till the trailing edge of the output pulse gets
the trailing edge of the flyback pulse. From this
point on, only the leading edge of the output pulse
will be shifted covering a total phase shift of: 0.30T;
overcoming this value, it will produce a notch in the
output pulse (@ fH = 27kHz).
Technical note 5
The voltage reference at Pin 19 can be used to
polarize the DC operating point of the vertical
booster. This voltage corresponds to the double of
the mean value voltage of the vertical sawtooth at
Pin 13.
Technical note 6
V (V)
VH = 6.8V
V = 6V
VL = 5.2V
Remark: The value of C2 influences the horizontal
oscillator free running frequency; it doesn’t effect
the relative pull-in range. If the horizontal fre-
quency is changed by using R1, the pull-in range
changes accordingly with the formula (A).
Technical note 2
The internal pulse "t5", is generated by the current
generator "I5" charging the external capacitor
"C5", according with the formula (B):
t5 =
C5 .
I5
V5
(B),
t5 =
TH
12
is recommended.
VLL = 2V
VH
ts
VL
=
VH VLL
1/fV
ts
=
(VH VL)
(VH VLL)
1
fV
=
K14
fV
t (s)
1/fv
ts
5/7


TDA9102T (ST Microelectronics)
H/V PROCESSOR FOR TTL V.D.U

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TDA9102C/T
APPLICATION DIAGRAM (with TDA8172)
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TDA9102T (ST Microelectronics)
H/V PROCESSOR FOR TTL V.D.U

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PACKAGE MECHANICAL DATA
20 PINS - PLASTIC DIP (0.25)
TDA9102C/T
b
Z
B
e3
e
Z
D
b1
E
20 11
1 10
Dimensions
a1
B
b
b1
D
E
e
e3
F
i
L
Z
Min.
0.254
1.39
Millimeters
Typ.
0.45
0.25
8.5
2.54
22.86
3.3
Max.
1.65
25.4
7.1
3.93
1.34
Min.
0.010
0.055
Inches
Typ.
0.018
0.010
0.335
0.100
0.900
0.130
Max.
0.065
1.000
0.280
0.155
0.053
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility
for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result
from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics.
Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life
support devices or systems without express written approval of SGS-THOMSON Microelectronics.
© 1994 SGS-THOMSON Microelectronics - All Rights Reserved
Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips
I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to
the I2C Standard Specifications as defined by Philips.
SGS-THOMSON Microelectronics GROUP OF COMPANIES
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