FQD3N60 (Fairchild Semiconductor)
600V N-Channel MOSFET

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FQD3N60 / FQU3N60
600V N-Channel MOSFET
April 2000
QFETTM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.
Features
• 2.4A, 600V, RDS(on) = 3.6@VGS = 10 V
• Low gate charge ( typical 10 nC)
• Low Crss ( typical 5.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D-PAK
FQD Series
GDS
I-PAK
FQU Series
D
!
"
!"
G!
"
"
!
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
Parameter
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
- Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8from case for 5 seconds
FQD3N60 / FQU3N60
600
2.4
1.5
9.6
±30
200
2.4
5.0
4.5
2.5
50
0.4
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
RθJC
RθJA
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
©2000 Fairchild Semiconductor International
Typ
Max
Units
-- 2.5 °CW
-- 50 °CW
-- 110 °CW
Rev. A, April 2000


FQD3N60 (Fairchild Semiconductor)
600V N-Channel MOSFET

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Electrical CharacteristicsTC = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
/ TJ
IDSS
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 600 V, VGS = 0 V
VDS = 480 V, TC = 125°C
VGS = 30 V, VDS = 0 V
VGS = -30 V, VDS = 0 V
600
--
--
--
--
--
--
0.6
--
--
--
--
On Characteristics
VGS(th)
RDS(on)
Gate Threshold Voltage
Static Drain-Source
On-Resistance
gFS Forward Transconductance
VDS = VGS, ID = 250 µA
VGS = 10 V, ID = 1.2 A
VDS = 50 V, ID = 1.2 A (Note 4)
3.0
--
--
--
2.8
2.4
Dynamic Characteristics
Ciss
Coss
Input Capacitance
Output Capacitance
Crss Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 350
-- 50
-- 5.5
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 300 V, ID = 3.0 A,
RG = 25
(Note 4, 5)
VDS = 480 V, ID = 3.0 A,
VGS = 10 V
(Note 4, 5)
--
--
--
--
--
--
--
10
30
20
30
10
2.7
4.9
--
--
10
100
100
-100
5.0
3.6
--
450
65
7.5
30
70
50
70
13
--
--
V
V/°C
µA
µA
nA
nA
V
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
-- -- 2.4
ISM Maximum Pulsed Drain-Source Diode Forward Current
-- -- 9.6
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2.4 A
-- -- 1.4
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = 3.0 A,
-- 210
dIF / dt = 100 A/µs
(Note 4)
--
1.2
--
--
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 64mH, IAS = 2.4A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD  3.0A, di/dt  200A/µs, VDD  BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width  300µs, Duty cycle  2%
5. Essentially independent of operating temperature
A
A
V
ns
µC
©2000 Fairchild Semiconductor International
Rev. A, April 2000


FQD3N60 (Fairchild Semiconductor)
600V N-Channel MOSFET

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Typical Characteristics
VGS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
100 Bottom: 5.5 V
10-1
10-2
10-1
 Notes :
1. 250s Pulse Test
2. TC = 25
100 101
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
12
10
8 VGS = 10V
VGS = 20V
6
4
2
 Note : T = 25
J
0
01234567
ID, Drain Current [A]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
600
500
Ciss
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
400
Coss
300
 Notes :
200 1. VGS = 0 V
Crss 2. f = 1 MHz
100
0
10-1 100 101
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2000 Fairchild Semiconductor International
100
10-1
2
150
25
-55
 Notes :
1. VDS = 50V
2. 250s Pulse Test
468
VGS , Gate-Source Voltage [V]
10
Figure 2. Transfer Characteristics
100
10-1
0.2
150
25
 Notes :
1. V = 0V
2. 25GS0s Pulse Test
0.4 0.6 0.8 1.0 1.2 1.4 1.6
VSD , Source-Drain Voltage [V]
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
10 VDS = 120V
VDS = 300V
8 VDS = 480V
6
4
2
 Note : ID = 3.0 A
0
0 2 4 6 8 10
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A, April 2000


FQD3N60 (Fairchild Semiconductor)
600V N-Channel MOSFET

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Typical Characteristics (Continued)
1.2
1.1
1.0
0.9 Notes:
1. VGS =0V
2. ID=250A
0.8
-100
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
Operation in This Area
is Limited by R
DS(on)
101
100
10
µs
µs
1 ms
10 ms
100 DC
10-1
10-2
100
 Notes :
1. T = 25 oC
C
2. T = 150 oC
J
3. Single Pulse
VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-100
 Notes :
1. V = 10 V
GS
2. ID = 1.5 A
-50 0
50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
2.5
2.0
1.5
1.0
0.5
0.0
25 50 75 100 125 150
TC, Case Temperature []
Figure 10. Maximum Drain Current
vs. Case Temperature
100
1 0 -1
D =0.5
0 .2
0 .1
0 .05
0 .02
0 .01
s in g le p u ls e
 N ote s :
1. Z  JC(t) = 2.5  /W M ax.
2. D u ty F actor, D =t1/t2
3 . T JM - T C = P DM * Z  JC(t)
PDM
t1
t2
1 0 -2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t , S q u a re W a v e P u ls e D u ra tio n [s e c ]
1
101
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A, April 2000


FQD3N60 (Fairchild Semiconductor)
600V N-Channel MOSFET

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Gate Charge Test Circuit & Waveform
50K
Same Type
as DUT
12V 200nF
300nF
VGS
10V
Qg
VGS
VDS
Qgs Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
10V
VDS
VGS
RG
RL
VDD
DUT
VDS
90%
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
ID
RG
L
EAS =
--1--
2
L IAS2
BVDSS
--------------------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
10V
tp
DUT
VDD VDS (t)
t p Time
©2000 Fairchild Semiconductor International
Rev. A, April 2000


FQD3N60 (Fairchild Semiconductor)
600V N-Channel MOSFET

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Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
Same Type
as DUT
• dv/dt controlled by RG
• ISD controlled by pulse period
VDD
VGS
( Driver )
I SD
( DUT )
VDS
( DUT )
D = --G--a--t-e--P--u--l-s-e---W---i-d-t-h--
Gate Pulse Period
10V
IFM , Body Diode Forward Current
di/dt
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VSD
Body Diode
Forward Voltage Drop
VDD
©2000 Fairchild Semiconductor International
Rev. A, April 2000


FQD3N60 (Fairchild Semiconductor)
600V N-Channel MOSFET

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Package Dimensions
(0.50)
6.60 ±0.20
5.34 ±0.30
(4.34)
DPAK
(0.50)
2.30 ±0.10
0.50 ±0.10
MAX0.96
2.30TYP
[2.30±0.20]
0.76 ±0.10
2.30TYP
[2.30±0.20]
6.60 ±0.20
(5.34)
(5.04)
(1.50)
0.50 ±0.10
1.02 ±0.20
2.30 ±0.20
(2XR0.25)
©2000 Fairchild Semiconductor International
0.76 ±0.10
Rev. A, April 2000


FQD3N60 (Fairchild Semiconductor)
600V N-Channel MOSFET

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Package Dimensions (Continued)
(0.50)
6.60 ±0.20
5.34 ±0.20
(4.34)
IPAK
(0.50)
2.30 ±0.20
0.50 ±0.10
MAX0.96
0.76 ±0.10
2.30TYP
[2.30±0.20]
2.30TYP
[2.30±0.20]
0.50 ±0.10
©2000 Fairchild Semiconductor International
Rev. A, April 2000


FQD3N60 (Fairchild Semiconductor)
600V N-Channel MOSFET

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TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
E2CMOS™
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench®
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
INTERNATIONAL.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Advance Information
Product Status
Formative or In
Design
Preliminary
First Production
No Identification Needed
Full Production
Definition
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
©2000 Fairchild Semiconductor International
Rev. A, January 2000




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