ADG620 (Analog Devices)
CMOS +-5 V/ +5V 4 OHM SINGLE SPDT SWITCHES

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a
FEATURES
6 (Max) On Resistance
0.8 (Max) On-Resistance Flatness
2.7 V to 5.5 V Single Supply
؎2.7 V to ؎5.5 V Dual Supply
Rail-to-Rail Operation
8-Lead SOT-23 Package, 8-Lead Micro-SOIC Package
Typical Power Consumption (<0.1 W)
TTL/CMOS Compatible Inputs
APPLICATIONS
Automatic Test Equipment
Power Routing
Communication Systems
Data Acquisition Systems
Sample and Hold Systems
Avionics
Relay Replacement
Battery-Powered Systems
CMOS ؎5 V/+5 V
4 Single SPDT Switches
ADG619/ADG620
FUNCTIONAL BLOCK DIAGRAM
ADG619/ADG620
S2
D
S1
IN
SWITCHES SHOWN FOR A LOGIC "1" INPUT
GENERAL DESCRIPTION
The ADG619 and the ADG620 are monolithic, CMOS SPDT
(single pole, double throw) switches. Each switch conducts
equally well in both directions when on.
The ADG619/ADG620 offers low On-Resistance of 4 , which
is matched to within 0.7 between channels. These switches also
provide low power dissipation yet give high switching speeds.The
ADG619 exhibits break-before-make switching action, thus
preventing momentary shorting when switching channels. The
ADG620 exhibits make-before-break action.
The ADG619/ADG620 are available in 8-lead SOT-23 pack-
ages and 8-lead Micro-SOIC packages.
Table I. Truth Table for the ADG619/ADG620
IN
Switch S1
Switch S2
0 ON
OFF
1 OFF ON
PRODUCT HIGHLIGHTS
1. Low On Resistance (RON) (4 typ)
2. Dual ± 2.7 V to ± 5.5 V or Single 2.7 V to 5.5 V
3. Low Power Dissipation. CMOS construction ensures low
power dissipation.
4. Fast tON/tOFF
5. Tiny 8-Lead SOT-23 Package and 8-Lead Micro-SOIC Package
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001


ADG620 (Analog Devices)
CMOS +-5 V/ +5V 4 OHM SINGLE SPDT SWITCHES

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ADG619/ADG620–SPECIFICATIONS
DUAL SUPPLY1
(VDD = +5 V ؎ 10%, VSS = –5 V ؎ 10%, GND = 0 V. All specifications –40؇C to +85؇C unless otherwise noted.)
Parameter
+25؇C
B Version
–40؇C to
+85؇C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match Between
Channels (RON)
On-Resistance Flatness (RFLAT(ON))
4
6
0.7
1.1
0.7
VSS to VDD
8
1.35
0.8
1.2
V
typ
max
typ
max
typ
max
VDD = +4.5 V, VSS = –4.5 V
VS = ± 4.5 V, IS = –10 mA,
Test Circuit 1
VS = ± 4.5 V, IS = –10 mA
VS = ± 3.3 V, IS = –10 mA
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Channel ON Leakage ID, IS (ON)
± 0.01
± 0.25
± 0.01
± 0.25
±1
±1
nA typ
nA max
nA typ
nA max
VDD = +5.5 V, VSS = –5.5 V
VS = ± 4.5 V, VD = ϯ4.5 V,
Test Circuit 2
VS = VD = ± 4.5 V, Test Circuit 3
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
0.005
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
ADG619
tON
tOFF
Break-Before-Make Time Delay, tBBM
2
80
120
45
75
40
ADG620
tON
tOFF
Make-Before-Break Time Delay, tMBB
40
65
200
330
160
Charge Injection
110
Off Isolation
–67
Channel-to-Channel Crosstalk
–67
Bandwidth –3 dB
CS (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
ISS
190
25
95
0.001
0.001
2.4
0.8
± 0.1
155
90
10
85
400
10
1.0
1.0
V min
V max
µA typ
µA max
pF typ
VIN = VINL or VINH
ns typ
ns max
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
µA typ
µA max
µA typ
µA max
RL = 300 , CL = 35 pF
VS = 3.3 V, Test Circuit 4
RL = 300 , CL = 35 pF
VS = 3.3 V, Test Circuit 4
RL = 300 , CL = 35 pF
VS1 = VS2 = 3.3 V, Test Circuit 5
RL = 300 , CL = 35 pF
VS = 3.3 V, Test Circuit 4
RL = 300 , CL = 35 pF
VS = 3.3 V, Test Circuit 4
RL = 300 , CL = 35 pF
VS = 0 V, Test Circuit 6
VS = 0 V, RS = 0 Ω, CL = 1 nF,
Test Circuit 7
RL = 50 , CL = 5 pF, f = 1 MHz,
Test Circuit 8
RL = 50 , CL = 5 pF, f = 1 MHz,
Test Circuit 10
RL = 50 , CL = 5 pF, Test Circuit 9
f = 1 MHz
f = 1 MHz
VDD = +5.5 V, VSS = –5.5 V
Digital Inputs = 0 V or 5.5 V
Digital Inputs = 0 V or 5.5 V
NOTES
1Temperature ranges are as follows: B Version, –40°C to +85°C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2– REV. 0


ADG620 (Analog Devices)
CMOS +-5 V/ +5V 4 OHM SINGLE SPDT SWITCHES

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ADG619/ADG620
SINGLE SUPPLY1 (VDD = +5 V ؎ 10%, VSS = 0 V, GND = 0 V. All specifications –40؇C to +85؇C unless otherwise noted.)
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match Between
Channels (RON)
On-Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Channel ON Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
ADG619
tON
tOFF
Break-Before-Make Time Delay, tBBM
ADG620
tON
tOFF
Make-Before-Break Time Delay, tMBB
Charge Injection
B Version
–40؇C to
+25؇C
+85؇C
0 V to VDD
7
ß10 12.5
0.8
1 1.2
0.5 0.5
0.8
± 0.01
± 0.25
± 0.01
± 0.25
±1
±1
0.005
2
2.4
0.8
± 0.1
120
220 280
50
75 110
70
10
50
85 110
210
340 420
170
10
6
Off Isolation
–67
Channel-to-Channel Crosstalk
–67
Bandwidth –3 dB
CS (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
190
25
95
0.001
NOTES
1Temperature ranges are as follows: B Version, –40°C to +85°C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
1.0
Unit
Test Conditions/Comments
V
typ
max
typ
max
typ
max
nA typ
nA max
nA typ
nA max
VDD = 4.5 V, VSS = 0 V
VS = 0 V to 4.5 V, IS = –10 mA,
Test Circuit 1
VS = 0 V to 4.5 V, IS = –10 mA
VS = 1.5 V to 3.3 V, IS = –10 mA
VDD = 5.5 V
VS = 1 V/4.5 V, VD = 4.5 V/1 V,
Test Circuit 2
VS = VD = 1 V/4.5 V,
Test Circuit 3
V min
V max
µA typ
µA max
pF typ
VIN = VINL or VINH
ns typ
ns max
ns typ
ns max
ns typ
ns min
RL = 300 , CL = 35 pF
VS = 3.3 V, Test Circuit 4
RL = 300 , CL = 35 pF
VS = 3.3 V, Test Circuit 4
RL = 300 , CL = 35 pF,
VS1 = VS2 = 3.3 V, Test Circuit 5
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
µA typ
µA max
RL = 300 , CL = 35 pF
VS = 3.3 V, Test Circuit 4
RL = 300 , CL = 35 pF
VS = 3.3 V, Test Circuit 4
RL = 300 , CL = 35 pF
VS = 3.3 V, Test Circuit 6
VS = 0 V, RS = 0 Ω, CL = 1 nF,
Test Circuit 7
RL = 50 , CL = 5 pF, f = 1 MHz,
Test Circuit 8
RL = 50 , CL = 5 pF, f = 1 MHz,
Test Circuit 10
RL = 50 , CL = 5 pF, Test Circuit 9
f = 1 MHz
f = 1 MHz
VDD = 5.5 V
Digital Inputs = 0 V or 5.5 V
REV. 0
–3–


ADG620 (Analog Devices)
CMOS +-5 V/ +5V 4 OHM SINGLE SPDT SWITCHES

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ADG619/ADG620
ABSOLUTE MAXIMUM RATINGS1
(TA = 25°C unless otherwise noted)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6.5 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –6.5 V
Analog Inputs2 . . . . . . . . . . . . . . . . VSS –0.3 V to VDD +0.3 V
Digital Inputs2 . . . . . . . . . . . . . . . . . –0.3 V to VDD +0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 50 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Micro-SOIC Package
JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 206°C/W
JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 44°C/W
SOT-23 Package
JA Thermal Impedance . . . . . . . . . . . . . . . . . . 229.6°C/W
JC Thermal Impedance . . . . . . . . . . . . . . . . . . 91.99°C/W
Lead Temperature, Soldering (10 seconds) . . . . . . . . . 300°C
IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . . . 220°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
PIN CONFIGURATIONS
8-Lead SOT-23
(RT-8)
D1
8 S2
S1 2
ADG619/
ADG620
7
VSS
GND 3 TOP VIEW 6 IN
VDD 4 (Not to Scale) 5 NC
NC = NO CONNECT
8-Lead Micro-SOIC
(RM-8)
D1
8 S2
S1 2
ADG619/
ADG620
7 VSS
GND 3 TOP VIEW 6 IN
VDD 4 (Not to Scale) 5 NC
NC = NO CONNECT
ORDERING GUIDE
Model
Temperature Range
Branding
Information* Package Description
ADG619BRM
ADG619BRT
ADG620BRM
ADG620BRT
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
SVB
SVB
SWB
SWB
Micro-SOIC (microSmall Outline IC)
SOT-23 (Plastic Surface Mount)
Micro-SOIC (microSmall Outline IC)
SOT-23 (Plastic Surface Mount)
*Branding on SOT-23 and Micro-SOIC packages is limited to three characters due to space constraints.
Package Option
RM-8
RT-8
RM-8
RT-8
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG619/ADG620 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4– REV. 0


ADG620 (Analog Devices)
CMOS +-5 V/ +5V 4 OHM SINGLE SPDT SWITCHES

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Mnemonic
VDD
VSS
GND
IDD
ISS
S
D
IN
RON
DRON
RFLAT(ON)
IS (OFF)
ID, IS (ON)
VD (VS)
VINL
VINH
IINL(IINH)
CS (OFF)
CD, CS (ON)
tON
tOFF
tMBB
tBBM
Charge Injection
Crosstalk
Off Isolation
Bandwidth
Insertion Loss
ADG619/ADG620
TERMINOLOGY
Description
Most Positive Power Supply Potential
Most Negative Power Supply in a Dual Supply Application. In single supply applications, this should be
tied to ground at the device.
Ground (0 V) Reference
Positive Supply Current
Negative Supply Current
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input
Ohmic Resistance Between D and S
On Resistance Match Between Any Two Channels, i.e., RON Max – RON Min.
Flatness is Defined as the Difference Between the Maximum and Minimum Value of On Resistance as
Measured Over the Specified Analog Signal Range.
Source Leakage Current With the Switch “OFF”
Channel Leakage Current With the Switch “ON”
Analog Voltage on Terminals D, S
Maximum Input Voltage for Logic “0”
Minimum Input Voltage for Logic “1”
Input Current of the Digital Input
“OFF” Switch Source Capacitance
“ON” Switch Capacitance
Delay Between Applying the Digital Control Input and the Output Switching On
Delay Between Applying the Digital Control Input and the Output Switching Off
“ON” Time, Measured Between the 80% Points of Both Switches, When Switching From One Address
State to Another
“OFF” Time or “ON” Time Measured Between the 90% Points of Both Switches, When Switching from
One Address State to Another
A Measure of the Glitch Impulse Transfered From the Digital Input to the Analog Output During Switching
A Measure of Unwanted Signal that is Coupled Through From One Channel to Another as a Result of
Parasitic Capacitance
A Measure of Unwanted Signal Coupling Through an “OFF” Switch
The Frequency Response of the “ON” Switch
The Loss Due to the ON Resistance of the Switch
Typical Performance Characteristics
8
VDD, VSS = ؎2.5V
7
6 VDD, VSS = ؎3V
5
4 VDD, VSS = ؎3.3V
3 VDD, VSS = ؎4.5V VDD, VSS = ؎5V
2
1 TA = 25؇C
0
–5 –4 –3 –2 –1 0 1
VD, VS – V
2
34
5
TPC 1. On Resistance vs. VD (VS)
Dual Supply
18
VDD = 2.7V
16
14 VDD = 3V
TA = 25؇C
VSS = 0V
12
10 VDD = 3.3V
8 VDD = 4.5V
6 VDD = 5V
4
2
0
01 2345
VD, VS V
TPC 2. On Resistance vs. VD (VS)
Single Supply
6
5
4 TA = +85؇C
TA = +25؇C
3
TA = 40؇C
2
1 VDD = +5V
VSS = 5V
0
5 4 3 2 1 0 1 2 3 4 5
VD, VS V
TPC 3. On Resistance vs. VD (VS) for
Different Temperatures Dual Supply
REV. 0
–5–


ADG620 (Analog Devices)
CMOS +-5 V/ +5V 4 OHM SINGLE SPDT SWITCHES

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ADG619/ADG620Typical Performance Characteristics
10
9
8
7
6
5
4
3
2
VDD = 5V
VSS = 0V
1
0
01
TA = +85؇C
TA = +25؇C
TA = 40؇C
23
VD, VS V
4
5
TPC 4. On Resistance vs. VD (VS) for
Different Temperatures Single Supply
0.5
VDD = +5V
0.4 VSS = 5V
0.3 VD = ؎4.5V
VS = ؏4.5V
0.2
IS (OFF)
0.1
0
0.1
ID, IS (ON)
0.2
0.3
0.4
0.5
0
10 20 30 40 50 60 70 80 0
TEMPERATURE ؇C
TPC 5. Leakage Currents vs.
Temperature Dual Supply
0.5
VDD = 5V
0.4 VSS = 0V
0.3 VD = 4.5V/1V
VS = 1V/4.5V
0.2
0.1
ID, IS (ON)
0
0.1
0.2
IS (OFF)
0.3
0.4
0.5
0
10 20 30 40 50 60 70 80 0
TEMPERATURE ؇C
TPC 6. Leakage Currents vs.
Temperature Single Supply
250
TA = 25؇C
200
VDD ؍ +5V
VSS ؍ 5V
150
100
VDD ؍ 5V
VSS ؍ 0V
50
0
5 4 3 2 1 0 1 2 3 4 5
VS V
TPC 7. Charge Injection vs. Source
Voltage
180
160
VDD ؍ 5V
140 VSS ؍ 0V
120
100 tON
VDD ؍ +5V
VSS ؍ 5V
80
60
40
20
0
40
tOFF
VDD ؍ 5V
VSS ؍ 0V
VDD ؍ +5V
VSS ؍ 5V
20 0 20 40 60
TEMPERATURE C
80
TPC 8. tON/tOFF Times vs. Temperature
10
20
30
40
50
60
70
80
90
100
0.03
VDD = +5V
VSS = 5V
TA = 25؇C
1 10
FREQUENCY MHz
100
TPC 9. Off Isolation vs. Frequency
10
20
30
40
50
60
70
80
0.2
VDD = +5V
VSS = 5V
TA = 25؇C
1 10
FREQUENCY MHz
100
TPC 10. Crosstalk vs. Frequency
0
VDD = +5V
2 VSS = 5V
TA = 25؇C
4
6
8
10
12
0.2 1 10 100 1000
FREQUENCY MHz
TPC 11. On Response vs. Frequency
6REV. 0


ADG620 (Analog Devices)
CMOS +-5 V/ +5V 4 OHM SINGLE SPDT SWITCHES

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TEST CIRCUITS
IDS
V1
SD
VS RON = V1/IDS
Test Circuit 1. On Resistance
IS (OFF)
S
VS
ID (OFF)
D
VD
Test Circuit 2. Off Leakage
ADG619/ADG620
ID (ON)
NC S D A
VD
Test Circuit 3. On Leakage
VDD VSS
0.1F
0.1F
VDD VSS
50%
50%
VIN
SD
VOUT
90%
90%
VS IN
RL
300
CL
35pF
VOUT
GND
tON tOFF
Test Circuit 4. Switching Times
VDD VSS
0.1F
0.1F
VS1
VS2
S1 VDD VSS
D D2
S2 RL2
VOUT
CL2
IN 30035pF
VIN GND
VIN 0V
50%
VOUT
90%
0V
tBBM
50%
90%
tBBM
Test Circuit 5. Break-Before-Make Time Delay, tBBM (ADG619 Only)
0.1F VDD VSS 0.1F
VDD VSS
VD
IN
VIN GND
RL2
300
VS1
CL2
35pF
RL1
300
VS1
CL1
35pF
VIN
0V
VS1
VS2
50%
50%
80%VD
80%VD
tMBB
Test Circuit 6. Make-Before-Break Time Delay, tMBB (ADG620 Only)
RS
VS
VDD
VSS
VDD
D
VSS
S
IN
GND
VIN
VOUT
CL
1nF
S2
VOUT
S1
VOUT
QINJ = CL ؋VOUT
VOUT
Test Circuit 7. Charge Injection
REV. 0
7


ADG620 (Analog Devices)
CMOS +-5 V/ +5V 4 OHM SINGLE SPDT SWITCHES

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ADG619/ADG620
VDD
0.1F
VSS
0.1F
VDD
VSS
IN
VIN
S
D
GND
50
NETWORK
ANALYZER
50
VS
VOUT
RL
50
OFF ISOLATION = 20 LOG
VOUT
VS
Test Circuit 8. Off Isolation
NETWORK
ANALYZER
VOUT
R
50
50
VS
VDD
0.1F
VSS
0.1F
VDD
S1
VSS
S2
IN
DR
50
GND
VOUT
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG VS
Test Circuit 10. Channel-to-Channel Crosstalk
VDD
0.1F
VSS
0.1F
VDD
VSS
IN
VIN
S
D
GND
NETWORK
ANALYZER
50
VS
VOUT
RL
50
INSERTION LOSS = 20 LOG VOUT WITH SWITCH
VS WITHOUT SWITCH
Test Circuit 9. Bandwidth
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Micro-SOIC Package
(RM-8)
0.122 (3.10)
0.114 (2.90)
8
0.122 (3.10)
0.114 (2.90)
1
5
0.199 (5.05)
0.187 (4.75)
4
PIN 1
0.0256 (0.65) BSC
0.120 (3.05)
0.120 (3.05)
0.112 (2.84)
0.112 (2.84)
0.006 (0.15)
0.002 (0.05)
0.043 (1.09)
0.037 (0.94)
33؇
0.018 (0.46)
SEATING
PLANE
0.008 (0.20)
0.011 (0.28) 27؇
0.003 (0.08)
0.028 (0.71)
0.016 (0.41)
8-Lead Plastic Surface Mount Package
(RT-8)
0.122 (3.10)
0.110 (2.80)
0.071 (1.80)
0.059 (1.50)
8765
1 234
PIN 1
0.077
(1.95)
BSC
0.026
(0.65) BSC
0.051 (1.30)
0.035 (0.90)
0.057 (1.45)
0.035 (0.90)
0.006 (0.15) 0.015 (0.38) SEATING
0.000 (0.00) 0.009 (0.22) PLANE
10؇
0؇
0.009 (0.23)
0.003 (0.08)
0.022 (0.55)
0.014 (0.35)
8REV. 0




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