CEM4450 (CET)
N-Channel Enhancement Mode Field Effect Transistor

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CEM4450
N-Channel Enhancement Mode Field Effect Transistor
FEATURES
60V, 7.5A, RDS(ON) = 24m@VGS = 10V.
RDS(ON) = 39m@VGS = 6V.
Super high dense cell design for extremely low RDS(ON).
High power and current handing capability.
Lead free product is acquired.
Surface mount Package.
DD D D
8 7 65
SO-8
1
1 234
S SSG
ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted
Parameter
Symbol
Limit
Drain-Source Voltage
Gate-Source Voltage
VDS 60
VGS ±20
Drain Current-Continuous
Drain Current-Pulsed a
ID 7.5
IDM 30
Maximum Power Dissipation
PD 2.5
Operating and Store Temperature Range
TJ,Tstg
-55 to 150
Thermal Characteristics
Parameter
Thermal Resistance, Junction-to-Ambient b
Symbol
RθJA
Limit
50
Units
V
V
A
A
W
C
Units
C/W
Specification and data are subject to change without notice .
1
Rev 2. 2007.July
http://www.cetsemi.com


CEM4450 (CET)
N-Channel Enhancement Mode Field Effect Transistor

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Electrical Characteristics TA = 25 C unless otherwise noted
Parameter
Symbol
Test Condition
Off Characteristics
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
On Characteristics c
BVDSS
IDSS
IGSSF
IGSSR
VGS = 0V, ID = 250µA
VDS = 60V, VGS = 0V
VGS = 20V, VDS = 0V
VGS = -20V, VDS = 0V
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward Transconductance
Dynamic Characteristics d
VGS(th)
RDS(on)
gFS
VGS = VDS, ID = 250µA
VGS = 10V, ID = 7.5A
VGS = 6V, ID = 6A
VDS = 15V, ID = 7.5A
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics d
Ciss
Coss
Crss
VDS = 25V, VGS = 0V,
f = 1.0 MHz
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
td(on)
tr
td(off)
VDD = 30V, ID = 1A,
VGS = 10V, RGEN = 6
Turn-Off Fall Time
tf
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Qg
Qgs
VDS = 30V, ID = 7.5A,
VGS = 10V
Qgd
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current b
Drain-Source Diode Forward Voltage c
IS
VSD
VGS = 0V, IS = 2.1A
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature.
b.Surface Mounted on FR4 Board, t < 10 sec.
c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
d.Guaranteed by design, not subject to production testing.
CEM4450
Min Typ Max Units
60 V
1 µA
100 nA
-100 nA
2 4V
20 24 m
30 39 m
10 S
1450
400
50
pF
pF
pF
18 35 ns
5 12 ns
32 72 ns
10 32 ns
28 36 nC
6.5 nC
6.0 nC
7.5 A
1.2 V
5
2


CEM4450 (CET)
N-Channel Enhancement Mode Field Effect Transistor

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30
VGS=10,8,7V
24 VGS=6V
18
12 VGS=5V
6
0
0 0.5 1.0 1.5 2.0
VDS, Drain-to-Source Voltage (V)
Figure 1. Output Characteristics
2400
2000
1600
Ciss
1200
800
Coss
400
Crss
0
0 5 10 15 20 25
VDS, Drain-to-Source Voltage (V)
Figure 3. Capacitance
1.3 VDS=VGS
1.2 ID=250µA
1.1
1.0
0.9
0.8
0.7
0.6
-50 -25 0 25 50 75 100 125 150
TJ, Junction Temperature( C)
Figure 5. Gate Threshold Variation
with Temperature
3
CEM4450
15
12
9
6
25 C
3 TJ=125 C
-55 C
0
1234567
VGS, Gate-to-Source Voltage (V)
Figure 2. Transfer Characteristics
2.2 ID=7.5A
1.9 VGS=10V
1.6
1.3
1.0
0.7
0.4
-100 -50 0 50 100 150 200
TJ, Junction Temperature( C)
Figure 4. On-Resistance Variation
with Temperature
VGS=0V
101
100
10-1
0.4 0.6 0.8 1.0 1.2 1.4
VSD, Body Diode Forward Voltage (V)
Figure 6. Body Diode Forward Voltage
Variation with Source Current


CEM4450 (CET)
N-Channel Enhancement Mode Field Effect Transistor

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10 VDS=30V
ID=7.5A
8
6
4
2
0
0 6 12 18 24 30
Qg, Total Gate Charge (nC)
Figure 7. Gate Charge
VDD
VIN RL
D VOUT
VGS
RGEN G
S
Figure 9. Switching Test Circuit
CEM4450
102
RDS(ON)Limit
101
100
1ms
10ms
100ms
1s
DC
5
10-1
TA=25 C
TJ=150 C
10-2 Single Pulse
10-2 10-1 100 101 102
VDS, Drain-Source Voltage (V)
Figure 8. Maximum Safe
Operating Area
td(on)
VOUT
t on
tr
td(off)
90%
10% INVERTED
toff
tf
90%
10%
VIN
10%
50%
90%
50%
PULSE WIDTH
Figure 10. Switching Waveforms
100
D=0.5
10-1
10-2
0.2
0.1
0.05
0.02
0.01
Single Pulse
10-3
10-4
10-3
10-2
10-1
100
Square Wave Pulse Duration (sec)
PDM
t1
t2
1. R JA (t)=r (t) * R JA
2. R JA=See Datasheet
3. TJM-TA = P* R JA (t)
4. Duty Cycle, D=t1/t2
101
102
Figure 11. Normalized Thermal Transient Impedance Curve
4




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