G084SN05-V5 (AUO)
Color TFT-LCD Module

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AU OPTRONICS CORPORATION
Product Functional Specifications
8.4 SVGA Color TFT-LCD Module with Touch Panel
Model Name: G084SN05 V.5
Approved by
Prepared by
GDBD Marketing Division / AU Optronics Croporation
Customer
Checked & Approved by
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Version: 0.1
Total Pages: 28
Date: 2006/5/10
Product Functional Specification
8.4 inch SVGA Color TFT LCD Module
Model Name: G084SN05 V.5
(u) Preliminary Specification
( ) Final Specification
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I. Contents
1.0 Handing Precautions ................................................................................... 5
2.0 General Description ..................................................................................... 6
2.1 Display Characteristics......................................................................... 6
2.2 Functional Block Diagram .................................................................... 7
3.0 Absolute Maximum Ratings ........................................................................ 8
4.0 Optical Characteristics ................................................................................ 9
5.0 Signal Interface............................................................................................11
5.1 Connectors ...........................................................................................11
5.2 Signal Pin..............................................................................................11
5.3 Signal Description............................................................................... 13
5.4 Signal Electrical Characteristics........................................................ 15
6.0 Pixel Format Image .................................................................................... 16
6.1 Scanning Direction ............................................................................. 16
7.0 Parameter guideline for CCFL inverter..................................................... 17
8.0 Interface Timings........................................................................................ 18
8.1 Timing Characteristics........................................................................ 18
8.2 Timing Definition................................................................................. 20
9.0 Power Consumption .................................................................................. 23
10.0 Power ON/OFF Sequence ........................................................................ 24
11.0 Reliability Test Items ................................................................................ 25
12.0 Packing ..................................................................................................... 26
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II. Record of Revision
Version and Date Page
Old Description
0.1 2006/5/10 All First Draft
New Description
Remark
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1.0 Handing Precautions
1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnection from input
connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration or
spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard
surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure
human earth when handling.
7) Do not open nor modify the module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) In case if a module has to be put back into the packing container slot after once it was
taken out from the container, do not press the center of the CCFL Reflector edge.
Instead, press at the far ends of the CCFL Reflector edge softly. Otherwise the TFT
module may be damaged.
10) At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor
tilt the interface Connector of the TFT module.
11) After installation of the TFT module into an enclosure, do not twist nor bend the TFT
module even momentary. At designing the enclosure, it should be taken into
consideration that no bending/twisting forces are applied to the TFT module from
outside. Otherwise the TFT module may be damaged.
12) Cold cathode fluorescent lamp in LCD contains a small amount of mercury. Please
follow local ordinances or regulations for disposal.
13) Small amount of materials having no flammability grade is used in the LCD module
should be supplied by power complied with requirements of Limited Power Source, or
be applied exemption.
14) The LCD module is designed so that the CCFL in it is supplied by Limited Current
Circuit. Do not connect the CCFL in Hazardous Voltage Circuit.
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2.0 General Description
This specification applies to the 8.4 inch color TFT LCD module G084SN05 V.5.
This module is designed for display units for Industrial Applications.
The screen format is intended to support the SVGA 800(H) x 600(V) and VGA 640(H) x
480(V) (through internal video scaling) screen and 262k colors (6bits RGB).
Input signals can be either digital 6bit RGB or analog RGB. Reverse scan function can
also be activated through the digital input signal.
The module does not contain an inverter card for backlight.
All components with RoHS compliance .
2.1 Display Characteristics
The following items are characteristics summary on the table under 25 condition
Items
Unit Specifications
Screen Diagonal
[mm] 213.4 ( 8.4 )
Active Area
[mm] 170.4(H) x 127.8(V)
Pixel H x V
800(x3) x 600
Pixel Pitch
[mm] 0.213(H) x 0.213(V)
Pixel Arrangement
R.G.B. Vertical Stripe
Display Mode
Typical White Luminance (ICFL=6 mA)
Normally White
[cd/m2] 350 Typ. (center)
Contrast Ratio
350 1 Typ.
Optical Rise Time/Fall Time
[msec] 10/25 Typ.
Nominal Input Voltage VDD
[Volt] +3.3 Typ.
Typical Power Consumption
[Watt] 6.8 Typ
(VDD line + VCFL line)
Weight
[Grams] 260 10
Physical Size
[mm] 203(W) x 142.5(H) x 12(D)
Electrical Interface
6bit RGB / analog RGB
Support Color
Native 262K colors (RGB 6-bit driver)
Temperature Range
Operating
[ ] 0 to +50
Storage(Shipping)
[ ] -20 to +60
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2.2 Functional Block Diagram
The following diagram shows the functional block of the 8.4 inches Color TFT LCD
Module
TTL Digital input
3.3V/12V DC Analog input
Inverter
Connector 1
(Digital)
UD/LR
Connector 3
(Analog)
Digital and analog receiver
A/D converter
Panel time controller
NT 68521
MCU
NT68F33
Connector 2
(Inverter)
Connector4/5
(Lamp)
DC/DC
CONVERTER
Gamma Correction
Generation circuit
Source driver IC
TFT-LCD
800*600
2 CCFL
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3.0 Absolute Maximum Ratings
Absolute maximum ratings of the module is as follows
Item
Symbol Min
Max
Logic/LCD Drive Voltage
VDD
-0.3
+6.0
Input Voltage of Signal
Vin -0.3 VDD+0.3
CCFL Current
ICFL
4
7
CCFL Ignition Voltage
Vs
670
870
Operating Temperature
TOP
0
+50
Operating Humidity
HOP
8
95
Storage Temperature
TST -20
+60
Storage Humidity
HST
5
95
Unit
[Volt]
[Volt]
[mA]rms
Vrms
[]
[%RH]
[]
[%RH]
Conditions
T=25OC
T=0OC
Note1
Note1
Note1
Note1
Note1 Maximum Wet-Bulb should be 39 and no condensation.
Twb=39 C
Operating Range
Storage Range
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4.0 Optical Characteristics
The optical characteristics are measured under stable conditions as follows under 25
condition
Item
Unit
Viewing Angle [degree]
[degree]
K Contrast ratio [degree]
[degree]
White Uniformity
Contrast ratio
Response Time [msec]
(Room Temp) [msec]
Color
Chromaticity
Coordinates(CIE)
White Luminance [cd/m2]
(ICFL 6mA)
Conditions
Horizontal (Right)
K 10 (Left)
Vertical (Upper)
K 10 (Lower)
9 Points
=0
Rising
Falling
Red x
Red y
Green x
Green y
Blue x
Blue y
White x
White y
=0
Min.
400
0.53
0.29
0.27
0.52
0.12
0.09
0.28
0.3
280
Typ.
60
60
60
40
500
10
25
0.56
0.32
0.3
0.55
0.15
0.12
0.31
0.33
350
Max.
1.6
20
30
0.59
0.35
0.33
0.58
0.18
0.15
0.34
0.36
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Note 1: Definition of white uniformity:
White uniformity is calculated with the following formula.
Luminance are measured at the following nine points (1~9).
Maximum Brightness of nine points
W = Minimum Brightness of nine points
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5.0 Signal Interface
5.1 Connectors
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be
following components.
Connector Name
Connector 1
Connector 2
Connector 3
Description
Digital Signal
Lam Control
Analog Signal
Manufacturer
Kyocera Elco
JST
HIROSE
Type / Part Number 04 6274 036 000 800 S6B-ZR-SM3A-TF DF13B-9P-1.25
Mating Connector
Connctor 4/5
Lamp Power
JST
BHR-03VS-1
B-BHS-1-TB
5.2 Signal Pin
5.2.1 Digital Input Signal (Connector 1)
Pin No.
Signal Name
1 GND
3 DE_IN
5 VSYNC_IN
7 RIN0
9 RIN2
11 RIN4
13 GIN0
15 GIN2
17 GIN4
19 BIN0
21 BIN2
23 BIN4
25 GND
27 VDD
29 VDD
31 GND
33 GND
35 VBL
Pin No.
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
Signal Name
DCLK_IN
HSYNC_IN
GND
RIN1
RIN3
RIN5
GIN1
GIN3
GIN5
BIN1
BIN3
BIN5
REV(Note 1)
VDD
DIMMER
GND
VBL
VBL
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Note 1: Selection of scanning mode (please refer to the following table)
Setting of scancontrol input
Input Signal
Scanning direction
REV (No.26 pin)
Lo From up to down, and from left to right
REV (No.26 pin)
Hi From down to up, and from right to left
5.2.2 Analog Input Signal (Connector 3)
Pin No.
Signal Name
1 VGA_HSYNC
3 AGNF
5 RED_GND
7 GREEN
9 BLUE
Pin No.
2
4
6
8
Signal Name
VGA_VSYNC
RED
GREEN_GND
BLUE_GND
5.2.3 Inverter Output Signal (Connector 2)
Pin No.
Signal Name
Pin No.
1 VBL 2
3 VBLCTRL 4
5 GND
Signal Name
GND
DIMMER
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5.3 Signal Description
5.3.1 Digital Input Pin Description (Connector 1)
Signal Name
Description
VSS
REV
VDD
GND
VBL
DIMMER
GND
Trigger of reverse scan function
+3.3V Power Supply
Ground
Inverter Power Supply
Brightness of Backlight Control Signal
Signal Name
Description
RIN0
Red Data 5 (MSB)
RIN1
Red Data 4
RIN2
Red Data 3
RIN3
Red Data 2
RIN4
Red Data 1
RIN5
Red Data 0 (LSB)
Red-pixel Data
GIN0
Green Data 5 (MSB)
GIN1
Green Data 4
GIN2
Green Data 3
GIN3
Green Data 2
GIN4
Green Data 1
GIN5
Green Data 0 (LSB)
Green-pixel Data
BIN0
Blue Data 5 (MSB)
BIN1
Blue Data 4
BIN2
Blue Data 3
BIN3
Blue Data 2
BIN4
Blue Data 1
BIN5
Blue Data 0 (LSB)
Blue-pixel Data
CLK Data Clock
Red-pixel Data
Each red pixel s brightness data consists of 6
bits pixel data.
Green-pixel Data
Each green pixel s brightness data consists of 6
bits pixel data.
Blue-pixel Data
Each blue pixel s brightness data consists of 6
bits pixel data.
The typical frequency is 40MHz. The signal is
used to strobe the pixel data and DE signals.
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All pixel data shall be valid at the falling edge
when the DE signal is high.
DE Display Timing
This signal is strobed at the falling edge of CLK.
When the signal is high, the pixel data shall be
valid to be displayed.
VSYNC Vertical Sync
The signal is synchronized to CLK.
HSYNC Horizontal Sync
The signal is synchronized to CLK.
Note Output signals from any system shall be low or Hi-Z state when VDD is off.
5.3.2 Analog Input Pin Description (Connector 3)
Signal Name
Description
VGA_HSYNC
The signal is synchronized to CLK
VGA_VSYNC
The signal is synchronized to CLK.
RED
Analog R Signal Input
GREEN
Analog G Signal Input
BLUE
Analog B Signal Input
RED_GND
GREEN_GND
A_GND
BLUE_GND
5.3.3 Inverter Control Pin Description (Connector 2)
Signal Name
Description
VBL Inverter power
GND
GND
DIMMER
Brightness of Backlight control signal
VBLCTRL
Inverter Power Control Signal
5.3.4 Lamp Power (Connector 4/5)
Connector: JST BHR-03VS-1, Mating connector: JST SM03(4.0)B-BHS-1-TB
Pin no.
Symbol
Function
Remark
1 H CCFL power supply (H.V.) Cable color: Pink
2 NC
No connection
3
L CCFL power supply(GND.)
Cable color: Black
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5.4 Signal Electrical Characteristics
Input signals shall be low or Hi-Z state when VDD is off.
It is recommended to refer the specifications of SN75LVDS86(Texas Instruments) in
detail.
Signal electrical characteristics are as follows
Item
The differential level
The common mode input
v oltage
The input setup time
Symbol
VID
VIC
tsu
The input hold time
High-level input voltage
Low-level input voltage
Clock frequency
thd
V IAP
V IAM
CLK
Min.
0.1
VID
2
0.5
0.5
2.0
31
Typ.
-
-
-
-
Max.
0.6
2.4
VID
2
-
-
0.8
68
Unit
V
V
Ns
Ns
V
V
MHz
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6.0 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format
12
1st Line R G B R G B
799 800
R GBR GB
600th Line R G B R G B
R GBR GB
6.1 Scanning Direction
Following picture figures shows the image seen from the front view. The arrow
indicate the direction of scan.
Fig. 1 Normal scan (REV=Lo)
Fig. 2 Reverse scan (REV=Hi)
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7.0 Parameter guideline for CCFL inverter
Parameter
White Luminance
CCFL current (ICFL)
CCFL Frequency (FCFL)
CCFL Ignition Voltage (Vs)
CCFL Voltage (Reference)
(VCFL)
CCFL Power consumption
(PCFL)
Lamp Life Time
Min Typ
280 350
46
40 50
TBD
TBD
- 50,000
Max
-
7
80
670
870
-
Units
Cd/m2
mArms
KHz
Vrms
Vrms
Condition
At 6mA ICFL
Note1
Note4
Note 1
Note 3
Note1
W Note2
Hr Note1, 5
Note1 T=25
Note2 Inverter should be designed with the characteristic of lamp. When you are designing the
inverter, the output voltage of the inverter should comply with the following conditions.
(1). The area under the positive and negative cycles of the waveform of the lamp current and lamp
voltage should be area symmetric (the symmetric ratio should be larger than 90%).
(2). There should not be any spikes in the waveform.
(3). The waveform should be sine wave as possible.
(4). Lamp current should not exceed the maximum value within the operating temperature (It is
prohibited to over the maximum lamp current even if operated in the non-guaranteed temperature).
When lamp current is over the maximum value for a long time, it may cause fire. Therefore, it is
recommend that the inverter should have the current limit circuit.
Note3 The inverter open voltage should be designed larger than the lamp starting voltage at
T=0oC, otherwise backlight may be blinking for a moment after turning on or not be able to turn on.
The open voltage should be measured after ballast capacitor. If an inverter has shutdown function
it should keep its open voltage for longer than 1 second even if lamp connector is open.
Note4 Lamp frequency may produce interference with horizontal synchronous frequency and this
may cause line flow on the display. Therefore lamp frequency shall be detached from the
horizontal synchronous frequency and its harmonics as far as possible in order to avoid
interference.
Note5 Brightness (ICFL = 6mA) to drop to 50% of the initial value.
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8.0 Interface Timings
Basically, interface timing should match the VESA 800x600 /60Hz(VG901101)
manufacturing guide line timing. (VGA)
8.1 Timing Characteristics
8.1.1 SVGA MODE
(a) DE mode
Item
Clock frequency
Horizontal blanking
Vertical blanking
(b) HV mode
Symbol
Fck
Thb1
Tvb1
Min.
36
18
3
Item
Symbol Min.
Clock frequency
Fck 36
Hsync period
Th 1018
Hsync pulse width
Thw 2
Hsync front porch
Thf 8
Hsync back porch
Thb 4
Hsync Active
Hsync blanking
Thb1
218
Vsync period
Tv 625
Vsync pulse width
Tvw 1
Vsync front porch
Tvf 0
Vsync blanking
Tvb1
25
Vsync Active
Hsync/Vsync phase shift Tvpd
0
Typ.
40
256
28
Typ.
40
1056
128
40
88
800
256
628
4
1
28
600
320
Max.
50
624
184
Unit
MHz
Clk
Th
Max.
50
1424
-
624
784
184
Unit
MHz
Clk
Clk
Clk
Clk
Clk
Clk
Th
Th
Th
Th
Th
Clk
Remark
Remark
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Item
Symbol Value
Horizontal display start The 218
Unit Description
Clk After falling edge of Hsync, counting 218c lk,
then getting valid data from 219th clk s data.
Vertical display start
Tve 25
Th After falling edge of Vsync, counting 25 th,
then getting 26th Th s data.
8.1.2 VGA MODE
(a)DE mode
Item
Clock frequency
Horizontal blanking
Vertical blanking
Symbol
Fck
Thb1
Tvb1
(b)HV mode
Item
Symbol
Clock frequency
Fck
Hsync period
Th
Hsync pulse width
Thw
Hsync front porch
Thf
Hsync back porch
Thb
Hsync blanking
Thb1
Hsync Active
Vsync period
Tv
Vsync pulse width
Tv w
Vsync front porch
Tvf
Vsync blanking
Tvb1
Vsync active
Hsync/Vsync phase shift Tvpd
Min.
-
-
-
Min.
-
680
-
-
-
-
484
-
-
-
0
Typ.
25.2
160
45
Typ.
25.2
800
96
8
40
160
640
525
2
2
45
480
320
Max.
36
192
77
Unit
MHz
Clk
Th
Max.
36
832
120
56
80
192
557
3
-
77
-
Unit
MHz
Clk
Clk
Clk
Clk
Clk
Clk
Th
Th
Th
Th
Th
Clk
Remark
Remark
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Item
Symbol Value
Horizontal display start The 160
Unit Description
Clk After falling edge of Hsync, counting 218c lk,
then getting valid data from 219th clk s data.
Vertical display start
Tve 45
Th After falling edge of Vsync, counting 25 th,
then getting 26th Th s data.
8.2 Timing Definition
8.2.1 SVGA MODE
H-Sync
40 dot
88 dot
1056 dot
128 dot
DE
800 dot
V-Sync
DE
1H
4H
23H
28H
628H
600H
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8.2.2 VGA MODE
H-Sync
8dot
96dot
DE
40 dot
V-Sync
DE
2H
2H
25H
29H
800dot
640t
525H
480
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9.0 Power Consumption
Input power specifications are as follows
Symbol
Parameter
Min Typ Max Units Condition
VDD
Logic/LCD Drive
3.0 3.3 3.6
V
Voltage
PDD
VDD Power
- 1.98 2.31
W
(SVGA)
IDD IDD Current
- 600 700 mArms Note 1
(SVGA)
Note 2 (Max)
PDD
VDD Power
- 1.88 2.21
W
(VGA)
IDD IDD Current max
- 570 670 mArms Note 1
(VGA)
Note 2 (Max
VRP
Power Ripple Voltage
-
100 -
mVp-p
I RUSH
Inrush Current
- 1500 - mApeak
Note 1: Effective value (mArms) at V CC = 3.3 V/25 .
Note 2:
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2006 All Right Reserved.
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10.0 Power ON/OFF Sequence
VDD power and lamp on/off sequence is as follows. Interface signals are also shown
in the chart. Signals from any system shall be Hi-Z state or low level when VDD is off.
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11.0 Reliability Test Items
Environment test condition
No Test Item
Condition
Remark
1 High temperature storage test
Ta=60 300Hrs
Note 1,2,3
2 Low temperature storage test
Ta= -20 300Hrs
Note 1,2,3
3 High temperature operation test Ta=50 300Hrs
Note 1,2,3
4 Low temperature operation test
Ta=0 300Hrs
Note 1,2,3
5 High temperature & high humid ity 40 , 90%RH, 300Hrs
Note 1,2,3
operation
(No condensation)
6 Thermal Shock Test
-20 /30 min, 60 /30 min 100cycles Note 1,2,3
(non-operation)
7 Vibration test
Vibration level :1.5 G
Note 1,2,3
(non-operation)
Waveform: Sinusoidal vibration
Bandwidth : 10-500-10Hz/2.5min
Duration: X, Y, Z 30min
One time each direction
8 Shock test
Shock level: 50G
Note 1,2,3
(non-operation)
Waveform: Half sine wave, 20ms
Direction: X, Y, Z
One time each direction
9 Electrostatic discharge
150 pF,150 ,10kV,1 second, 9
Note 3
(non-operation)
position on the panel, 10 times each
place
Note 1: Evaluation should be tested after storage at room temperature for one hour.
Note 2: There should be no change which might affect the practical display function when the
display quality test is conducted under normal operating condition.
Note 3: Judgment: Function and display OK.
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2006 All Right Reserved.
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12.0 Packing
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Note:
1. Maximun Capacity: 30 LCD Module Carton
2. Carton outside dimension: 405 (L)mm x 328 (W)mm x 301 (H)mm
3. Maximun 24 of corrugated carton on wooden pallet.
(3 x 2 x 4 layers : maximun 24 boxes per pallet: 720 pcs modules)
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13.Mechanical Characteristics(front)
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14.Mechanical Characteristics(back)
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