X139BLB01 (Iexcellence)
COLOR AMOLED MODULE

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CUSTOMER APPROVAL SHEET
Company Name
MODEL
CUSTOMER
APPROVED
IEX139BLB01.0
Title :
Name :
APPROVAL FOR SPECIFICATIONS ONLY (Spec. Ver. )
APPROVAL FOR SPECIFICATIONS AND ES SAMPLE (Spec. Ver.
APPROVAL FOR SPECIFICATIONS AND CS SAMPLE (Spec. Ver.
CUSTOMER REMARK :
)
)


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Total pages :
24
Date :
2015/01/20
Product Specification
1.39" COLOR AMOLED MODULE
MODEL NAME: X139BLB01
Note: The content of this
specification is subject to
change.
< >Preliminary Specification
< >Final Specification


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Record of Revision
Version Revise Date Page
0.0 Dec. 2, 2014
Content
First Draft
0.0 Jan 20, 2015
Increase IC initial code
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Contents
A. General Specification ..................................................................................................................................4
1. Physical Specifications ..........................................................................................................................4
2. Module Block Diagram ..........................................................................................................................4
3. Panel Scan direction .............................................................................................................................4
B. Electrical Specifications..............................................................................................................................5
1. Main FPC Pin assignment — AMOLED Panel Input/Output Signal Interface.......................................5
2. Absolute maximum ratings ....................................................................................................................6
C. Electrical Characteristics ............................................................................................................................7
1. DC Operating Conditions ......................................................................................................................7
2. Display Current Consumption ...............................................................................................................7
D. AC Characteristics .......................................................................................................................................8
1. MIPI Interface Characteristics ...............................................................................................................8
2. Display RESET Timing Characteristics ...............................................................................................11
3. TE Timing Characteristics ...................................................................................................................12
E. Recommended Operating Sequence .......................................................................................................13
1. Display Power on / off Sequence ........................................................................................................13
Display Initial code ......................................................................................................................................14
F. Brightness Control.....................................................................................................................................15
G. Application Circuit .....................................................................................................................................15
H. Specifications.............................................................................................................................................16
I. Reliability Test Items..................................................................................................................................21
J. Packing .......................................................................................................................................................22
K. Outline Demension (Tentative) .....................................................................................................................23
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A. General Specification
1. Physical Specifications
Item
1 Screen Size (inch)
2 Display Mode
3 Display Resolution (dot)
4 Active Area (mm*mm)
5 Pixel Configuration
6 Display Color (M)
7 Brightness (nits)
8 Interface
9 Outline Dimension (mm*mm*mm)
Description
1.39”
AMOLED
400xRGBx400
35.4 (H)×35.4(V)
Hyper R.G.B
16.7
350
MIPI DSI
38.6 (H) × 40.5(V) × 0.7(T)
2. Module Block Diagram
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Remark
cell+foam
3. Panel Scan direction
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B. Electrical Specifications
1. Main FPC Pin assignment — AMOLED Panel Input/Output Signal Interface
FPCA recommended connector: 504248-2410 (Molex)
Main board recommended connector: 504208-2410 (Molex)
FPC
Pin_name
I/O
Description
1
GND
P Ground
2 XRES I Device reset signal (0 : Enable ; 1: Disable )
3
DSI_D0N
I/O MIPI negative data signal
4
SWIRE
O SWIRE signal for PWR IC control
5
DSI_D0P
I/O MIPI positive data signal
6 NC - Flaoting
7
GND
P Ground
Vsync(vertical sync)signal output from panel to avoid
8 TE I
tearing effect
9
DSI_CLKN
I MIPI negative clock signal
10 GND P Ground
11 DSI_CLKP I MIPI positive clock signal
12 GND P Ground
13 GND P Ground
14 GND P Ground
15 VDDIO P Power supply for Interface system excep MIPI interface
16 VCI P Driver analog power supply
17 GND P Ground
18 GND P Ground
19 ELVSS P AMOLED negative power supply
20 ELVDD P AMOLED positive power supply
21 ELVSS P AMOLED negative power supply
22 ELVDD P AMOLED positive power supply
23 ELVSS P AMOLED negative power supply
24 ELVDD P AMOLED positive power supply
Note: I = input ; O = output ; P = Power ; I/O = input / Output
5


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2. Absolute maximum ratings
Item
Digital Power supply
Analog Power supply
ELVDD power supply
ELVSS power supply
Symbol
VDDIO
VCI
ELVDD
ELVSS
Min.
-0.3
-0.3
-
-5.0
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Max.
5.5
5.5
5.0
-
Unit
V
V
V
V
Remark
Note : If the module exceeds the absolute maximum ratings, it may be damaged permanently. Also,
if the module operates with the absolute maximum ratings for a long time, the reliability may
drop.
6


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C. Electrical Characteristics
1. DC Operating Conditions
Item
Symbol
Digital Power supply
VDDIO
Analog Power supply
VCI
ELVDD power supply
ELVDD
ELVSS power supply
ELVSS
Input Signal
Voltage
H Level
L Level
VIH
VIL
Output Signal
Voltage
H Level
L Level
VOH
VOL
Min.
1.65
2.7
4.55
-2.35
0.8*
VDDIO
0
0.8*
VDDIO
0
Typ.
1.8
2.8
4.60
-2.40
Max.
3.3
3.6
4.65
-2.45
Unit Remark
V Note1
V Note1
V Note1,2
V Note1
-
VDDIO
V
Note1
- 0.2* VDDIO V
-
VDDIO
V Note1
- 0.2* VDDIO V Note1
Note 1: The operation is guaranteed under the recommended operating conditions only. The
operation is not guaranteed if a quick voltage change occurs during the operation. To
prevent the noise, a bypass capacitor must be inserted into the line closed to the power
pin.
≦ ≦Note 2 : RT4723 Positive output voltage = 4.6V ± 0.8% at -40°C Ta +85 °C
2. Display Current Consumption
Item
Symbol
Condition Min. Typ.
Panel Power
PNL
INL
ELVDD:4.6V
ELVSS:-2.4V
--
--
--
--
Normal
IC
Idle
PVCI
IVCI
PVDDIO
IVDDIO
PVCI
IVCI
PVDDIO
IVDDIO
VCI : 2.8V
VDDIO :1.8V
VCI : 2.8V
VDDIO :1.8V
--
--
--
--
--
--
--
--
9.2
3.3
7.9
4.4
3.6
1.3
2.5
1.4
Note 1: Based on L255 (350nits) full white pattern
Note 2: Testing in MIPI-DSI frame rate 60Hz command mode.
Note 3: Testing in MIPI-DSI frame rate 5Hz command mode.
7
Max.
163.8
23.4
--
--
--
--
Unit Remark
mW Note1,2,
mA Note1,2,
mW Note2,
mA Note2,
mW Note2,
mA Note2,
mW Note3,
mA Note3,
mW Note3,
mA Note3,


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D. AC Characteristics
1. MIPI Interface Characteristics
HS Data Transmission Burst
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HS clock transmission
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Turnaround Procedure
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Bus turnaround (BAT) from MPU to display module timing
Timing Parameters
Symbol
TCLK-POST
TCLK-TRAIL
THS-EXIT
TCLK-TERM-EN
TCLK-PREPARE
Description
Min Typ
Time that the transmitter continues to send 60ns + 52*UI
HS clock after the last associated Data Lane
has transitioned to LP Mode. Interval is
defined as the period from the end of THS-
TRAIL to the beginning of TCLK-TRAIL .
Time that the transmitter drives the HS-0
60
state after the last payload clock bit of a HS
transmission burst.
Time that the transmitter drives LP-11
300
following a HS burst.
Time for the Clock Lane receiver to enable Time for Dn to
the HS line termination, starting from the
time point when Dn crosses VIL,MAX .
Time that the transmitter drives the Clock
reach VTERM-
EN
38
9
Max
Unit
ns
ns
ns
38 ns
95 ns


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TCLK-PRE
TCLK-PREPARE
+ TCLK-ZERO
TD-TERM-EN
THS-PREPARE
THS-PREPARE
+ THS-ZERO
THS-TRAIL
TLPX(M)
TTA-SURE(M)
TLPX(D)
TTA-GET(D)
TTA-GO(D)
TTA-SURE(D)
Lane LP-00 Line state immediately before
the HS-0 Line state starting the HS
transmission.
Time that the HS clock shall be driven by the 8
transmitter prior to any associated Data
Lane beginning the transition from LP to HS
mode.
TCLK-PREPARE + time that the transmitter drives 300
the HS-0 state prior to starting the Clock.
Time for the Data Lane receiver to enable Time for Dn to
the HS line termination, starting from the
time point when Dn crosses VIL,MAX .
Reach VTERM-
EN
Time that the transmitter drives the Data
40ns + 4*UI
Lane LP-00 Line state immediately before
the HS-0 Line state starting the HS
transmission
THS-PREPARE + time that the transmitter drives 145ns + 10*UI
the HS-0 state prior to transmitting the Sync
sequence.
Time that the transmitter drives the flipped 60ns + 4*UI
differential state after last payload data bit of
a HS transmission burst
Transmitted length of any Low-Power state 50
period of MCU to display module
Time that the display module waits after the
LP-10 state before transmitting the Bridge
TLPX(M)
state (LP-00) during a Link Turnaround.
Transmitted length of any Low-Power state 50
period of display module to MCU
Time that the display module drives the
Bridge state (LP-00) after accepting control
5*TLPX(D)
during a Link Turnaround.
Time that the display module drives the
Bridge state (LP-00) before releasing control
4*TLPX(D)
during a Link Turnaround.
Time that the MPU waits after the LP-10
state before transmitting the Bridge state
TLPX(D)
(LP-00) during a Link Turnaround.
10
UI
ns
35 ns
+4*UI
85 ns + ns
6*UI
ns
ns
150 ns
2*TLPX(M) ns
150 ns
ns
ns
2*TLPX(D) ns


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2. Display RESET Timing Characteristics
Reset input timing
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IOVDD=1.65 to 1.95V, VDD=2.8 to 3.1V, AGND=DGND=0V, Ta=-40 to 85
Timing Parameters
Symbol
Parameter
tRESW *1) Reset low pulse width
tREST *2) Reset complete time
Related
Pins
RESX
-
-
MIN TYP MAX
Note
Unit
10 -
-
- µs
--
5
When reset applied
during Sleep in mode
ms
When reset applied
- 120
during Sleep out
ms
mode
Note 1. Spike due to an electrostatic discharge on RESX line does not cause irregular system reset
according to the table below.
RESX Pulse
Shorter than 5µs
Longer than 15µs
Between 5µs and
15µs
Action
Reset Rejected
Reset
Reset starts
(It depends on voltage and temperature condition.)
Note 2. During the resetting period, the display will be blanked (The display is entering blanking
sequence, which maximum time is 120 ms, when Reset Starts in Sleep Out –mode. The display
remains the blank state in Sleep In –mode) and then return to Default condition for H/W reset.
Note 3. During Reset Complete Time, data in OTP will be latched to internal register during this period.
This loading is done every time when there is H/W reset complete time (tREST) within 5ms after a
rising edge of RESX.
Note 4. Spike Rejection also applies during a valid reset pulse as shown below:
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Note 5. It is necessary to wait 5msec after releasing RESX before sending commands. Also Sleep Out
command cannot be sent for 120msec.
3. TE Timing Characteristics
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E. Recommended Operating Sequence
1. Display Power on / off Sequence
Power on sequence
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Power off sequence
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Display Initial code
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Recommended Power on Initial Sequence
Step Instruction/Parameters
Delay
time
R/W
MIPI
Data
Type
Address
Data
MIPI Others hex.
1 Turn on VCI
2 Turn on VDDIO
3
Delay
no limit
4 REST pin low
20us
5 REST pin high
6 Delay
5 ms
7 W 0x15 FE FE00 05
8 W 0x15 50 5080 01
9 W 0x15 4F 4F80 09
10 W 0x15 BF BF80 06
11 W 0x15 C0 C080 04
12 W 0x15 C1 C180 60
13 W 0x15 2A 2A80 00
14 W 0x15 05 0580 15
15 W 0x15 FE FE00 07
16 W 0x15 07 07A0 4F
17 W 0x15 FE FE00 00
18 W 0x15 35 3500 00
19 Sleep out
20 Turn on peripheral packet
W 0x05 11 1100 00
0x32
21 Delay 300 ms
22 Display on
W 0x05 29 2900 00
Recommended Power off Mode Sequence
Step Instruction/Parameters
Delay
time
R/W
MIPI
Data
Type
Address
MIPI Others
Data
hex.
1 DIPOFF
W 0x05 28 2800 00
2 SLPIN
W 0x05 10 1000 00
3 delay 120ms
4 Power off
Description
VCI=2.8V
VDDIO=1.8V
Video Turn On
Description
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F. Brightness Control
Instruction/Parameters
DIPOFF
Delay
time
Recommended Brightness Control
R/W
MIPI
Data
Type
Address
MIPI Others
Data
hex.
W 0x05 51 5100 Value
G. Application Circuit
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Description
Value form 0~255(FF)
1. Recommed power IC RT4723, Richtek
2. Recommend power inductor L1
a. [TOKO – DFE252010C (1269AS-H-2R2N=P2)] 2.2uH 2.5mm*2.0mm*1.0mm
b. [Taiyo – MDKK2020T2R2MM] 2.2uH 2.0mm*2.0mm*1.0mm
3. 24pin Connector
FPCA recommended connector: 504248-2410 (Molex)
Main board recommended connector: 504208-2410 (Molex)
15


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H. Specifications
Item
Optical Characteristic
( w/o Cover Lens )
Contrast ratio
Abbr.
Brightness
Wx
Wy
@25deg
Brightness Uniformity
350nits
Viewing angle
CR>1600
Red
Red
Color
Green
Green
Blue
Blue
NTSC
Top
Bottom
Left
Right
CIE1931 x
CIE1931 y
CIE1931 x
CIE1931 y
CIE1931 x
CIE1931 y
CIE x , y
Life time
Crosstalk
T95
L128 CT
25°C
Vertical
Flicker
Optical Switching Time
Gamma
+25°B/W(Tr+Tf)/2
γ
Min.
315
0.28
0.29
10000
85
80°
80°
80°
80°
0.645
0.295
0.186
0.661
0.090
0.025
100
--
--
--
--
1.9
Typ.
350
0.30
0.31
0.675
0.325
0.236
0.711
0.130
0.065
--
100
--
-30
--
2.2
Max.
--
0.32
0.33
--
Unit Remark
nits
Note 3
Note 4
--
--
--
--
--
0.705
0.355
0.286
0.761
0.170
0.105
--
--
deg
deg
deg
deg
Red
Red
Green
Green
Blue
Blue
%
hrs
Note 5
Note 6
Note 7
Note 8
1.1 Note 9
-- db Note 10
1 ms Note 11
2.5
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Note 1: Ambient temperature =25 ºC±2 ºC
Note 2: To be measured in the dark room.
Note 3: The brightness measurement shall be done at the center of the display with a full white image. The
brightness shall meet the following spec, at 100% check.
50cm
|-------------------------------|
90°
Note 4: Definition of contrast ratio:
Contrast ratio is calculated with the following formula:
Contrast ratio (CR)=
Photo detector output when OLED is at “White” state
Photo detector output when OLED is at “Black
Note 5: Uniformity. Refer to figure as below
Bp = Bp (Min.) / Bp (Max.)×100 (%)
Bp (Max.) = Maximum brightness in 5 measured spots
Bp (Min.) = Minimum brightness in 5 measured spots.
17


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Note 6: Definition of viewing angle :
The optical performance is specified as the driver IC located at =270°
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Note 7: The color chromaticity should be based on sample performance because new OLED material should
be verified later.
Note 8: Time to 95% Luminance
To measure the burn-in effect, a test pattern with white background applied to the AMOLED display at
30% loading
Note 9: Cross-talk
There should be no visible cross-talk in normal direction of the display when the two ”Cross-talk Test
Patterns ” below are loaded.
Measurement equipment: CS2000 or similar equipments
The point should be marked is, the background of Cross-talk Test Pattern-“gray “ are defined as middle
gray scale . For example, RGB 24bit “gray” defined as below:
Bpn = Bpn (gray) / Bpn (white)
Which n means the dot No. In the Cross-talk Test Pattern ;
Bpn (gray) means the brightness of the No.n spots in Cross-talk Test Pattern;
Bpn (white) means the brightness of the No.n spots in Full white Test Pattern;
△ △ △Bp (Max.) = Maximum value in Bp1~ Bp4
△ △ △Bp (Min.) = Minimum value in Bp1~ Bp4.
△ △ △CT= Bp (Max.)/ Bp(Min.).
CT must be less than 1.10
18


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Note 10: Flicker
The flicker level is defined using Fast Fourier Transformation (FTT) as follows:
where fFFTC(n) is the nth FFT coefficient, and fFFTC(0) is the 0th FFT coefficient which is DC
component. FS(Hz) is the flicker sensitivity as a function of frequency.
The flicker level shall be measured with the test pattern in below.
The gray leves of test pattern is 128.
19


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Note 11: Optical Switching Time:
The optical switching time measurements should be performed at driven BLACK and driven WHITE
at typ. brightness setting by the driving techniques specified. The luminance should be measured
with the emitting display and the detector at θ=0°and ψ=90°. The rise time tr is the time between a
10% optically response of the display and a 90% optically response of the display. The fall time tf is
the time between a 10% optically response of the display and a 90% optically response to the
display. The response time is defined as the average of the rise time and the fall time.
20


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I. Reliability Test Items
Category No.
Test items
Conditions
Remark
1 High Temp. Operation
2 High Temp. Storage
Reliability
3 Low Temp. Operation
(Environment)
4 Low Temp. Storage
Ta= 60ºC
Ta= 80 ºC
Ta= -20 ºC
Ta= -30 ºC
240 hrs
240 hrs
240 hrs
240 hrs
Reliability
(Environment)
5 High Temp./Humi. Operation Ta= 60 ºC. 90% RH
240 hrs
6 Thermal Shock
-40 ºC ~ 80 ºC, Dwell for 30 min. 100 cycles. Non-operation
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J. Packing
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K. Outline Demension (Tentative)
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