PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers
with LCD Controller and XLP Technology
Extreme Low-Power Features:
• Multiple Power Management Options for Extreme
Power Reduction:
- VBAT allows the device to transition to a backup
battery for the lowest power consumption with
RTCC
- Deep Sleep allows near total power-down with the
ability to wake-up on external triggers
- Sleep and Idle modes selectively shut down
peripherals and/or core for substantial power
reduction and fast wake-up
- Doze mode allows CPU to run at a lower clock
speed than peripherals
• Alternate Clock modes Allow On-the-Fly Switching to
a Lower Clock Speed for Selective Power Reduction
• Extreme Low-Power Current Consumption for
Deep Sleep:
- WDT: 270 nA @ 3.3V typical
- RTCC: 400 nA @ 32 kHz, 3.3V typical
- Deep Sleep current, 40 na, 3.3V typical
Peripheral Features:
• LCD Display Controller:
- Up to 60 segments by 8 commons
- Internal charge pump and low-power, internal
resistor biasing
- Operation in Sleep mode
• Up to Five External Interrupt Sources
• Peripheral Pin Select (PPS): Allows Independent I/O
Mapping of Many Peripherals
• Five 16-Bit Timers/Counters with Prescaler:
- Can be paired as 32-bit timers/counters
• Six-Channel DMA supports All Peripheral modules:
- Minimizes CPU overhead and increases data
throughput
Peripheral Features (Continued):
• Seven Input Capture modules, each with a
Dedicated 16-Bit Timer
• Seven Output Compare/PWM modules, each with a
Dedicated 16-Bit Timer
• Enhanced Parallel Master/Slave Port (EPMP/EPSP)
• Hardware Real-Time Clock/Calendar (RTCC):
- Runs in Deep Sleep and VBAT modes
• Two 3-Wire/4-Wire SPI modules (support 4 Frame
modes) with 8-Level FIFO Buffer
• Two I2C™ modules Support Multi-Master/Slave
mode and 7-Bit/10-Bit Addressing
• Four UART modules:
- Support RS-485, RS-232 and LIN/J2602
- On-chip hardware encoder/decoder for IrDA®
- Auto-wake-up on Auto-Baud Detect
- 4-level deep FIFO buffer
• Programmable 32-Bit Cyclic Redundancy Check
(CRC) Generator
• Digital Signal Modulator Provides On-Chip FSK and
PSK Modulation for a Digital Signal Stream
• Configurable Open-Drain Outputs on Digital I/O Pins
• High-Current Sink/Source (18 mA/18 mA) on All I/O Pins
Analog Features:
• 10/12-Bit, 24-Channel Analog-to-Digital (A/D) Converter:
- Conversion rate of 500 ksps (10-bit), 200 ksps (12-bit)
- Conversion available during Sleep and Idle
• Three Rail-to-Rail Enhanced Analog Comparators
with Programmable Input/Output Configuration
• On-Chip Programmable Voltage Reference
• Charge Time Measurement Unit (CTMU):
- Used for capacitive touch sensing, up to 24 channels
- Time measurement down to 1 ns resolution
- CTMU temperature sensing
Memory
Remappable Peripherals
Device
PIC24FJ128GA310 100 128K 8K 5 7 7 4 2 2 24 3 24 Y 480 Y Y
PIC24FJ128GA308
80 128K 8K 5 7 7 4 2 2 16 3 16 Y 368 Y Y
PIC24FJ128GA306
64 128K 8K 5 7 7 4 2 2 16 3 16 Y 240 Y Y
PIC24FJ64GA310
100 64K 8K 5 7 7 4 2 2 24 3 24 Y 480 Y Y
PIC24FJ64GA308
80 64K 8K 5 7 7 4 2 2 16 3 16 Y 368 Y Y
PIC24FJ64GA306
64 64K 8K 5 7 7 4 2 2 16 3 16 Y 240 Y Y
2010-2014 Microchip Technology Inc.
DS30009996G-page 1


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
High-Performance CPU:
• Modified Harvard Architecture
• Up to 16 MIPS Operation @ 32 MHz
• 8 MHz Internal Oscillator:
- 4x PLL option
- Multiple clock divide options
- Fast start-up
• 17-Bit x 17-Bit Single-Cycle Hardware
Fractional/Integer Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16 x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set Architecture
• Two Address Generation Units for Separate Read
and Write Addressing of Data Memory
Special Microcontroller Features:
• Operating Voltage Range of 2.0V to 3.6V
• Two On-Chip Voltage Regulators (1.8V and 1.2V) for
Regular and Extreme Low-Power Operation
• 20,000 Erase/Write Cycle Endurance Flash Program
Memory, Typical
• Flash Data Retention: 20 Years Minimum
• Self-Programmable under Software Control
• Programmable Reference Clock Output
• In-Circuit Serial Programming™ (ICSP™) and
In-Circuit Emulation (ICE) via 2 Pins
• JTAG Boundary Scan Support
• Fail-Safe Clock Monitor Operation:
- Detects clock failure and switches to on-chip,
low-power RC oscillator
• Power-on Reset (POR), Power-up Timer (PWRT)
and Oscillator Start-up Timer (OST)
• Brown-out Reset (BOR) with Operation Below VBOR
• High/Low-Voltage Detect (HLVD)
• Flexible Watchdog Timer (WDT) with its Own
RC Oscillator for Reliable Operation
• Standard and Ultra Low-Power Watchdog Timers
(ULPW) for Reliable Operation in Standard and
Deep Sleep modes
DS30009996G-page 2
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

Pin Diagrams
64-Pin TQFP, QFN(1)
PIC24FJ128GA310 FAMILY
PMD5/CTED4/LCDBIAS2/CN63/RE5
PMD6/LCDBIAS1/CN64/RE6
PMD7/LCDBIAS0/CN65/RE7
C1IND/RP21/SEG0/PMA5/CN8/RG6
VLCAP1/C1INC/RP26/PMA4/CN9/RG7
VLCAP2/C2IND/RP19/PMA3/CN10/RG8
MCLR
C2INC/RP27/SEG1/PMA2/CN11/RG9
VSS
VDD
PGEC3/AN5/C1INA/RP18/SEG2/CN7/RB5
PGED3/AN4/C1INB/RP28/SEG3/CN6/RB4
AN3/C2INA/SEG4/CN5/RB3
AN2/C2INB/CTCMP/CTED13/RP13/SEG5/CN4/RB2
PGEC1/CVREF-/AN1/RP1/SEG6/CTED12/CN3/RB1
PGED1/CVREF+/AN0/RP0/SEG7/PMA6/CN2/RB0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PIC24FJXXXGA306
48 SOSCO/RPI37/SCKLI/RC14
47 SOSCI/RC13
46 RP11/SEG17/CN49/RD0
45 RP12/C3INC/SEG16/PMA14/CS1/CN56/RD11
44 RP3/SEG15/PMA15/C3IND/CS2/CN55/RD10
43 RP4/SEG14/PMACK2/CN54/RD9
42 RP2/SEG13/RTCC/CN53/RD8
41 VSS
40 OSCO/CLKO/CN22/RC15
39 OSCI/CLKI/CN23/RC12
38 VDD
37 SEG28/CN72/SCL1/RG2
36 SEG47/CN73/SDA1/RG3
35 INT0/CN84/RF6
34 RP30/CN70/RF2
33 RP16/SEG12/CN71/RF3
Legend: RPn and RPIn represent remappable pins for the Peripheral Pin Select feature. Shaded pins indicate pins that are tolerant up to +5.5V.
Note 1: Refer to Table 4-22 for the list of analog ports.
2010-2014 Microchip Technology Inc.
DS30009996G-page 3


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
Pin Diagrams (Continued)
80-Pin TQFP(1)
PMD5/CTED4/LCDBIAS2/CN63/RE5
PMD6/LCDBIAS1/CN64/RE6
PMD7/LCDBIAS0/CN65/RE7
RPI38/SEG32/CN45/RC1
RPI40/SEG33/CN47/RC3
C1IND/RP21/SEG0/PMA5/CN8/RG6
VLCAP1/C1INC/RP26/PMA4/CN9/RG7
VLCAP2/C2IND/RP19/PMA3/CN10/RG8
MCLR
C2INC/RP27/SEG1/PMA2/CN11/RG9
VSS
VDD
TMS/RPI33/SEG34/PMCS1/CN66/RE8
TDO/RPI34/SEG35/PMA19/CN67/RE9
PGEC3/AN5/C1INA/RP18/SEG2/CN7/RB5
PGED3/AN4/C1INB/RP28/SEG3/CN6/RB4
AN3/C2INA/SEG4/CN5/RB3
AN2/C2INB/RP13/CTCMP/SEG5/CTED13/CN4/RB2
PGEC1/CVREF-/AN1/RP1/SEG6/CTED12/CN3/RB1
PGED1/CVREF+/AN0/RP0/SEG7/CN2/RB0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIC24FJXXXGA308
60 RPI37/SOSCO/SCKLI/RC14
59 SOSCI/RC13
58 RP11/SEG17/CN49/RD0
57 RP12/C3INC/SEG16/PMA14/CS1/CN56/RD11
56 RP3/SEG15/C3IND/PMA15/CS2/CN55/RD10
55 RP4/SEG14/PMACK2/CN54/RD9
54 RP2/SEG13/RTCC/CN53/RD8
53 RPI35/SEG43/PMBE1/CN44/RA15
52 RPI36/SEG42/PMA22/CN43/RA14
51 VSS
50 OSCO/CLKO/CN22/RC15
49 OSCI/CLKI/CN23/RC12
48 VDD
47 SEG28/SCL1/CN72/RG2
46 SEG47/SDA1/CN73/RG3
45 INT0/CN84/RF6
44 CN83/RF7
43 RP15/SEG41/CN74/RF8
42 RP30/SEG40/CN70/RF2
41 RP16/SEG12/CN71/RF3
Legend: RPn and RPIn represent remappable pins for the Peripheral Pin Select feature. Shaded pins indicate pins that are tolerant up to +5.5V.
Note 1: Refer to Table 4-22 for the list of analog ports.
DS30009996G-page 4
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

Pin Diagrams (Continued)
100-Pin TQFP(1)
PIC24FJ128GA310 FAMILY
SEG51/CTED3/CN82/RG15
VDD
CTED4/PMD5/LCDBIAS2/CN63/RE5
PMD6/LCDBIAS1/CN64/RE6
PMD7/LCDBIAS0/CN65/RE7
RPI38/SEG32/CN45/RC1
RPI39/SEG52/CN46/RC2
RPI40/SEG33/CN47/RC3
AN16/RPI41/SEG53/PMCS2/CN48/RC4
AN17/C1IND/RP21/SEG0/PMA5/CN8/RG6
VLCAP1/AN18/C1INC/RP26/PMA4/CN9/RG7
VLCAP2/AN19/C2IND/RP19/PMA3/CN10/RG8
MCLR
AN20/C2INC/RP27/SEG1/PMA2/CN11/RG9
VSS
VDD
TMS/CTED0/SEG49/CN33/RA0
RPI33/SEG34/PMCS1/CN66/RE8
AN21/RPI34/SEG35/PMA19/CN67/RE9
PGEC3/AN5/C1INA/RP18/SEG2/CN7/RB5
PGED3/AN4/C1INB/RP28/SEG3/CN6/RB4
AN3/C2INA/SEG4/CN5/RB3
AN2/C2INB/RP13/SEG5/CTED13/CTCMP/CN4/RB2
PGEC1/CVREF-/AN1/RP1/SEG6/CTED12/CN3/RB1
PGED1/CVREF+/AN0/RP0/SEG7/CN2/RB0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
PIC24FJXXXGA310
75 VSS
74 RPI37/SOSCO/SCLKI/RC14
73 SOSCI/RC13
72 RP11/SEG17/CN49/RD0
71 RP12/SEG16/C3INC/PMA14/CS1/CN56/RD11
70 RP3/SEG15/C3IND/PMA15/CS2/CN55/RD10
69 RP4/SEG14/PMACK2/CN54/RD9
68 RP2/SEG13/RTCC/CN53/RD8
67 RPI35/SEG43/PMBE1/CN44/RA15
66 RPI36/SEG42/PMA22/CN43/RA14
65 VSS
64 OSCO/CLKO/CN22/RC15
63 OSCI/CLKI/CN23/RC12
62 VDD
61 TDO/CN38/RA5
60 TDI/PMA21/CN37/RA4
59 SDA2/SEG57/PMA20/CN36/RA3
58 SCL2/SEG56/CN35/RA2
57 SCL1/SEG28/CN72/RG2
56 SDA1/SEG47/CN73/RG3
55 INT0/CN84/RF6
54 CN83/RF7
53 RP15/SEG41/CN74/RF8
52 RP30/SEG40/CN70/RF2
51 RP16/SEG12/CN71/RF3
Legend: RPn and RPIn represent remappable pins for the Peripheral Pin Select feature. Shaded pins indicate pins that are tolerant up to +5.5V.
Note 1: Refer to Table 4-22 for the list of analog ports.
2010-2014 Microchip Technology Inc.
DS30009996G-page 5


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
Pin Diagrams (Continued)
121-Pin BGA (Top View)(1,2)
1 2 34
56
78
9 10 11
A
RE4
RE3 RG13 RE0
RG0
RF1
VBAT
N/C RD12 RD2 RD1
B
N/C RG15 RE2 RE1
RA7
RF0
VCAP/
RD5
RD3
VSS RC14
VDDCORE
C
RE6
VDD RG12 RG14 RA6 N/C RD7 RD4
N/C RC13 RD11
D
RC1
RE7
RE5
N/C
N/C N/C RD6 RD13 RD0 N/C RD10
E
RC4
RC3
RG6 RC2
N/C
RG1
N/C
RA15
RD8
RD9
RA14
F
MCLR RG8
RG9 RG7
VSS
N/C
N/C
VDD OSCI/ VSS OSCO/
RC12
RC15
G
RE8
RE9
RA0
N/C
VDD
VSS
VSS
N/C
RA5
RA3
RA4
H
RB5 RB4 N/C N/C
N/C VDD N/C RF7
RF6 RG2 RA2
J
RB3
RB2
RB7 AVDD
RB11
RA1 RB12
N/C
N/C RF8 RG3
K
RB1
RB0
RA10 RB8
N/C RF12 RB14 VDD RD15 RF3
RF2
L
RB6
RA9
AVSS
RB9
RB10 RF13 RB13 RB15
RD14
RF4
RF5
Legend: Shaded pins indicate pins that are tolerant up to +5.5V.
Note 1: See Table 1 for complete pinout descriptions.
2: Refer to Table 4-22 for the list of analog ports.
DS30009996G-page 6
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1: COMPLETE PIN FUNCTION DESCRIPTIONS FOR 121-PIN DEVICES
Pin Function Pin Function
A1 SEG63/PMD4/HLVDIN/CTED8/CN62/RE4
E1 AN16/RPI41/SEG53/PMCS2/CN48/RC4
A2 COM0/PMD3/CTED9/CN61/RE3
E2 RPI40/SEG33/CN47/RC3
A3 SEG62/CTED10/CN80/RG13
E3 AN17/C1IND/RP21/SEG0/PMA5/CN8/RG6
A4 COM3/PMD0/CN58/RE0
E4 RPI39/SEG52/CN46/RC2
A5 SEG50/PMD8/CN77/RG0
E5 N/C
A6 SEG48/COM4/PMD10/CN69/RF1
E6 SEG46/PMD9/CN78/RG1
A7 VBAT
E7 N/C
A8 N/C
E8 RPI35/SEG43/PMBE1/CN44/RA15
A9 RPI42/SEG44/PMD12/CN57/RD12
E9 RP2/SEG13/RTCC/CN53/RD8
A10 RP23/SEG21/PMACK1/CN51/RD2
E10 RP4/SEG14/PMACK2/CN54/RD9
A11 RP24/SEG20/CN50/RD1
E11 RPI36/SEG42/PMA22/CN43/RA14
B1 N/C
F1 MCLR
B2 SEG51/CTED3/CN82/RG15
F2 VLCAP2/AN19/C2IND/RP19/PMA3/CN10/RG8
B3 COM1/PMD2/CN60/RE2
F3 AN20/C2INC/RP27/SEG1/PMA2/CN11/RG9
B4 COM2/PMD1/CN59/RE1
F4 VLCAP1/AN18/C1INC/RP26/PMA4/CN9/RG7
B5 AN22/SEG59/PMA17/CN40/RA7
F5 VSS
B6 SEG27/PMD11/CN68/RF0
F6 N/C
B7 VCAP
F7 N/C
B8 RP20/SEG24/PMRD/CN14/RD5
F8 VDD
B9 RP22/SEG22/PMBE0/CN52/RD3
F9 OSCI/CLKI/CN23/RC12
B10 VSS
F10 VSS
B11 RPI37/SOSCO/SCLKI/RC14
F11 OSCO/CLKO/CN22/RC15
C1 PMD6/LCDBIAS1/CN64/RE6
G1 RPI33/SEG34/PMCS1/CN66/RE8
C2 VDD
G2 AN21/RPI34/SEG35/PMPA19/CN67/RE9
C3 SEG61/CN79/RG12
G3 TMS/SEG49/CTED0/CN33/RA0
C4 SEG60/PMA16/CTED11/CN81/RG14
G4 N/C
C5 AN23/SEG58/CN39/RA6
G5 VDD
C6 N/C
G6 VSS
C7 C3INA/SEG26/PMD15/CN16/RD7
G7 VSS
C8 RP25/SEG23/PMWR/CN13/RD4
G8 N/C
C9 N/C
G9 TDO/CN38/RA5
C10 SOSCI/RC13
G10 SDA2/SEG57/PMA20/CN36/RA3
C11 RP12/SEG16/C3INC/PMA14/CS1/CN56/RD11
G11 TDI/PMA21/CN37/RA4
D1 RPI38/SEG32/CN45/RC1
H1 PGEC3/AN5/C1INA/RP18/SEG2/CN7/RB5
D2 PMD7/LCDBIAS0/CN65/RE7
H2 PGED3/AN4/C1INB/RP28/SEG3/CN6/RB4
D3 PMD5/CTED4/LCDBIAS2/CN63/RE5
H3 N/C
D4 N/C
H4 N/C
D5 N/C
H5 N/C
D6 N/C
H6 VDD
D7 C3INB/SEG25/PMD14/CN15/RD6
H7 N/C
D8 SEG45/PMD13/CN19/RD13
H8 CN83/RF7
D9 RP11/SEG17/CN49/RD0
H9 INT0/CN84/RF6
D10 N/C
H10 SCL1/SEG28/CN72/RG2
D11 RP3/SEG15/C3IND/PMA15/CS2/CN55/RD10
H11 SCL2/SEG56/CN35/RA2
Legend: RPn and RPIn represent remappable pins for Peripheral Pin Select functions.
2010-2014 Microchip Technology Inc.
DS30009996G-page 7


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1: COMPLETE PIN FUNCTION DESCRIPTIONS FOR 121-PIN DEVICES (CONTINUED)
Pin Function Pin Function
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
K1
K2
K3
K4
K5
K6
Legend:
AN3/C2INA/SEG4/CN5/RB3
K7 AN14/RP14/SEG8/CTPLS/CTED5/PMA1/CN32/RB14
AN2/C2INB/RP13/SEG5/CTCMP/CTED13/CN4/RB2
K8 VDD
PGED2/AN7/RP7/CN25/RB7
K9 RP5/SEG39/CN21/RD15
AVDD
K10 RP16/SEG12/CN71/RF3
AN11/PMA12/CN29/RB11
K11 RP30/SEG40/CN70/RF2
TCK/CN34/RA1
L1 PGEC2/AN6/RP6/LCDBIAS3/CN24/RB6
AN12/SEG18/CTED2/PMA11/CN30/RB12
L2 VREF-/SEG36/PMA7/CN41/RA9
N/C L3 AVSS
N/C L4 AN9/RP9/COM6/SEG30/CN27/RB9
RP15/SEG41/CN74/RF8
L5 CVREF/AN10/COM5/SEG29/PMA13/CN28/RB10
SDA1/SEG47/CN73/RG3
L6 RP31/SEG54/CN76/RF13
PGEC1/CVREF-/AN1/RP1/SEG6/CTED12/CN3/RB1
L7 AN13/SEG19/CTED1/PMA10/CN31/RB13
PGD1/CVREF+/AN0/RP0/SEG7/CN2/RB0
L8 AN15/RP29/SEG9/CTED6/REFO/PMA0/CN12/RB15
VREF+/SEG37/PMA6/CN42/RA10
L9 RPI43/SEG38/CN20/RD14
AN8/RP8/COM7/SEG31/CN26/RB8
L10 RP10/SEG10/PMA9/CN17/RF4
N/C L11 RP17/SEG11/PMA8/CN18/RF5
RPI32/SEG55/CTED7/PMA18/CN75/RF12
RPn and RPIn represent remappable pins for Peripheral Pin Select functions.
DS30009996G-page 8
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
Table of Contents
1.0 Device Overview ........................................................................................................................................................................ 11
2.0 Guidelines for Getting Started with 16-bit Microcontrollers ........................................................................................................ 29
3.0 CPU ........................................................................................................................................................................................... 35
4.0 Memory Organization ................................................................................................................................................................. 41
5.0 Direct Memory Access Controller (DMA) ................................................................................................................................... 75
6.0 Flash Program Memory.............................................................................................................................................................. 83
7.0 Resets ........................................................................................................................................................................................ 89
8.0 Interrupt Controller ..................................................................................................................................................................... 95
9.0 Oscillator Configuration ............................................................................................................................................................ 145
10.0 Power-Saving Features............................................................................................................................................................ 155
11.0 I/O Ports ................................................................................................................................................................................... 167
12.0 Timer1 ...................................................................................................................................................................................... 197
13.0 Timer2/3 and Timer4/5 ............................................................................................................................................................ 199
14.0 Input Capture with Dedicated Timers ....................................................................................................................................... 205
15.0 Output Compare with Dedicated Timers .................................................................................................................................. 211
16.0 Serial Peripheral Interface (SPI)............................................................................................................................................... 221
17.0 Inter-Integrated Circuit™ (I2C™).............................................................................................................................................. 233
18.0 Universal Asynchronous Receiver Transmitter (UART) ........................................................................................................... 241
19.0 Data Signal Modulator.............................................................................................................................................................. 249
20.0 Enhanced Parallel Master Port (EPMP) ................................................................................................................................... 253
21.0 Liquid Crystal Display (LCD) Controller.................................................................................................................................... 265
22.0 Real-Time Clock and Calendar (RTCC) .................................................................................................................................. 275
23.0 32-Bit Programmable Cyclic Redundancy Check (CRC) Generator ........................................................................................ 289
24.0 12-Bit A/D Converter (ADC) with Threshold Scan.................................................................................................................... 295
25.0 Triple Comparator Module........................................................................................................................................................ 315
26.0 Comparator Voltage Reference................................................................................................................................................ 321
27.0 Charge Time Measurement Unit (CTMU) ................................................................................................................................ 323
28.0 High/Low-Voltage Detect (HLVD)............................................................................................................................................. 331
29.0 Special Features ...................................................................................................................................................................... 333
30.0 Development Support............................................................................................................................................................... 347
31.0 Instruction Set Summary .......................................................................................................................................................... 351
32.0 Electrical Characteristics .......................................................................................................................................................... 359
33.0 Packaging Information.............................................................................................................................................................. 389
Appendix A: Revision History............................................................................................................................................................. 407
Index ................................................................................................................................................................................................. 409
The Microchip Web Site ..................................................................................................................................................................... 415
Customer Change Notification Service .............................................................................................................................................. 415
Customer Support .............................................................................................................................................................................. 415
Product Identification System ............................................................................................................................................................ 417
2010-2014 Microchip Technology Inc.
DS30009996G-page 9


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at docerrors@microchip.com. We welcome your feedback.
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current
devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision
of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are
using.
Customer Notification System
Register on our web site at www.microchip.com to receive the most current information on all of our products.
DS30009996G-page 10
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
1.0 DEVICE OVERVIEW
This document contains device-specific information for
the following devices:
• PIC24FJ64GA306
• PIC24FJ64GA308
• PIC24FJ64GA310
• PIC24FJ128GA306
• PIC24FJ128GA308
• PIC24FJ128GA310
The PIC24FJ128GA310 family adds many new features
to Microchip‘s 16-bit microcontrollers, including new
ultra low-power features, Direct Memory Access (DMA)
for peripherals, and a built-in LCD Controller and Driver.
Together, these provide a wide range of powerful
features in one economical and power-saving package.
1.1 Core Features
1.1.1 16-BIT ARCHITECTURE
Central to all PIC24F devices is the 16-bit modified
Harvard architecture, first introduced with Microchip’s
dsPIC® Digital Signal Controllers (DSCs). The PIC24F
CPU core offers a wide range of enhancements, such as:
• 16-bit data and 24-bit address paths with the
ability to move information between data and
memory spaces
• Linear addressing of up to 12 Mbytes (program
space) and 32 Kbytes (data)
• A 16-element Working register array with built-in
software stack support
• A 17 x 17 hardware multiplier with support for
integer math
• Hardware support for 32 by 16-bit division
• An instruction set that supports multiple
addressing modes and is optimized for high-level
languages, such as ‘C’
• Operational performance up to 16 MIPS
1.1.2
XLP POWER-SAVING
TECHNOLOGY
The PIC24FJ128GA310 family of devices introduces a
greatly expanded range of power-saving operating
modes for the ultimate in power conservation. The new
modes include:
• Retention Sleep with essential circuits being
powered from a separate low-voltage regulator
• Deep Sleep without RTCC for the lowest possible
power consumption under software control
• VBAT mode (with or without RTCC) to continue
limited operation from a backup battery when VDD
is removed
Many of these new low-power modes also support the
continuous operation of the low-power, on-chip
Real-Time Clock/Calendar (RTCC), making it possible
for an application to keep time while the device is
otherwise asleep.
Aside from these new features, PIC24FJ128GA310
family devices also include all of the legacy power-saving
features of previous PIC24F microcontrollers, such as:
• On-the-Fly Clock Switching, allowing the selection
of a lower power clock during run time
• Doze Mode Operation, for maintaining peripheral
clock speed while slowing the CPU clock
• Instruction-Based Power-Saving Modes, for quick
invocation of Idle and the many Sleep modes.
1.1.3
OSCILLATOR OPTIONS AND
FEATURES
All of the devices in the PIC24FJ128GA310 family offer
five different oscillator options, allowing users a range
of choices in developing application hardware. These
include:
• Two Crystal modes
• Two External Clock modes
• A Phase Lock Loop (PLL) frequency multiplier,
which allows clock speeds of up to 32 MHz
• A Fast Internal Oscillator (FRC) (nominal 8 MHz
output) with multiple frequency divider options
• A separate Low-Power Internal RC Oscillator
(LPRC) (31 kHz nominal) for low-power,
timing-insensitive applications.
The internal oscillator block also provides a stable
reference source for the Fail-Safe Clock Monitor
(FSCM). This option constantly monitors the main clock
source against a reference signal provided by the inter-
nal oscillator and enables the controller to switch to the
internal oscillator, allowing for continued low-speed
operation or a safe application shutdown.
1.1.4 EASY MIGRATION
Regardless of the memory size, all devices share the
same rich set of peripherals, allowing for a smooth
migration path as applications grow and evolve. The
consistent pinout scheme used throughout the entire
family also aids in migrating from one device to the next
larger, or even in jumping from 64-pin to 100-pin
devices.
The PIC24F family is pin compatible with devices in the
dsPIC33 family, and shares some compatibility with the
pinout schema for PIC18 and dsPIC30. This extends
the ability of applications to grow from the relatively
simple, to the powerful and complex, yet still selecting
a Microchip device.
2010-2014 Microchip Technology Inc.
DS30009996G-page 11


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
1.2 DMA Controller
PIC24FJ128GA310 family devices also introduce a
new Direct Memory Access Controller (DMA) to the
PIC24F architecture. This module acts in concert with
the CPU, allowing data to move between data memory
and peripherals without the intervention of the CPU,
increasing data throughput and decreasing execution
time overhead. Six independently programmable chan-
nels make it possible to service multiple peripherals at
virtually the same time, with each channel peripheral
performing a different operation. Many types of data
transfer operations are supported.
1.3 LCD Controller
With the PIC24FJ128GA310 family of devices,
Microchip introduces its versatile Liquid Crystal Display
(LCD) controller and driver to the PIC24F family. The
on-chip LCD driver includes many features that make
the integration of displays in low-power applications
easier. These include an integrated voltage regulator
with charge pump, and an integrated internal resistor
ladder that allows contrast control in software and
display operation above device VDD.
1.4 Other Special Features
Peripheral Pin Select: The Peripheral Pin Select
(PPS) feature allows most digital peripherals to be
mapped over a fixed set of digital I/O pins. Users
may independently map the input and/or output of
any one of the many digital peripherals to any one
of the I/O pins.
Communications: The PIC24FJ128GA310 family
incorporates a range of serial communication
peripherals to handle a range of application
requirements. There are two independent I2C™
modules that support both Master and Slave
modes of operation. Devices also have, through
the PPS feature, four independent UARTs with
built-in IrDA® encoders/decoders and two SPI
modules.
Analog Features: All members of the
PIC24FJ128GA310 family include the new 12-bit
A/D Converter (ADC) module and a triple compar-
ator module. The ADC module incorporates a
range of new features that allow the converter to
assess and make decisions on incoming data,
reducing CPU overhead for routine ADC conver-
sions. The comparator module includes three
analog comparators that are configurable for a
wide range of operations.
CTMU Interface: In addition to their other analog
features, members of the PIC24FJ128GA310
family include the CTMU interface module. This
provides a convenient method for precision time
measurement and pulse generation, and can
serve as an interface for capacitive sensors.
Enhanced Parallel Master/Parallel Slave Port:
This module allows rapid and transparent access
to the microcontroller data bus, and enables the
CPU to directly address external data memory. The
parallel port can function in Master or Slave mode,
accommodating data widths of 4, 8 or 16 bits, and
address widths up to 23 bits in Master modes.
Real-Time Clock and Calendar (RTCC): This
module implements a full-featured clock and
calendar with alarm functions in hardware, freeing
up timer resources and program memory space
for use of the core application.
Data Signal Modulator (DSM): The Data Signal
Modulator (DSM) allows the user to mix a digital
data stream (the “modulator signal”) with a carrier
signal to produce a modulated output.
1.5 Details on Individual Family
Members
Devices in the PIC24FJ128GA310 family are available
in 64-pin, 80-pin and 100-pin packages. The general
block diagram for all devices is shown in Figure 1-1.
The devices are differentiated from each other in
six ways:
1. Flash program memory (64 Kbytes for
PIC24FJ64GA3XX devices and 128 Kbytes for
PIC24FJ128GA3XX devices).
2. Available I/O pins and ports (53 pins on 6 ports
for 64-pin devices, 69 pins on 7 ports for 80-pin
devices and 85 pins on 7 ports for 100-pin
devices).
3. Available Interrupt-on-Change Notification (ICN)
inputs (52 on 64-pin devices, 66 on 80-pin
devices and 82 on 100-pin devices).
4. Available remappable pins (29 pins on 64-pin
devices, 40 on 80-pin devices and 44 pins on
100-pin devices).
5. Maximum available drivable LCD pixels (272 on
64-pin devices, 368 on 80-pin devices and
480 on 100-pin devices).
6. Analog input channels (16 channels for 64-pin
and 80-pin devices, and 24 channels for 100-pin
devices).
All other features for devices in this family are identical.
These are summarized in Table 1-1, Table 1-2 and
Table 1-3.
A list of the pin features available on the
PIC24FJ128GA310 family devices, sorted by function,
is shown in Table 1-4. Note that this table shows the pin
location of individual peripheral features and not how
they are multiplexed on the same pin. This information is
provided in the pinout diagrams in the beginning of this
data sheet. Multiplexed features are sorted by the priority
given to a feature, with the highest priority peripheral
being listed first.
DS30009996G-page 12
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-1: DEVICE FEATURES FOR THE PIC24FJ128GA310 FAMILY: 64-PIN
Features
PIC24FJ64GA306
PIC24FJ128GA306
Operating Frequency
DC – 32 MHz
Program Memory (bytes)
64K
128K
Program Memory (instructions)
22,016
44,032
Data Memory (bytes)
8K
Interrupt Sources (soft vectors/
NMI traps)
65 (61/4)
I/O Ports
Ports B, C, D, E, F, G
Total I/O Pins
53
Remappable Pins
30 (29 I/Os, 1 input only)
Timers:
Total Number (16-bit)
5(1)
32-Bit (from paired 16-bit timers)
2
Input Capture Channels
7(1)
Output Compare/PWM Channels
7(1)
Input Change Notification Interrupt
52
Serial Communications:
UART
4(1)
SPI (3-wire/4-wire)
I2C™
2(1)
2
Digital Signal Modulator
Yes
Parallel Communications (EPMP/PSP)
Yes
JTAG Boundary Scan
Yes
12/10-Bit Analog-to-Digital Converter
(ADC) Module (input channels)
16
Analog Comparators
3
CTMU Interface
Yes
LCD Controller (available pixels)
240 (30 SEG x 8 COM)
Resets (and Delays)
Core POR, VDD POR, VBAT POR, BOR, RESET Instruction,
MCLR, WDT, Illegal Opcode, REPEAT Instruction,
Hardware Traps, Configuration Word Mismatch
(OST, PLL Lock)
Instruction Set
76 Base Instructions, Multiple Addressing Mode Variations
Packages
64-Pin TQFP and QFN
Note 1: Peripherals are accessible through remappable pins.
2010-2014 Microchip Technology Inc.
DS30009996G-page 13


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-2: DEVICE FEATURES FOR THE PIC24FJ128GA310 FAMILY: 80-PIN
Features
PIC24FJ64GA308
PIC24FJ128GA308
Operating Frequency
DC – 32 MHz
Program Memory (bytes)
64K
128K
Program Memory (instructions)
22,016
44,032
Data Memory (bytes)
8K
Interrupt Sources (soft vectors/
NMI traps)
65 (61/4)
I/O Ports
Ports A, B, C, D, E, F, G
Total I/O Pins
69
Remappable Pins
40 (31 I/Os, 9 input only)
Timers:
Total Number (16-bit)
5(1)
32-Bit (from paired 16-bit timers)
2
Input Capture Channels
7(1)
Output Compare/PWM Channels
7(1)
Input Change Notification Interrupt
66
Serial Communications:
UART
4(1)
SPI (3-wire/4-wire)
I2C™
2(1)
2
Digital Signal Modulator
Yes
Parallel Communications (EPMP/PSP)
Yes
JTAG Boundary Scan
Yes
12/10-Bit Analog-to-Digital Converter
(ADC) Module (input channels)
16
Analog Comparators
3
CTMU Interface
Yes
LCD Controller (available pixels)
368 (46 SEG x 8 COM)
Resets (and Delays)
Core POR, VDD POR, VBAT POR, BOR, RESET Instruction,
MCLR, WDT, Illegal Opcode, REPEAT Instruction,
Hardware Traps, Configuration Word Mismatch
(OST, PLL Lock)
Instruction Set
76 Base Instructions, Multiple Addressing Mode Variations
Packages
80-Pin TQFP and QFN
Note 1: Peripherals are accessible through remappable pins.
DS30009996G-page 14
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-3: DEVICE FEATURES FOR THE PIC24FJ128GA310 FAMILY: 100-PIN DEVICES
Features
PIC24FJ64GA310
PIC24FJ128GA310
Operating Frequency
DC – 32 MHz
Program Memory (bytes)
64K
128K
Program Memory (instructions)
22,016
44,032
Data Memory (bytes)
8K
Interrupt Sources (soft vectors/NMI
traps)
66 (62/4)
I/O Ports
Ports A, B, C, D, E, F, G
Total I/O Pins
85
Remappable Pins
44 (32 I/Os, 12 input only)
Timers:
Total Number (16-bit)
5(1)
32-Bit (from paired 16-bit timers)
2
Input Capture Channels
7(1)
Output Compare/PWM Channels
7(1)
Input Change Notification Interrupt
82
Serial Communications:
UART
4(1)
SPI (3-wire/4-wire)
I2C™
2(1)
2
Digital Signal Modulator
Yes
Parallel Communications
(EPMP/PSP)
Yes
JTAG Boundary Scan
Yes
12/10-Bit Analog-to-Digital Converter
(ADC) Module (input channels)
24
Analog Comparators
3
CTMU Interface
Yes
LCD Controller (available pixels)
480 (60 SEG x 8 COM)
Resets (and delays)
Core POR, VDD POR, VBAT POR, BOR, RESET Instruction,
MCLR, WDT, Illegal Opcode, REPEAT Instruction,
Hardware Traps, Configuration Word Mismatch
(OST, PLL Lock)
Instruction Set
76 Base Instructions, Multiple Addressing Mode Variations
Packages
100-Pin TQFP and 121-Pin BGA
Note 1: Peripherals are accessible through remappable pins.
2010-2014 Microchip Technology Inc.
DS30009996G-page 15


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
FIGURE 1-1:
PIC24FJ128GA310 FAMILY GENERAL BLOCK DIAGRAM
Interrupt
Controller
EDS and
Table Data
Access Control
23
23
8 16
PCH
PCL
Program Counter
Stack
Control
Logic
Repeat
Control
Logic
Data Bus
16
16
Data Latch
Data RAM
Address
Latch
16
Address Latch
Program Memory/
Extended Data
Space
Data Latch
Address Bus
24
Read AGU
Write AGU
EA MUX
Inst Latch
Inst Register
Literal
Data
16
16
DMA
Controller
16 16
Control Signals
OSCO/CLKO
OSCI/CLKI
Timing
Generation
REFO
FRC/LPRC
Oscillators
Precision
Band Gap
Reference
Voltage
Regulators
Instruction
Decode and
Control
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
HLVD &
BOR(2)
Divide
Support
17x17
Multiplier
DMA
Data Bus
16 x 16
W Reg Array
16-Bit ALU
16
VCAP VBAT
VDD, VSS MCLR
PORTA(1)
(12 I/O)
PORTB
(16 I/O)
PORTC(1)
(8 I/O)
16
PORTD(1)
(16 I/O)
PORTE(1)
(10 I/O)
PORTF(1)
(10 I/O)
PORTG(1)
(12 I/O)
Timer1
Timer2/3(3) Timer4/5(3)
RTCC
12-Bit
ADC
Comparators(3)
Digital
Modulator
EPMP/PSP
IC
1-7(3)
OC/PWM
1-7(3)
ICNs(1)
SPI
1/2(3)
I2C™
1/2
UART
1/2/3/4(3)
CTMU
LCD
Driver
Note 1:
2:
3:
Not all I/O pins or features are implemented on all device pinout configurations. See Table 1-4 for specific implementations by pin count.
BOR functionality is provided when the on-board voltage regulator is enabled.
These peripheral I/Os are only accessible through remappable pins.
DS30009996G-page 16
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS
Pin
Function
Pin Number/Grid Locater
64-Pin 80-Pin 100-Pin 121-Pin
TQFP TQFP TQFP BGA
I/O
Input
Buffer
Description
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
AN15
AN16
AN17
AN18
AN19
AN20
AN21
AN22
AN23
AVDD
AVSS
C1INA
C1INB
C1INC
C1IND
C2INA
C2INB
C2INC
C2IND
C3INA
C3INB
C3INC
C3IND
CLKI
CLKO
Legend:
16 20 25
15 19 24
14 18 23
13 17 22
12 16 21
11 15 20
17 21 26
18 22 27
21 27 32
22 28 33
23 29 34
24 30 35
27 33 41
28 34 42
29 35 43
30 36 44
——
9
— — 10
— — 11
— — 12
— — 14
— — 19
— — 92
— — 91
19 25 30
20 26 31
11 15 20
12 16 21
5 7 11
4 6 10
13 17 22
14 18 23
8 10 14
6 8 12
55 69 84
54 68 83
45 57 71
44 56 70
39 49 63
40 50 64
TTL = TTL input buffer
ANA = Analog level input/output
K2 I ANA ADC Analog Inputs.
K1 I ANA
J2 I ANA
J1 I ANA
H2 I ANA
H1 I ANA
L1 I ANA
J3 I ANA
K4 I ANA
L4 I ANA
L5 I ANA
J5 I ANA
J7 I ANA
L7 I ANA
K7 I ANA
L8 I ANA
E1 I ANA
E3 I ANA
F4 I ANA
F2 I ANA
F3 I ANA
G2 I ANA
B5 I ANA
C5 I ANA
J4 P — Positive Supply for Analog modules.
L3 P — Ground Reference for Analog modules.
H1 I ANA Comparator 1 Input A.
H2 I ANA Comparator 1 Input B.
F4 I ANA Comparator 1 Input C.
E3 I ANA Comparator 1 Input D.
J1 I ANA Comparator 2 Input A.
J2 I ANA Comparator 2 Input B.
F3 I ANA Comparator 2 Input C.
F2 I ANA Comparator 2 Input D.
C7 I ANA Comparator 3 Input A.
D7 I ANA Comparator 3 Input B.
C11 I ANA Comparator 3 Input C.
D11 I ANA Comparator 3 Input D.
F9 I ANA Main Clock Input Connection.
F11 O
— System Clock Output.
ST = Schmitt Trigger input buffer
I2C™ = I2C/SMBus input buffer
2010-2014 Microchip Technology Inc.
DS30009996G-page 17


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locater
64-Pin 80-Pin 100-Pin 121-Pin
TQFP TQFP TQFP BGA
I/O
Input
Buffer
Description
CN2
CN3
CN4
CN5
CN6
CN7
CN8
CN9
CN10
CN11
CN12
CN13
CN14
CN15
CN16
CN17
CN18
CN19
CN20
CN21
CN22
CN23
CN24
CN25
CN26
CN27
CN28
CN29
CN30
CN31
CN32
CN33
CN34
CN35
CN36
CN37
CN38
CN39
CN40
CN41
CN42
CN43
Legend:
16 20 25
15 19 24
14 18 23
13 17 22
12 16 21
11 15 20
4 6 10
5 7 11
6 8 12
8 10 14
30 36 44
52 66 81
53 67 82
54 68 83
55 69 84
31 39 49
32 40 50
— 65 80
— 37 47
— 38 48
40 50 64
39 49 63
17 21 26
18 22 27
21 27 32
22 28 33
23 29 34
24 30 35
27 33 41
28 34 42
29 35 43
— — 17
— — 38
— — 58
— — 59
— — 60
— — 61
— — 91
— — 92
— 23 28
— 24 29
— 52 66
TTL = TTL input buffer
ANA = Analog level input/output
K2 I ST Interrupt-on-Change Inputs.
K1 I ST
J2 I ST
J1 I ST
H2 I ST
H1 I ST
E3 I ST
F4 I ST
F2 I ST
F3 I ST
L8 I ST
C8 I ST
B8 I ST
D7 I ST
C7 I ST
L10 I ST
L11 I ST
D8 I ST
L9 I ST
K9 I ST
F11 I ST
F9 I ST
L1 I ST
J3 I ST
K4 I ST
L4 I ST
L5 I ST
J5 I ST
J7 I ST
L7 I ST
K7 I ST
G3 I ST
J6 I ST
H11 I ST
G10 I
ST
G11 I
ST
G9 I ST
C5 I ST
B5 I ST
L2 I ST
K3 I ST
E11 I ST
ST = Schmitt Trigger input buffer
I2C™ = I2C/SMBus input buffer
DS30009996G-page 18
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locater
64-Pin 80-Pin 100-Pin 121-Pin
TQFP TQFP TQFP BGA
I/O
Input
Buffer
Description
CN44
CN45
CN46
CN47
CN48
CN49
CN50
CN51
CN52
CN53
CN54
CN55
CN56
CN57
CN58
CN59
CN60
CN61
CN62
CN63
CN64
CN65
CN66
CN67
CN68
CN69
CN70
CN71
CN72
CN73
CN74
CN75
CN76
CN77
CN78
CN79
CN80
CN81
CN82
CN83
CN84
Legend:
— 53 67
—4
6
——
7
—5
8
——
9
46 58 72
49 61 76
50 62 77
51 63 78
42 54 68
43 55 69
44 56 70
45 57 71
— 64 79
60 76 93
61 77 94
62 78 98
63 79 99
64 80 100
113
224
335
— 13 18
— 14 19
58 72 87
59 73 88
34 42 52
33 41 51
37 47 57
36 46 56
— 43 53
— — 40
— — 39
— 75 90
— 74 89
— — 96
— — 97
— — 95
——
1
— 44 54
35 45 55
TTL = TTL input buffer
ANA = Analog level input/output
E8 I ST Interrupt-on-Change Inputs.
D1 I ST
E4 I ST
E2 I ST
E1 I ST
D9 I ST
A11 I ST
A10 I
ST
B9 I ST
E9 I ST
E10 I
ST
D11 I
ST
C11 I
ST
A9 I ST
A4 I ST
B4 I ST
119 I ST
A2 I ST
A1 I ST
D3 I ST
C1 I ST
D2 I ST
G1 I ST
G2 I ST
B6 I ST
A6 I ST
K11 I ST
K10 I
ST
H10 I
ST
J11 I ST
J10 I ST
K6 I ST
L6 I ST
A5 I ST
E6 I ST
C3 I ST
A3 I ST
C4 I ST
B2 I ST
H8 I ST
H9 I ST
ST = Schmitt Trigger input buffer
I2C™ = I2C/SMBus input buffer
2010-2014 Microchip Technology Inc.
DS30009996G-page 19


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locater
64-Pin 80-Pin 100-Pin 121-Pin
TQFP TQFP TQFP BGA
I/O
Input
Buffer
Description
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
CS1
63 79 99
62 78 98
61 77 94
60 76 93
59 73 88
23 29 34
22 28 33
21 27 32
45 57 71
CS2 44 56 70
CTCMP
CTED0
CTED1
CTED2
CTED3
CTED4
CTED5
CTED6
CTED7
CTED8
CTED9
CTED10
CTED11
CTED12
CTED13
CTPLS
CVREF
CVREF+
CVREF-
INT0
LCDBIAS0
LCDBIAS1
LCDBIAS2
LCDBIAS3
HLVDIN
MCLR
14
28
27
1
29
30
64
63
15
14
29
23
16
15
35
3
2
1
17
64
7
18 23
— 17
34 42
33 41
—1
13
35 43
36 44
— 40
80 100
79 99
— 97
— 95
19 24
18 23
35 43
29 34
20 25
19 24
45 55
35
24
13
21 26
80 100
9 13
OSCI
OSCO
Legend:
39 49 63
40 50 64
TTL = TTL input buffer
ANA = Analog level input/output
A2 O — LCD Driver Common Outputs.
B3 O —
B4 O —
A4 O —
A6 O —
L5 O —
L4 O —
K4 O —
C11 I/O ST/TTL Parallel Master Port Chip Select 1 Strobe (shared
with PMA14).
D11 O
— Parallel Master Port Chip Select 2 Strobe (shared
with PMA15).
J2 I ANA CTMU Comparator 2 Input (Pulse mode).
G3 I DIG CTMU External Edge Inputs.
L7 I DIG
J7 I DIG
B2 I DIG
D3 I DIG
K7 I DIG
L8 I DIG
47 I DIG
A1 I DIG
A2 I DIG
A3 I DIG
C4 I DIG
K1 I DIG
J2 I DIG
K7 O — CTMU Pulse Output.
L5 O — Comparator Voltage Reference Output.
K2 I ANA Comparator/ADC Reference Voltage (high) Input.
K1 I ANA Comparator/ADC Reference Voltage (low) Input.
H9 I ST External Interrupt Input 0.
D2 I ANA Bias Inputs for LCD Driver Charge Pump.
C1 I ANA
D3 I ANA
L1 I ANA
A1 I ANA High/Low-Voltage Detect Input.
F1 I ST Master Clear (device Reset) Input. This line is
brought low to cause a Reset.
F9 I ANA Main Oscillator Input Connection.
F11 O
— Main Oscillator Output Connection.
ST = Schmitt Trigger input buffer
I2C™ = I2C/SMBus input buffer
DS30009996G-page 20
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locater
64-Pin 80-Pin 100-Pin 121-Pin
TQFP TQFP TQFP BGA
I/O
Input
Buffer
Description
PGEC1
15 19 24
PGED1
16 20 25
PGEC2
17 21 26
PGED2
18 22 27
PGEC3
11 15 20
PGED3
12 16 21
PMA0
30 36 44
PMA1
29 35 43
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
PMA10
PMA11
PMA12
PMA13
PMA14
PMA15
PMA16
PMA17
PMA18
PMA19
PMA20
PMA21
PMA22
PMACK1
PMACK2
PMBE0
PMBE1
PMCS1
PMCS2
Legend:
8 10 14
6 8 12
5 7 11
4 6 10
16 24 29
22 23 28
32 40 50
31 39 49
28 34 42
27 33 41
24 30 35
23 29 34
45 57 71
44 56 70
— — 95
— — 92
— — 40
— 14 19
— — 59
— — 60
— 52 66
50 62 77
43 55 69
51 63 78
— 53 67
— 13 18
——
9
TTL = TTL input buffer
ANA = Analog level input/output
K1 I/O ST In-Circuit Debugger/Emulator/ICSP™ Programming
Clock 1.
K2 I/O ST In-Circuit Debugger/Emulator/ICSP Programming
Data 1.
L1 I/O ST In-Circuit Debugger/Emulator/ICSP Programming
Clock 2.
J3 I/O ST In-Circuit Debugger/Emulator/ICSP Programming
Data 2.
H1 I/O ST In-Circuit Debugger/Emulator/ICSP Programming
Clock 3.
H2 I/O ST In-Circuit Debugger/Emulator/ICSP Programming
Data 3.
L8 I/O ST Parallel Master Port Address Bit 0 Input (Buffered
Slave modes) and Output (Master modes).
K7 I/O ST Parallel Master Port Address Bit 1 Input (Buffered
Slave modes) and Output (Master modes).
F3 O — Parallel Master Port Address (bits<22:2>).
F2 O —
F4 O —
E3 O —
K3 O —
L2 O —
L11 O
L10 O
L7 O —
J7 O —
J5 O —
L5 O —
C11 O
D11 O
C4 O —
B5 O —
K6 O —
G2 O —
G10 O
G11 O
E11 O
A10 I ST/TTL Parallel Master Port Acknowledge Input 1.
E10 I ST/TTL Parallel Master Port Acknowledge Input 2.
B9 O — Parallel Master Port Byte Enable 0 Strobe.
E8 O — Parallel Master Port Byte Enable 1 Strobe.
G1 I/O ST/TTL Parallel Master Port Chip Select 1 Strobe.
E1 O — Parallel Master Port Chip Select 2 Strobe.
ST = Schmitt Trigger input buffer
I2C™ = I2C/SMBus input buffer
2010-2014 Microchip Technology Inc.
DS30009996G-page 21


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locater
64-Pin 80-Pin 100-Pin 121-Pin
TQFP TQFP TQFP BGA
I/O
Input
Buffer
Description
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
PMD7
PMD8
PMD9
PMD10
PMD11
PMD12
PMD13
PMD14
PMD15
PMRD
PMWR
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RA7
RA9
RA10
RA14
RA15
Legend:
60 76 93
61 77 94
62 78 98
63 79 99
64 80 100
113
224
335
— 75 90
— 74 89
— 73 88
— 72 87
— 64 79
— 65 80
— 68 83
— 69 84
53 67 82
52 66 81
— — 17
— — 38
— — 58
— — 59
— — 60
— — 61
— — 91
— — 92
— 23 28
— 24 29
— 52 66
— 53 67
TTL = TTL input buffer
ANA = Analog level input/output
A4 I/O ST/TTL Parallel Master Port Data (Demultiplexed Master
B4 I/O ST/TTL mode) or Address/Data (Multiplexed Master modes).
B3 I/O ST/TTL
A2 I/O ST/TTL
A1 I/O ST/TTL
D3 I/O ST/TTL
C1 I/O ST/TTL
D2 I/O ST/TTL
A5 I/O ST/TTL
E6 I/O ST/TTL
A6 I/O ST/TTL
B6 I/O ST/TTL
A9 I/O ST/TTL
D8 I/O ST/TTL
D7 I/O ST/TTL
C7 I/O ST/TTL
B8 O — Parallel Master Port Read Strobe.
C8 O — Parallel Master Port Write Strobe.
G3 I/O ST PORTA Digital I/O.
J6 I/O ST
H11 I/O ST
G10 I/O
ST
G11 I/O
ST
G9 I/O ST
C5 I/O ST
B5 I/O ST
L2 I/O ST
K3 I/O ST
E11 I/O ST
E8 I/O ST
ST = Schmitt Trigger input buffer
I2C™ = I2C/SMBus input buffer
DS30009996G-page 22
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locater
64-Pin 80-Pin 100-Pin 121-Pin
TQFP TQFP TQFP BGA
I/O
Input
Buffer
Description
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
RB8
RB9
RB10
RB11
RB12
RB13
RB14
RB15
RC1
RC2
RC3
RC4
RC12
RC13
RC14
RC15
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
RD8
RD9
RD10
RD11
RD12
RD13
RD14
RD15
Legend:
16 20 25
15 19 24
14 18 23
13 17 22
12 16 21
11 15 20
17 21 26
18 22 27
21 27 32
22 28 33
23 29 34
24 30 35
27 33 41
28 34 42
29 35 43
30 36 44
—4
6
——
7
—5
8
——
9
39 49 63
47 59 73
48 60 74
40 50 64
46 58 72
49 61 76
50 62 77
51 63 78
52 66 81
53 67 82
54 68 83
55 69 84
42 54 68
43 55 69
44 56 70
45 57 71
— 64 79
— 65 80
— 37 47
— 38 48
TTL = TTL input buffer
ANA = Analog level input/output
K2 I/O ST PORTB Digital I/O.
K1 I/O ST
J2 I/O ST
J1 I/O ST
H2 I/O ST
H1 I/O ST
L1 I/O ST
J3 I/O ST
K4 I/O ST
L4 I/O ST
L5 I/O ST
J5 I/O ST
J7 I/O ST
L7 I/O ST
K7 I/O ST
L8 I/O ST
D1 I/O ST PORTC Digital I/O.
E4 I/O ST
E2 I/O ST
E1 I/O ST
F9 I/O ST
C10 I
ST
B11 I ST
F11 I/O ST
D9 I/O ST PORTD Digital I/O.
A11 I/O ST
A10 I/O ST
B9 I/O ST
C8 I/O ST
B8 I/O ST
D7 I/O ST
C7 I/O ST
E9 I/O ST
E10 I/O ST
D11 I/O ST
C11 I/O ST
A9 I/O ST
D8 I/O ST
L9 I/O ST
K9 I/O ST
ST = Schmitt Trigger input buffer
I2C™ = I2C/SMBus input buffer
2010-2014 Microchip Technology Inc.
DS30009996G-page 23


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locater
64-Pin 80-Pin 100-Pin 121-Pin
TQFP TQFP TQFP BGA
I/O
Input
Buffer
Description
RE0
RE1
RE2
RE3
RE4
RE5
RE6
RE7
RE8
RE9
REFO
RF0
RF1
RF2
RF3
RF4
RF5
RF6
RF7
RF8
RF12
RF13
RG0
RG1
RG2
RG3
RG6
RG7
RG8
RG9
RG12
RG13
RG14
RG15
Legend:
60 76 93
61 77 94
62 78 98
63 79 99
64 80 100
113
224
335
— 13 18
— 14 19
30 36 44
58 72 87
59 73 88
34 42 52
33 41 51
31 39 49
32 40 50
35 45 55
— 44 54
— 43 53
— — 40
— — 39
— 75 90
— 74 89
37 47 57
36 46 56
4 6 10
5 7 11
6 8 12
8 10 14
— — 96
— — 97
— — 95
——
1
TTL = TTL input buffer
ANA = Analog level input/output
A4 I/O ST PORTE Digital I/O.
B4 I/O ST
B3 I/O ST
A2 I/O ST
A1 I/O ST
D3 I/O ST
C1 I/O ST
D2 I/O ST
G1 I/O ST
G2 I/O ST
L8 O — Reference Clock Output.
B6 I/O ST PORTF Digital I/O.
A6 I/O ST
K11 I/O ST
K10 I/O ST
L10 I/O ST
L11 I/O ST
H9 I/O ST
H8 I/O ST
J10 I/O ST
K6 I/O ST
L6 I/O ST
A5 I/O ST PORTG Digital I/O.
E6 I/O ST
H10 I/O
ST
J11 I/O ST
E3 I/O ST
F4 I/O ST
F2 I/O ST
F3 I/O ST
C3 I/O ST
A3 I/O ST
C4 I/O ST
B2 I/O ST
ST = Schmitt Trigger input buffer
I2C™ = I2C/SMBus input buffer
DS30009996G-page 24
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locater
64-Pin 80-Pin 100-Pin 121-Pin
TQFP TQFP TQFP BGA
I/O
Input
Buffer
Description
RP0
RP1
RP2
RP3
RP4
RP5
RP6
RP7
RP8
RP9
RP10
RP11
RP12
RP13
RP14
RP15
RP16
RP17
RP18
RP19
RP20
RP21
RP22
RP23
RP24
RP25
RP26
RP27
RP28
RP29
RP30
RP31
RPI32
RPI33
RPI34
RPI35
RPI36
RPI37
RPI38
RPI39
RPI40
RPI41
RPI42
RPI43
Legend:
16 20 25
15 19 24
42 54 68
44 56 70
43 55 69
— 38 48
17 21 26
18 22 27
21 27 32
22 28 33
31 39 49
46 58 72
45 57 71
14 18 23
29 35 43
— 43 53
33 41 51
32 40 50
11 15 20
6 8 12
53 67 82
4 6 10
51 63 78
50 62 77
49 61 76
52 66 81
5 7 11
8 10 14
12 16 21
30 36 44
34 42 52
— — 39
— — 40
— 13 18
— 14 19
— 53 67
— 52 66
48 60 74
—4
6
——
7
—5
8
——
9
— 64 79
— 37 47
TTL = TTL input buffer
ANA = Analog level input/output
K2 I/O ST Remappable Peripheral (input or output).
K1 I/O ST
E9 I/O ST
D11 I/O ST
E10 I/O ST
K9 I/O ST
L1 I/O ST
J3 I/O ST
K4 I/O ST
L4 I/O ST
L10 I/O ST
D9 I/O ST
C11 I/O ST
J2 I/O ST
K7 I/O ST
J10 I/O ST
K10 I/O ST
L11 I/O ST
H1 I/O ST
F2 I/O ST
B8 I/O ST
E3 I/O ST
B9 I/O ST
A10 I/O ST
A11 I/O ST
C8 I/O ST
F4 I/O ST
F3 I/O ST
H2 I/O ST
L8 I/O ST
K11 I/O ST
L6 I/O ST
K6 I ST Remappable Peripheral (input only).
G1 I ST
G2 I ST
E8 I ST
E11 I ST
B11 I ST
D1 I ST
E4 I ST
E2 I ST
E1 I ST
A9 I ST
L9 I ST
ST = Schmitt Trigger input buffer
I2C™ = I2C/SMBus input buffer
2010-2014 Microchip Technology Inc.
DS30009996G-page 25


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locater
64-Pin 80-Pin 100-Pin 121-Pin
TQFP TQFP TQFP BGA
I/O
Input
Buffer
Description
RTCC
42 54 68
SCL1
SCL2
SCLKI
SDA1
SDA2
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
Legend:
37 47 57
32 40 58
48 60 74
36 46 56
31 39 59
4 6 10
8 10 14
11 15 20
12 16 21
13 17 22
14 18 23
15 19 24
16 20 25
29 35 43
30 36 44
31 39 49
32 40 50
33 41 51
42 54 68
43 55 69
44 56 70
45 57 71
46 58 72
27 33 41
28 34 42
49 61 76
50 62 77
51 63 78
52 66 81
53 67 82
54 68 83
55 69 84
58 72 87
37 47 57
23 29 34
22 28 33
21 27 32
—4
6
—5
8
— 13 18
TTL = TTL input buffer
ANA = Analog level input/output
E9 O — Real-Time Clock/Calendar Alarm/Seconds Pulse
Output.
H10 I/O I2C I2C1 Synchronous Serial Clock Input/Output.
H11 I/O I2C I2C2 Synchronous Serial Clock Input/Output.
B11 I ST Digital Secondary Clock Input.
J11 I/O I2C I2C1 Data Input/Output.
G10 I/O I2C I2C2 Data Input/Output.
E3 O — LCD Driver Segment Outputs.
F3 O —
H1 O —
H2 O —
J1 O —
J2 O —
K1 O —
K2 O —
K7 O —
L8 O —
L10 O
L11 O
K10 O
E9 O —
E10 O
D11 O
C11 O
D9 O —
J7 O —
L7 O —
A11 O
A10 O
B9 O —
C8 O —
B8 O —
D7 O —
C7 O —
B6 O —
H10 O
L5 O —
L4 O —
K4 O —
D1 O —
E2 O —
G1 O —
ST = Schmitt Trigger input buffer
I2C™ = I2C/SMBus input buffer
DS30009996G-page 26
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locater
64-Pin 80-Pin 100-Pin 121-Pin
TQFP TQFP TQFP BGA
I/O
Input
Buffer
Description
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SOSCI
SOSCO
TCK
TDI
TDO
TMS
Legend:
— 14 19
— 23 28
— 24 29
— 37 47
— 38 48
— 42 52
— 43 53
— 52 66
— 53 67
— 64 79
— 65 80
— 74 89
36 46 56
59 73 88
— — 17
— 75 90
——
1
——
7
——
9
— — 39
— — 40
— — 58
— — 59
— — 91
— — 92
— — 95
— — 96
— — 97
— — 100
47 59 73
48 60 74
27 33 38
28 34 60
24 14 61
23 13 17
TTL = TTL input buffer
ANA = Analog level input/output
G2 O — LCD Driver Segment Outputs.
L2 O —
K3 O —
L9 O —
K9 O —
K11 O
J10 O
E11 O
E8 O —
A9 O —
D8 O —
E6 O —
J11 O
A6 O —
G3 O —
A5 O —
B2 O —
E4 O —
E1 O —
L6 O —
K6 O —
H11 O
G10 O
C5 O —
B5 O —
C4 O —
C3 O —
A3 O —
A1 O —
C10 I ANA Secondary Oscillator/Timer1 Clock Input.
B11 O ANA Secondary Oscillator/Timer1 Clock Output.
J6 I ST JTAG Test Clock/Programming Clock Input.
G11 I
ST JTAG Test Data/Programming Data Input.
G9 O — JTAG Test Data Output.
G3 I ST JTAG Test Mode Select Input.
ST = Schmitt Trigger input buffer
I2C™ = I2C/SMBus input buffer
2010-2014 Microchip Technology Inc.
DS30009996G-page 27


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locater
64-Pin 80-Pin 100-Pin 121-Pin
TQFP TQFP TQFP BGA
I/O
Input
Buffer
Description
VBAT
VCAP
VDD
VLCAP1
VLCAP2
VREF+
VREF-
Vss
Legend:
57 71 86
56 70 85
10, 26,
38
5
6
12, 32,
48
7
8
24
2, 16,
37, 46,
62
11
12
29
— 23 28
9, 25, 41 11, 31,
51
15, 36,
45, 65,
75
TTL = TTL input buffer
ANA = Analog level input/output
A7 P — Backup Battery.
B7 P — External Filter Capacitor Connection (regulator
enabled).
C2, F8,
G5, H6,
K8
P
— Positive Supply for Peripheral Digital Logic and I/O
Pins.
F4 I ANA LCD Drive Charge Pump Capacitor Inputs.
F2 I ANA
K3 I ANA Comparator/ADC Reference Voltage (low) Input
(default).
L2 I ANA Comparator/ADC Reference Voltage (high) Input
(default).
B10, F5,
F10, G6,
G7
P
— Ground Reference for Logic and I/O Pins.
ST = Schmitt Trigger input buffer
I2C™ = I2C/SMBus input buffer
DS30009996G-page 28
2010-2014 Microchip Technology Inc.


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
2.0 GUIDELINES FOR GETTING
STARTED WITH 16-BIT
MICROCONTROLLERS
2.1 Basic Connection Requirements
Getting started with the PIC24FJ128GA310 family
family of 16-bit microcontrollers requires attention to a
minimal set of device pin connections before
proceeding with development.
The following pins must always be connected:
• All VDD and VSS pins
(see Section 2.2 “Power Supply Pins”)
• All AVDD and AVSS pins, regardless of whether or
not the analog device features are used
(see Section 2.2 “Power Supply Pins”)
• MCLR pin
(see Section 2.3 “Master Clear (MCLR) Pin”)
• VCAP pin
(see Section 2.4 “Voltage Regulator Pin (VCAP)”)
These pins must also be connected if they are being
used in the end application:
• PGECx/PGEDx pins used for In-Circuit Serial
Programming™ (ICSP™) and debugging purposes
(see Section 2.5 “ICSP Pins”)
• OSCI and OSCO pins when an external oscillator
source is used
(see Section 2.6 “External Oscillator Pins”)
Additionally, the following pins may be required:
• VREF+/VREF- pins used when external voltage
reference for analog modules is implemented
Note:
The AVDD and AVSS pins must always be
connected, regardless of whether any of
the analog modules are being used.
The minimum mandatory connections are shown in
Figure 2-1.
FIGURE 2-1:
RECOMMENDED
MINIMUM CONNECTIONS
VDD
C2(2)
R1
R2
C1
C6(2)
MCLR
VSS
VDD
PIC24FJXXX
VCAP
VDD
VSS
C7(1)
C3(2)
C5(2)
C4(2)
Key (all values are recommendations):
C1 through C6: 0.1 F, 20V ceramic
C7: 10 F, 6.3V or greater, tantalum or ceramic
R1: 10 k
R2: 100to 470
Note 1:
2:
See Section 2.4 “Voltage Regulator Pin
(VCAP)” for details on selecting the proper
capacitor for Vcap.
The example shown is for a PIC24F device
with five VDD/VSS and AVDD/AVSS pairs.
Other devices may have more or less pairs;
adjust the number of decoupling capacitors
appropriately.
2010-2014 Microchip Technology Inc.
DS30009996G-page 29


PIC24FJ64GA308 (Microchip)
16-Bit Flash Microcontrollers

No Preview Available !

Click to Download PDF File for PC

PIC24FJ128GA310 FAMILY
2.2 Power Supply Pins
2.2.1 DECOUPLING CAPACITORS
The use of decoupling capacitors on every pair of
power supply pins, such as VDD, VSS, AVDD and
AVSS, is required.
Consider the following criteria when using decoupling
capacitors:
Value and type of capacitor: A 0.1 F (100 nF),
10-20V capacitor is recommended. The capacitor
should be a low-ESR device with a resonance
frequency in the range of 200 MHz and higher.
Ceramic capacitors are recommended.
Placement on the printed circuit board: The
decoupling capacitors should be placed as close
to the pins as possible. It is recommended to
place the capacitors on the same side of the
board as the device. If space is constricted, the
capacitor can be placed on another layer on the
PCB using a via; however, ensure that the trace
length from the pin to the capacitor is no greater
than 0.25 inch (6 mm).
Handling high-frequency noise: If the board is
experiencing high-frequency noise (upward of
tens of MHz), add a second ceramic type capaci-
tor in parallel to the above described decoupling
capacitor. The value of the second capacitor can
be in the range of 0.01 F to 0.001 F. Place this
second capacitor next to each primary decoupling
capacitor. In high-speed circuit designs, consider
implementing a decade pair of capacitances as
close to the power and ground pins as possible
(e.g., 0.1 F in parallel with 0.001 F).
Maximizing performance: On the board layout
from the power supply circuit, run the power and
return traces to the decoupling capacitors first,
and then to the device pins. This ensures that the
decoupling capacitors are first in the power chain.
Equally important is to keep the trace length
between the capacitor and the power pins to a
minimum, thereby reducing PCB trace
inductance.
2.2.2 TANK CAPACITORS
On boards with power traces running longer than six
inches in length, it is suggested to use a tank capacitor
for integrated circuits including microcontrollers to
supply a local power source. The value of the tank
capacitor should be determined based on the trace
resistance that connects the power supply source to
the device, and the maximum current drawn by the
device in the application. In other words, select the tank
capacitor so that it meets the acceptable voltage sag at
the device. Typical values range from 4.7 F to 47 F.
2.3 Master Clear (MCLR) Pin
The MCLR pin provides two specific device
functions: device Reset, and device programming
and debugging. If programming and debugging are
not required in the end application, a direct
connection to VDD may be all that is required. The
addition of other components, to help increase the
application’s resistance to spurious Resets from
voltage sags, may be beneficial. A typical
configuration is shown in Figure 2-1. Other circuit
designs may be implemented, depending on the
application’s requirements.
During programming and debugging, the resistance
and capacitance that can be added to the pin must
be considered. Device programmers and debuggers
drive the MCLR pin. Consequently, specific voltage
levels (VIH and VIL) and fast signal transitions must
not be adversely affected. Therefore, specific values
of R1 and C1 will need to be adjusted based on the
application and PCB requirements. For example, it is
recommended that the capacitor, C1, be isolated
from the MCLR pin during programming and
debugging operations by using a jumper (Figure 2-2).
The jumper is replaced for normal run-time
operations.
Any components associated with the MCLR pin
should be placed within 0.25 inch (6 mm) of the pin.
FIGURE 2-2:
VDD
EXAMPLE OF MCLR PIN
CONNECTIONS
R1
R2
MCLR
JP PIC24FJXXX
C1
Note 1:
2:
R1 10 kis recommended. A suggested
starting value is 10 k. Ensure that the
MCLR pin VIH and VIL specifications are met.
R2 470will limit any current flowing into
MCLR from the external capacitor, C, in the
event of MCLR pin breakdown, due to
Electrostatic Discharge (ESD) or Electrical
Overstress (EOS). Ensure that the MCLR
pin VIH and VIL specifications are met.
DS30009996G-page 30
2010-2014 Microchip Technology Inc.




PIC24FJ64GA308.pdf
Click to Download PDF File