CM3106-12SM (ON Semiconductor)
2 Amp Source / Sink Bus Termination Regulator

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CM3106
2 Amp Source/ Sink Bus
Termination Regulator
Product Description
The CM3106 is a sinking and sourcing regulator specifically
designed for providing power to DDR memory terminating resistors
and companion chip set VTT power. The output voltage accurately
tracks VDDQ/2. The CM3106 can source and sink current up to 2 A,
ideal for DDRI memory systems, and 1.2 A for DDRII systems,
while maintaining a load regulation of 0.5% in either application.
The CM3106 provides over current and over temperature protection
which protects the device from excessive heating due to high current
and high temperature. A shutdown capability using an external
transistor reduces power consumption and provides a high impedance
output.
The CM3106 is housed in an 8lead SOIC RoHScompliant
package.
Features
Ideal for DDRI and DDRII VTT Applications
Sinks and Sources 2.0A for DDRI
Over Current Protection
Over Temperature Protection
Integrated Power MOSFETs
Excellent Accuracy (0.5% Load Regulation)
Pin and Functionally Compatible with LP2995
8Lead SOIC Package
These Devices are PbFree and are RoHS Compliant
Applications
Single and Dual Channel DDR Memory Bus Termination
Active Termination Buses
Graphics Card Memory Termination
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8
1
SOIC8
SM SUFFIX
CASE 751
MARKING DIAGRAM
8
XXXXXX
AYWW
G
1
XXXXXX = CM310612SM
A = Assembly Location
Y = Year
WW = Work Week
G = PbFree Package
ORDERING INFORMATION
Device
Package
Shipping
CM310612SM SOIC8 2500/Tape & Reel
(PbFree)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2011
April, 2011 Rev. 3
1
Publication Order Number:
CM3106/D


CM3106-12SM (ON Semiconductor)
2 Amp Source / Sink Bus Termination Regulator

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CM3106
SIMPLIFIED ELECTRICAL SCHEMATIC
AVIN
VDDQ
PVIN
Over Temp
Over Current
Reference
VREF
OUT IN
Buffer
Driver
VTT
VSENSE
Table 1. PIN DESCRIPTIONS
Lead(s) Name
Description
1 NC No Connect
2
GND
Ground
3 VSENSE Feedback
4
VREF
Reference Output, VDDQ/2
5
VDDQ
VDDQ Input
6
AVIN
Analog Input
7
PVIN
Power Input
8 VTT Output
GND
PACKAGE / PINOUT DIAGRAM
Top View
NC
GND
VSENSE
VREF
1
2
3
4
8 VTT
7 PVIN
6 AVIN
5 VDDQ
8Lead SOIC
SPECIFICATIONS
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Rating
Units
AVIN Operating Supply Voltage
VDDQ Input Voltage
Pin Voltages
VTT Output
Any other pins
7V
7V
V
7
7
ESD (HBM)
±2000
V
Storage Temperature Range
40 to +150
°C
Operating Temperature Range
Ambient
Junction
40 to +85 (Note 1)
40 to +150
°C
Power Dissipation (Note 1)
Internally Limited
W
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. These devices must be derated based on thermal resistance at elevated temperatures. The device packaged in an 8lead SOIC leadframe
must be derated at qJA = 151°C/W. qJA of the 8lead PSOP is 40°C/W.
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CM3106-12SM (ON Semiconductor)
2 Amp Source / Sink Bus Termination Regulator

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CM3106
Table 3. STANDARD OPERATING CONDITIONS
Parameter
VDDQ
AVIN
PVIN
Ambient Operating Temperature
CTT
Rating
2.5
2.5
2.5
0 to +70
220 ±20%
Units
V
V
V
°C
mF
Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
Symbol
Parameter
Conditions
VIN Input Voltage Range
VDDQ
AVIN
ICC AVIN Quiescent Current
IVTT = 0 A
VRLOAD Load Regulation
0 A IVTT 2.0 A or 2.0 A IVTT 0 A
VREF
Output Reference Voltage
VDDQ = 2.5 V, IREF = 0 A
VOSVTT Output Offset from VREF
ZREF
VREF Output Impedance
5 mA IREF 5 mA
ZVDDQ
VDDQ Input Impedance
ILIM VTT Current Limit
TDISABLE
THYST
Shutdown Temperature
Thermal Hysteresis
1. Operating Characteristics are over Standard Operating Conditions unless otherwise specified.
Min Typ Max Units
2.2 2.5 AVIN
2.2 2.5 5.5
V
450 mA
6.25 mV
1.225 1.25 1.275
V
20 20 mV
5 kW
100 kW
2.5 A
150 °C
50 °C
PERFORMANCE INFORMATION
Typical DC Characteristics (nominal conditions unless otherwise specified)
Figure 1. Output Voltage with
AVIN Supply (VDDQ = 2.5 V)
Figure 2. Load Regulation (Sink)
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CM3106-12SM (ON Semiconductor)
2 Amp Source / Sink Bus Termination Regulator

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CM3106
PERFORMANCE INFORMATION (Cont’d)
Typical DC Characteristics (nominal conditions unless otherwise specified)
Figure 3. Reference Voltage with
AVIN Supply (VDDQ = 2.5 V)
Figure 4. Load Regulation (Source)
Figure 5. Over Current Limit (Sink)
Figure 6. AVIN Supply Current with Supply Voltage
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CM3106-12SM (ON Semiconductor)
2 Amp Source / Sink Bus Termination Regulator

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CM3106
PERFORMANCE INFORMATION (Cont’d)
Typical DC Characteristics (nominal conditions unless otherwise specified)
Figure 7. Over Current Limit (Source)
Figure 8. Load Transient (0 A to 2.0 A Sink)
Figure 9. Line Transient (0 A to 2.0 A Sink)
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CM3106-12SM (ON Semiconductor)
2 Amp Source / Sink Bus Termination Regulator

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CM3106
PERFORMANCE INFORMATION (Cont’d)
Typical Thermal Characteristics (nominal conditions unless otherwise specified)
The overall junction to ambient thermal resistance (qJA)
for device power dissipation (PD) consists primarily of two
paths in series. The first path is the junction to the case (qJC)
which is defined by the package style, and the second path
is case to ambient (qCA) thermal resistance which is
dependent on board layout. The final operating junction
temperature for any set of conditions can be estimated by the
following thermal equation:
TJUNC = TAMB + PD (qJC) + PD (qCA)
= TAMB + PD (qJA)
When a CM310612SM is mounted on a double sided
printed circuit board with two square inches of copper
allocated for “heat spreading”, the resulting qJA is 151°C/W.
Based on the over temperature limit of 150°C with an
ambient of 70°C, the available power of this package will be:
PD = (150°C 85°C) / 151°C/W = 0.43 W
Since the qJA of the CM310612SB (PSOP) is 40°C/W,
the available power for this package will be:
PD = (150°C 85°C) / 40°C/W = 1.625 W
DDR Memory Application
Since the output voltage is 1.25 V, and the device can
either source current from VDD or sink current to Ground,
the power dissipated in the device at any time is 1.25 V times
the current load. This means the the maximum average RMS
current (in either direction) is 0.344 A for the
CM310612SM and 1.3 A for the CM310612SB. The
maximum instantaneous current is specified at 2 A, so this
condition should not be exceeded for more than 17% of the
time for the CM310612SM and 65% of the time for the
CM310612SB. It is highly unlikely in most usage of DDR
memory that this might occur, because it means the DDR
memory outputs are either all high or all low for 17% (SOIC)
and 65% (PSOP) of the time.
If the ambient temperature is 40°C instead of 85°C, which
is typically the maximum in most DDR memory
applications, the power dissipated (PD) can be 0.73 W, for
the CM310612SM and 2.75 W for the CM310612SB. So
the maximum average RMS current increases from 0.42 A
to 0.58 A for the CM310612SM and a maximum
instantaneous current of 2 A should not be exceeded for
more than 29% of the time. For CM310612SB, the
maximum RMS current increases from 1.3 A to 2.2 A. Thus,
the maximum continuous current can be 2 A all the time.
Figure 10. Duty Cycle vs. Ambient Temperature
(ILOAD = 2.0 A)
Figure 11. Duty Cycle vs. Output Current
(Temp = 705C)
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CM3106-12SM (ON Semiconductor)
2 Amp Source / Sink Bus Termination Regulator

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CM3106
PERFORMANCE INFORMATION (Cont’d)
Typical Thermal Characteristics (cont’d) (nominal conditions unless otherwise specified)
The theoretical calculations of these relationships show
the safe operating area of the CM3106 in the SOIC package.
Thermal characteristics were measured using a double
sided board with two square inches of copper area connected
to the GND pins for “heat spreading”.
Measurements showing performance up to a junction
temperature of 150°C were performed under light load
conditions (5 mA). This allows the ambient temperature to
be representative of the internal junction temperature.
NOTE: The use of multilayer board construction with
separate ground and power planes will further
enhance the overall thermal performance.
Figure 12. Reference Voltage vs. Temperature
Figure 13. VTT Output Voltage vs. Temperature
(5 mA load)
Figure 14. AVIN Quiescent Current vs. Temperature
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CM3106-12SM (ON Semiconductor)
2 Amp Source / Sink Bus Termination Regulator

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VDDQ
AVIN
PVIN
CAVIN
47 mF
CM3106
APPLICATION INFORMATION
CM3106
VDDQ
VREF
AVIN
VSENSE
PVIN
CPVIN
47 mF
GND
VTT
VREF
CREF
0.1 mF
VTT
CTT
220 mF
Figure 15. Typical Application Circuit
PCB Layout Considerations
The CM310612SB has a heat spreader attached to the
underneath of the PSOP8 package in order for heat to be
transferred much easier from the package to the PCB. The
heat spreader is a copper pad of dimensions just smaller than
the package itself. By positioning the matching pad on the
PCB top layer to connect to the spreader during
manufacturing, the heat will be transferred between the two
pads. The drawing below shows the recommended PCB
layout. Note that there are six vias on either side to allow the
heat to dissipate into the ground and power planes on the
inner layers of the PCB. Vias can be placed underneath the
chip, but this can cause blockage of the solder. The ground
and power planes should be at least 2 sq in. of copper by the
vias. It also helps dissipation to spread if the chip is
positioned away from the edge of the PCB, and not near
other heat dissipating devices. A good thermal link from the
PCB pad to the rest of the PCB will ensure a thermal link
from the CM3106 package to ambient, qJA, of around
40°C/W.
Figure 16. Recommended Heat Sink PCB Layout
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CM3106-12SM (ON Semiconductor)
2 Amp Source / Sink Bus Termination Regulator

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CM3106
PACKAGE DIMENSIONS
X
A
SOIC8 NB
CASE 75107
ISSUE AK
B
Y
Z
H
85
S 0.25 (0.010) M Y M
1
4
K
G
D
C
SEATING
PLANE
N X 45 _
0.10 (0.004)
M
0.25 (0.010) M Z Y S X S
J
SOLDERING FOOTPRINT*
1.52
0.060
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 75101 THRU 75106 ARE OBSOLETE. NEW
STANDARD IS 75107.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 4.80 5.00 0.189 0.197
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
G 1.27 BSC
0.050 BSC
H 0.10 0.25 0.004 0.010
J 0.19 0.25 0.007 0.010
K 0.40 1.27 0.016 0.050
M 0_ 8_ 0_ 8_
N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
ǒ ǓSCALE 6:1
mm
inches
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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CM3106/D




CM3106-12SM.pdf
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