YM2610 Datasheet PDF - ETC


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YM2610
ETC

Part Number YM2610
Description FM - 4 Channels on 4 operators DAC
Page 9 Pages

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YM2610 Datasheet
1. FM – 4 Channels on 4 operators, DAC compatable with YM3016
2. SSG – 3 operators, compatable with YM2149 (Atari ST), 4th operator is Noise
3. L/R – Sound channels out
4. ADPCM-A – 6 channels 18.5 KHz, 16 MB Sample ROM size, 256 B min size of sample, 1 MB max
5. ADPCM-B – 1 channel 1.8-55.5 KHz, 16 MB Sample ROM size, 256 B min size of sample, 16 MB max,
compatable with YM2608
6. Master clock – 8MHz
7. 5V single power supply
8. 64-pin plastic SDIP
Prime function
The basic function of YM2610 can be divided roughly into four sound source part of FM sound source, SSG
sound source, and ADPCM sound source.
1) FM sound source part
The basic function of the FM sound source part is the same as OPN(YM2203).
Pronunciation mode
Four operator FM method and six sound pronunciation simultaneously.
Algorithm
Eight kinds.
Parameter
The register address and refer to the FM sound source part.
LFO function
Sine wave LFO. Pitch (PM) and, it modulates amplitude (AM). The LFO
frequency is changeable. AM on/off is possible of PMS, the AMS control, and each operator.
Compound sine wave synthesis One sound is possible in six sounds. Timer function Two kinds of timers
of A and B.
Output control
On/off of L and R.
2) SSG sound source part
The SSG sound source part is the same as OPN excluding the output method.
Pronunciation form
Three rectangular liquid sounds + white noise.
Function of each data
Refer to the register address.
Output
It outputs it from one terminal by internal mixing.
I/O port
Eight bit general purpose I/O port x2
3) ADPCM sound source part
Speech analysis, synthesis, and external memory control of ADPCM sound source part. It is composed of the
AD/DA conversion function.
Sampling rate
18.5 kHz , 1.8kHz-55.5kHz
AD/DA conversion
8-bit
ADPCM analysis
4-bit
Linear interpolation rate
55.5kHz
Data memory
Memory that external RAM-ROM
Output control
On/off of L and R.
No sound discrimination
The state under the analysis of a no sound can be identified.
4) DAC
Exclusive use DAC YM3016 is used.
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Block diagram
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Terminal arrangement chart
øM
øS,SH1,SH2
OPO
DO-D7
/CS, /RD, /WR, A1, A0
/IRQ
ANALOG OUT
output.
RAD0-RAD7
RA8-RA9
RA20-RA23
/ROE
RMPX
PAD0-PAD7
PA8-PA11
/POE
PMPX
/TEST
GND,AGND
Vcc, AVcc
Terminal function
Master clock (standard 8MHz) of OPNA is input.
It is clock (øS) for DAC and signal (SH1, SH2) of the cycle.
It is a serial data of FM, ADPCM, and rhythm each sound source part output.
It is passing of interactive data of 8bit. CPU and data are exchanged.
Data passing (D0-D7) is controlled.
The interrupt signal is output. It is an open drain output.
It is an analog output terminal in the SSG sound source part. It is source for an
Each signal of address (A0-A7), data input (D0-D7) of ADPCM-A
Each signal of address (A8-A9) of ADPCM-A
Each signal of address (A10-A14) of ADPCM-A
ADPCM-A /OE
Address control for data access of ADPCM-A
Each signal of address (A0-A7), data input (D0-D7) of ADPCM-B
Each signal of address (A8-A11) ) of ADPCM-B
ADPCM-B /OE
Address control for data access of ADPCM-B
It is a terminal for the test of LSI.
It is a ground terminal.
It is a power supply terminal of +5V.
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Data bus control
The data bus control of read/write etc. of addressing and data is done with /CS, /WR, /RD, A1, A0.
The table shows the allocation of the register address at this time and the control mode of the register.
Content of data passing control
/CS /RD /WR A1 A0
D0-D7
$00~ $10
0 1 0 00
0 1 0 01
$1F~$20
$2F~$30
$30~$B6
$00~ $10
$1F~$20
$2F~$30
$30~$B6
0 1 0 10
$00~$2F
$30~$B6
0 1 0 11
$00~$2F
$30~$B6
0 0 1 00
$00~$0D
Mode
SSG
ADPCM-B
FM
FM 1,2
SSG
ADPCM-B
FM
FM 1,2
ADPCM-A
FM 3,4
ADPCM-A
FM 3,4
SSG
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