WPS512K8X-XRJXG Datasheet PDF - Microsemi

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WPS512K8X-XRJXG
Microsemi

Part Number WPS512K8X-XRJXG
Description 512Kx8 Plastic Monolithic SRAM CMOS
Page 9 Pages


WPS512K8X-XRJXG datasheet pdf
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EDI88512CA-XMXG
WPS512K8X-XRJXG
512Kx8 Plastic Monolithic SRAM CMOS
FEATURES
 512Kx8 bit CMOS Static
 Random Access Memory
• Access Times of 17, 20, 25ns
• Data Retention Function (LPA version)
• Extended Temperature Testing
• Data Retention Functionality Testing
 36 lead JEDEC Approved Revolutionary Pinout
• Plastic SOJ (Package 319)
 Single +5V (±10%) Supply Operation
 RoHS compliant
WEDC's ruggedized plastic 512Kx8 SRAM that allows the user to
capitalize on the cost advantage of using a plastic component while
not sacricing all of the reliability available in a full military device.
Extended temperature testing is performed with the test patterns
developed for use on WEDC’s fully compliant 512Kx8 SRAMs.
WEDC fully characterizes devices to determine the proper test
patterns for testing at temperature extremes. This is critical because
the operating characteristics of device change when it is operated
beyond the commercial guarantee a device that operates reliably
in the eld at temperature extremes. Users of WEDC’s ruggedized
plastic benet from WEDC’s extensive experience in characterizing
SRAMs for use in military systems.
WEDC ensures Low Power devices will retain data in Data
Retention mode by characterizing the devices to determine the
appropriate test conditions. This is crucial for systems operating
at -40°C or below and using dense memories such as 512Kx8s.
WEDC’s ruggedized plastic SOJ is footprint compatible with
WEDC’s full military ceramic 36 pin SOJ.
FIGURE 1 – PIN CONFIGURATION
TOP VIEW
A0 1
A1 2
A2 3
A3 4
A4 5
CS# 6
I/O0 7
I/O1 8
VCC 9
VSS 10
I/O2 11
I/O3 12
WE# 13
A5 14
A6 15
A7 16
A8 17
A9 18
36pin
Revolutionary
36 NC
35 A18
34 A17
33 A16
32 A15
31 OE#
30 I/O7
29 I/O6
28 VSS
27 VCC
26 I/O5
25 I/O4
24 A14
23 A13
22 A12
21 A11
20 A10
19 NC
AØ-18
WE#
CS#
OE#
Microsemi Corporation reserves the right to change products or specications without notice.
May 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
1
PIN Description
I/O0-7
A0-18
WE#
CS#
OE#
VCC
VSS
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power (+5V ±10%)
Ground
Not Connected
BLOCK DIAGRAM
Memory Array
Address
Buffer
Address
Decoder
I/O
Circuits
I/OØ-7
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp



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EDI88512CA-XMXG
WPS512K8X-XRJXG
ABSOLUTE MAXIMUM RATINGS
Parameter
Unit
Voltage on any pin relative to Vss
-0.5 to 7.0
V
Operating Temperature TA (Ambient)
Commercial
0 to +70
°C
Industrial
-40 to +85
°C
Military
-55 to +125
°C
Storage Temperature, Plastic
-65 to +150
°C
Power Dissipation
1.5 W
Output Current
20 mA
Junction Temperature, TJ
175 °C
NOTE:
Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions greater than
those indicated in the operational sections of this specication is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
OE# CS# WE#
XHX
HLH
L LH
XLL
TRUTH TABLE
Mode
Standby
Output Deselect
Read
Write
Output
High Z
High Z
Data Out
Data In
Power
Icc2, Icc3
Icc1
Icc1
Icc1
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Symbol
VCC
VSS
VIH
VIL
Min
4.5
0
2.0
-0.5
Typ Max Unit
5.0 5.5
V
00V
— VCC + 0.5 V
— +0.8 V
CAPACITANCE
TA = +25°C
Parameter
Symbol
Condition
Address Lines
CI VIN = Vcc or Vss, f = 1.0MHz
Data Lines
CO VIN = Vcc or Vss, f = 1.0MHz
These parameters are sampled, not 100% tested.
Max Unit
8 pF
8 pF
DC CHARACTERISTICS
VCC = 5V, VSS = 0V, -55°C TA +125°C
Parameter
Symbol
Input Leakage Current
ILI
Output Leakage Current
ILO
Operating Supply Current
ICC
Standby Current
ISB
Output High Volltage
VOH
Output Low Voltage
VOL
NOTE: DC test conditions: VIL = 0.3V, VIH = VCC -0.3V
Conditions
VCC = 5.5, VIN = VSS to VCC
CS# = VIL, OE# = VIH, VOUT = VSS to VCC
CS# = VIL, OE# = VIH, f = 5MHz, VCC = 5.5
CS# = VIH, OE# = VIH, f = 5MHz, VCC = 5.5
IOH = -4.0mA, VCC = 4.5
IOL = 8.0mA, VCC = 4.5
Min
2.4
Max Units
10 μA
10 μA
180 mA
15 mA
V
0.4 V
AC TEST CONDITIONS
Figure 1
Q
255Ω
Figure 2
Vcc
480Ω
30pF
Q
255Ω
Vcc
480Ω
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
NOTE: For tEHQZ, tGHQZ and tWLQZ, CL = 5pF (Figure 2)
5pF
VSS to 3.0V
5ns
1.5V
Figure 1
Microsemi Corporation reserves the right to change products or specications without notice.
May 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
2
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp



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EDI88512CA-XMXG
WPS512K8X-XRJXG
AC CHARACTERISTICS – READ CYCLE
VCC = 5.0V, VSS = 0V, 0°C TA +70°C
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Chip Enable to Output in Low Z (1)
Chip Disable to Output in High Z (1)
Output Hold from Address Change
Output Enable to Output Valid
Output Enable to Output in Low Z (1)
Output Disable to Output in High Z(1)
1. This parameter is guaranteed by design but not tested.
Symbol
JEDEC
Alt.
tAVAV
tRC
tAVQV
tAA
tELQV
tACS
tELQX
tCLZ
tEHQZ
tCHZ
tAVQX
tOH
tGLQV
tOE
tGLQX
tOLZ
tGHQZ
tOHZ
17ns
Min Max
17
17
17
3
07
0
8
0
07
20ns
Min Max
20
20
20
3
08
0
10
0
08
25ns
Min Max
25
25
25
3
0 10
0
12
0
0 10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC CHARACTERISTICS – WRITE CYCLE
VCC = 5.0V, VSS = 0V, 0°C TA +70°C
Parameter
Symbol
JEDEC
Alt.
Write Cycle Time
tAVAV
tWC
Chip Enable to End of Write
tELWH
tELEH
tCW
tCW
Address Setup Time
tAVWL
tAVEL
tAS
tAS
Address Valid to End of Write
tAVWH
tAVEH
tAW
tAW
Write Pulse Width
tWLWH
tWLEH
tWP
tWP
Write Recovery Time
tWHAX
tEHAX
tWR
tWR
Data Hold Time
tWHDX
tEHDX
tDH
tDH
Write to Output in High Z (1)
tWLQZ
tWHZ
Data to Write Time
tDVWH
tDVEH
tDW
tDW
Output Active from End of Write (1)
tWHQX
tWLZ
1. This parameter is guaranteed by design but not tested.
17ns
Min Max
17
14
14
0
0
14
14
14
14
0
0
0
0
08
8
8
0
20ns
Min Max
20
15
15
0
0
15
15
15
15
0
0
0
0
08
10
10
0
25ns
Min Max
25
17
17
0
0
17
17
17
17
0
0
0
0
0 10
12
12
0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Microsemi Corporation reserves the right to change products or specications without notice.
May 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
3
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp



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EDI88512CA-XMXG
WPS512K8X-XRJXG
ADDRESS
DATA I/O
FIGURE 2 – TIMING WAVEFORM — READ CYCLE
tAVAV
ADDRESS 1
ADDRESS 2
tAVQV
tAVQX
DATA 1
DATA 2
READ CYCLE 1 (WE# HIGH; OE#, CS# LOW)
ADDRESS
CS#
OE#
DATA OUT
tAVAV
tAVQV
tELQV
tELQX
tGLQV
tGLQX
tEHQZ
tGHQZ
READ CYCLE 2 (WE# HIGH)
FIGURE 3 – WRITE CYCLE — WE# CONTROLLED
ADDRESS
CS#
WE#
DATA IN
DATA OUT
tAVWL
tAVAV
tAVWH
tELWH
tWHAX
tWLWH
tWLQZ
tDVWH
tWHDX
DATA VALID
tWHQX
HIGH Z
WRITE CYCLE 1, WE# CONTROLLED
FIGURE 4 – WRITE CYCLE — CS# CONTROLLED
ADDRESS
CS#
WE#
DATA IN
DATA OUT
tAVAV
tAVEL
tAVEH
tELEH
tEHAX
tWLEH
tDVEH
tEHDX
DATA VALID
HIGH Z
WRITE CYCLE 2, CS# CONTROLLED
Microsemi Corporation reserves the right to change products or specications without notice.
May 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
4
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp



WPS512K8X-XRJXG datasheet pdf
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WPS512K8X-XRJXG 512Kx8 Plastic Monolithic SRAM CMOS WPS512K8X-XRJXG
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