WM5102 Datasheet PDF - Wolfson Microelectronics

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WM5102
Wolfson Microelectronics

Part Number WM5102
Description Audio Hub CODEC
Page 30 Pages


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WM5102
Audio Hub CODEC with Voice Processor DSP
DESCRIPTION
The WM5102[1] is a highly-integrated low-power audio
system for smartphones, tablets and other portable audio
devices. It combines wideband telephony voice processing
with a flexible, high-performance audio hub CODEC.
The WM5102 digital core provides a powerful combination
of fixed-function signal processing blocks with a
programmable DSP. These are supported by a fully-flexible,
all-digital audio mixing and routing engine with sample rate
converters, for wide use-case flexibility. The programmable
DSP supports a range of audio processing software
packages (supplied separately); user-programmed solutions
can also be supported. Fixed-function signal processing
blocks include filters, EQ, dynamics processors and sample
rate converters.
A SLIMbus interface supports multi-channel audio paths and
host control register access. Multiple sample rates are
supported concurrently via the SLIMbus interface. Three
further digital audio interfaces are provided, each supporting
a wide range of standard audio sample rates and serial
interface formats. Automatic sample rate detection enables
seamless wideband/narrowband voice call handover.
Two stereo headphone drivers each provide stereo ground-
referenced or mono BTL outputs, with noise levels as low as
2.3μVRMS for hi-fi quality line or headphone output. The
CODEC also features stereo 2W Class-D speaker outputs, a
dedicated BTL earpiece output and PDM for external
speaker amplifiers. A signal generator for controlling haptics
devices is included; vibe actuators can connect directly to
the Class-D speaker output, or via an external driver on the
PDM output interface. All inputs, outputs and system
interfaces can function concurrently.
The WM5102 supports up to six microphone inputs, each
either analogue or PDM digital. Microphone activity
detection with interrupt is available. A smart accessory
interface supports most standard 3.5mm accessories.
Impedance sensing and measurement is provided for
external accessory and push-button detection.
The WM5102 power, clocking and output driver
architectures are all designed to maximise battery life in
voice, music and standby modes. Low-power ‘Sleep’ is
supported, with configurable wake-up events. The WM5102
is powered from a 1.8V external supply. A separate supply is
required for the Class D speaker drivers (typically direct
connection to 4.2V battery).
Two integrated FLLs provide support for a wide range of
system clock frequencies. The WM5102 is configured using
the I2C, SPI or SLIMbus interfaces. The fully-differential
internal analogue architecture, minimal analogue signal
paths and on-chip RF noise filters ensure a very high degree
of noise immunity.
FEATURES
Audio hub CODEC with integrated voice processor DSP
Programmable DSP capability for audio processing
Fixed function signal processing functions
- Wind noise, sidetone and other programmable filters
- Dynamic Range Control, Fully parametric EQs
- Tone, Noise, PWM, Haptic control signal generators
Multi-channel asynchronous sample rate conversion
Integrated 6/7 channel 24-bit hi-fi audio hub CODEC
- 6 ADCs, 96dB SNR microphone input (48kHz)
- 7 DACs, 113dB SNR headphone playback (48kHz)
Audio inputs
- Up to 6 analogue or digital microphone inputs
- Single-ended or differential mic/line inputs
Multi-purpose headphone / earpiece / line output drivers
- 2 stereo output paths
- 29mW into 32load at 0.1% THD+N
- 100mW into 32BTL load at 5% THD+N
- 6.5mW typical headphone playback power consumption
- Pop suppression functions
- 2.3µVRMS noise floor (A-weighted)
Mono BTL earpiece output driver
2 x 2W stereo Class D speaker output drivers
- Direct drive of external haptics vibe actuators
Two-channel digital speaker (PDM) interface
SLIMbus® audio and control interface
3 full digital audio interfaces
- Standard sample rates from 4kHz up to 192kHz
- Ultrasonic accessory function support
- TDM support on all AIFs
- 8 channel input and output on AIF1
Flexible clocking, derived from MCLKn, BCLKn or SLIMbus
2 low-power FLLs support reference clocks down to 32kHz
Advanced accessory detection functions
- Low-power standby mode and configurable wake-up
Configurable functions on 5 GPIO pins
Integrated LDO regulators and charge pumps
Support for single 1.8V supply operation
Small W-CSP package, 0.4mm pitch
APPLICATIONS
Smartphones and Multimedia handsets
Tablets and Mobile Internet Devices (MID)
General-purpose low-power audio CODEC hub
WOLFSON MICROELECTRONICS plc
Production Data, June 2014, Rev 4.2
[1] This product is protected by Patents US 7,622,984, US 7,626,445, US 7,765,019 and GB 2,432,765
Copyright 2014 Wolfson Microelectronics plc



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WM5102
BLOCK DIAGRAM
Production Data
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Production Data
WM5102
TABLE OF CONTENTS
DESCRIPTION................................................................................................................ 1 
FEATURES ..................................................................................................................... 1 
APPLICATIONS.............................................................................................................. 1 
BLOCK DIAGRAM ......................................................................................................... 2 
TABLE OF CONTENTS.................................................................................................. 3 
PIN CONFIGURATION ................................................................................................... 7 
ORDERING INFORMATION........................................................................................... 7 
PIN DESCRIPTION......................................................................................................... 8 
ABSOLUTE MAXIMUM RATINGS ............................................................................... 13 
RECOMMENDED OPERATING CONDITIONS............................................................ 14 
ELECTRICAL CHARACTERISTICS ............................................................................ 15 
TERMINOLOGY......................................................................................................................... 26 
THERMAL CHARACTERISTICS.................................................................................. 27 
TYPICAL PERFORMANCE .......................................................................................... 28 
TYPICAL POWER CONSUMPTION ......................................................................................... 28 
TYPICAL SIGNAL LATENCY .................................................................................................... 29 
SIGNAL TIMING REQUIREMENTS ............................................................................. 30 
SYSTEM CLOCK & FREQUENCY LOCKED LOOP (FLL)....................................................... 30 
AUDIO INTERFACE TIMING..................................................................................................... 32 
DIGITAL MICROPHONE (DMIC) INTERFACE TIMING................................................................................................................32 
DIGITAL SPEAKER (PDM) INTERFACE TIMING.........................................................................................................................33 
DIGITAL AUDIO INTERFACE - MASTER MODE .........................................................................................................................34 
DIGITAL AUDIO INTERFACE - SLAVE MODE.............................................................................................................................35 
DIGITAL AUDIO INTERFACE - TDM MODE ................................................................................................................................36 
CONTROL INTERFACE TIMING .............................................................................................. 37 
2-WIRE (I2C) CONTROL MODE ...................................................................................................................................................37 
4-WIRE (SPI) CONTROL MODE...................................................................................................................................................38 
SLIMBUS INTERFACE TIMING ................................................................................................ 39 
DEVICE DESCRIPTION ............................................................................................... 41 
INTRODUCTION........................................................................................................................ 41 
HI-FI AUDIO CODEC.....................................................................................................................................................................41 
DIGITAL AUDIO CORE .................................................................................................................................................................42 
DIGITAL INTERFACES .................................................................................................................................................................42 
OTHER FEATURES ......................................................................................................................................................................43 
INPUT SIGNAL PATH................................................................................................................ 44 
ANALOGUE MICROPHONE INPUT .............................................................................................................................................45 
ANALOGUE LINE INPUT ..............................................................................................................................................................46 
DIGITAL MICROPHONE INPUT ...................................................................................................................................................46 
INPUT SIGNAL PATH ENABLE ....................................................................................................................................................48 
INPUT SIGNAL PATH SAMPLE RATE CONTROL.......................................................................................................................49 
INPUT SIGNAL PATH CONFIGURATION ....................................................................................................................................49 
INPUT SIGNAL PATH DIGITAL VOLUME CONTROL..................................................................................................................53 
DIGITAL MICROPHONE INTERFACE PULL-DOWN ...................................................................................................................57 
DIGITAL CORE .......................................................................................................................... 58 
DIGITAL CORE MIXERS...............................................................................................................................................................60 
DIGITAL CORE INPUTS ...............................................................................................................................................................63 
DIGITAL CORE OUTPUT MIXERS ...............................................................................................................................................64 
MIC MUTE MIXER.........................................................................................................................................................................67 
5-BAND PARAMETRIC EQUALISER (EQ) ...................................................................................................................................68 
DYNAMIC RANGE CONTROL (DRC) ...........................................................................................................................................73 
LOW PASS / HIGH PASS DIGITAL FILTER (LHPF).....................................................................................................................83 
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WM5102
Production Data
DIGITAL CORE DSP .....................................................................................................................................................................86 
TONE GENERATOR .....................................................................................................................................................................88 
NOISE GENERATOR ....................................................................................................................................................................90 
HAPTIC SIGNAL GENERATOR....................................................................................................................................................91 
PWM GENERATOR ......................................................................................................................................................................94 
SAMPLE RATE CONTROL ...........................................................................................................................................................96 
ASYNCHRONOUS SAMPLE RATE CONVERTER (ASRC) .......................................................................................................104 
ISOCHRONOUS SAMPLE RATE CONVERTER (ISRC) ............................................................................................................107 
DSP FIRMWARE CONTROL................................................................................................... 111 
DSP FIRMWARE MEMORY CONTROL .....................................................................................................................................111 
DSP FIRMWARE EXECUTION ...................................................................................................................................................113 
DSP DIRECT MEMORY ACCESS (DMA) CONTROL ................................................................................................................113 
DSP DEBUG SUPPORT .............................................................................................................................................................115 
DIGITAL AUDIO INTERFACE ................................................................................................. 116 
MASTER AND SLAVE MODE OPERATION...............................................................................................................................117 
AUDIO DATA FORMATS ............................................................................................................................................................117 
AIF TIMESLOT CONFIGURATION .............................................................................................................................................119 
TDM OPERATION BETWEEN THREE OR MORE DEVICES ....................................................................................................121 
DIGITAL AUDIO INTERFACE CONTROL .............................................................................. 123 
AIF SAMPLE RATE CONTROL...................................................................................................................................................123 
AIF MASTER / SLAVE CONTROL ..............................................................................................................................................123 
AIF SIGNAL PATH ENABLE .......................................................................................................................................................126 
AIF BCLK AND LRCLK CONTROL .............................................................................................................................................129 
AIF DIGITAL AUDIO DATA CONTROL.......................................................................................................................................133 
AIF TDM AND TRI-STATE CONTROL........................................................................................................................................136 
AIF DIGITAL PULL-UP AND PULL-DOWN .................................................................................................................................137 
SLIMBUS INTERFACE ............................................................................................................ 139 
SLIMBUS DEVICES ....................................................................................................................................................................139 
SLIMBUS FRAME STRUCTURE ................................................................................................................................................139 
CONTROL SPACE ......................................................................................................................................................................139 
DATA SPACE ..............................................................................................................................................................................140 
SLIMBUS CONTROL SEQUENCES ....................................................................................... 141 
DEVICE MANAGEMENT & CONFIGURATION ..........................................................................................................................141 
INFORMATION MANAGEMENT .................................................................................................................................................141 
VALUE MANAGEMENT (INCLUDING REGISTER ACCESS) ....................................................................................................142 
FRAME & CLOCKING MANAGEMENT ......................................................................................................................................142 
DATA CHANNEL CONFIGURATION ..........................................................................................................................................143 
SLIMBUS INTERFACE CONTROL ......................................................................................... 144 
SLIMBUS DEVICE PARAMETERS .............................................................................................................................................144 
SLIMBUS MESSAGE SUPPORT ................................................................................................................................................144 
SLIMBUS PORT NUMBER CONTROL .......................................................................................................................................147 
SLIMBUS SAMPLE RATE CONTROL ........................................................................................................................................147 
SLIMBUS SIGNAL PATH ENABLE .............................................................................................................................................148 
SLIMBUS CONTROL REGISTER ACCESS ...............................................................................................................................149 
SLIMBUS CLOCKING CONTROL...............................................................................................................................................151 
OUTPUT SIGNAL PATH.......................................................................................................... 153 
OUTPUT SIGNAL PATH ENABLE ..............................................................................................................................................155 
OUTPUT SIGNAL PATH SAMPLE RATE CONTROL.................................................................................................................156 
OUTPUT SIGNAL PATH CONTROL...........................................................................................................................................157 
OUTPUT SIGNAL PATH DIGITAL VOLUME CONTROL............................................................................................................160 
OUTPUT SIGNAL PATH DIGITAL VOLUME LIMIT ....................................................................................................................165 
OUTPUT SIGNAL PATH NOISE GATE CONTROL ....................................................................................................................169 
OUTPUT SIGNAL PATH AEC LOOPBACK ................................................................................................................................171 
HEADPHONE/EARPIECE OUTPUTS AND MONO MODE ........................................................................................................172 
SPEAKER OUTPUTS (ANALOGUE) ..........................................................................................................................................174 
SPEAKER OUTPUTS (DIGITAL PDM) .......................................................................................................................................174 
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