Pin Description, continued
SYMBOL PIN NO. I/O
10 I Hook switch input. Conventional CMOS input with an internal
protection diode and a pull-high resistor to VDD.
HKS = VDD: On-hook state. Chip in sleep mode, no operation.
HKS = VSS: Off-hook state. Chip enabled for normal operation.
During dialing, this input ignores HKS = VDD for durations of less
than 150 mS (i.e., dialing is not terminated).
11 O Open drain dialing pulse output (Figure 1).
Flash key causes DP /C5 to be active in both tone mode and pulse
12 O During pulse dialing, maintains low state at all times.
In tone mode, outputs a dual or single tone.
Detailed timing diagram for tone mode is shown in Figure 2(a, b).
R1 697 699 +0.28
R2 770 766 -0.52
R3 852 848 -0.47
R4 941 948 +0.74
I Power input pins.
O The P MUTE is a conventional CMOS inverter output. It is high
during pulse dialing sequence and flash break. Otherwise, it
Publication Release Date: June 1996
- 3 - Revision A3