W91360N Datasheet PDF - Winbond


www.Datasheet-PDF.com

W91360N
Winbond

Part Number W91360N
Description 3-MEMORY TONE/PULSE DIALER
Page 14 Pages

W91360N datasheet pdf
View PDF for PC
W91360N pdf
View PDF for Mobile


No Preview Available !

W91360N SERIES
3-MEMORY TONE/PULSE DIALER WITH
HANDFREE AND HOLD FUNCTIONS
GENERAL DESCRIPTION
The W91360N series are tone/pluse switchable telephone dialers with three memories, hold function,
and a handfree dialing control circuit. Fabricated using CMOS technology, the W91360N series offer good
performance in low-voltage and low-power applications.
FEATURES
DTMF/pulse switchable dialer
Two by 32-digit redial and save memory
Three by 16-digit one-touch direct repertory memory
Cascaded dialing allowed, with unlimited dialing length
Pulse-to-tone (*/T) keypad for long distance call operation
Uses 5 × 5 keyboard
Easy operation with redial, flash, pause and */T keypads
Pause, PT (pulse-to-tone) can be stored as a digit in memory
On-hook debounce time: 150 msec.
Minimum tone output duration: 93 msec.
Minimum intertone pause: 93 msec.
Flash break time (73, 100, 300, 600 msec) selectable by keypad; pause time is 1.0 sec.
On-chip power-on reset
Uses 3.579545 MHz crystal or ceramic resonator
Packaged in 18 or 20-pin plastic DIP
The different dialers in the W91360N series are shown in the following table:
TYPE NO.
REPLACEMENT PULSE
TYPE NO.
(ppS)
FLASH
(mS)
M/B HANDFREE PACKAGE
DIALING
(PINS)
W91360N
W91360AN
W91360
W91360A
10 600/300/73/100 Pin
10 600/300/73/100 Pin
-
Yes
18
20
Publication Release Date: May 1997
- 1 - Revision A2



No Preview Available !

W91360N SERIES
PIN CONFIGURATIONS
C1
C2
C3
C4
H/P MUTE
VSS
XT
XT
T/P MUTE
1
2
3
4
5
6
7
8
9
18 R4
17 R3
16 R2
15 R1
14 VDD
13 MODE
12 DTMF
11 DP/C5
10 HKS
W91360N
C1
C2
C3
C4
H/P MUTE
VSS
XT
XT
T/P MUTE
HFI
1 20 R4
2 19 R3
3 18 R2
4 17 R1
5 16 VDD
6 15 MODE
7 14 DTMF
8 13 DP/C5
9 12 HKS
10 11 HFO
W91360AN
PIN DESCRIPTION
SYMBOL 18-PIN 20-PIN I/O
FUNCTION
Column-
Row Inputs
14
&
1518
14
&
1720
The keyboard inputs may be used with either a standard 5 ×
I 5 keyboard or an inexpensive single contact (Form A)
keyboard. Electronic input from a µC can also be used.
A valid key is defined as a single row being connected to a
single column.
XT, XT
7, 8 7, 8 I, O A built-in inverter provides oscillation with an inexpensive
3.579545 MHz crystal or ceramic resonator.
T/P MUTE
9
9 O The T/P MUTE is a conventional CMOS N-channel open
drain output.
The output transistor is switched on during dialing sequence
and flash break time. Otherwise, it is switched off.
MODE 13 15 I Pulling mode pin to VSS places the dialer in tone mode.
Pulling mode pin to VDD places the dialer in pulse mode
(M/B = 40:60).
Floating mode pin places the dialer in pulse mode
(M/B = 33.3:66.7).
HKS
10 12 I Hook switch input.
HKS = VDD: On-hook state. Chip in sleeping mode, no
operation.
HKS = VSS: Off-hook state. Chip enabled for normal
operation.
HKS pin is pulled to VDD by an internal resistor.
-2-



No Preview Available !

W91360N SERIES
Pin Description, continued
SYMBOL 18-PIN 20-PIN I/O
FUNCTION
DP / C5
11
13 O N-channel open drain dialing pulse output.
Flash key will cause DP to be active in either tone mode or
pulse mode.
The timing diagram for pulse mode is shown in Figure 1(a, b, c).
VDD, VSS 14, 6 16, 6 I Power input pins.
DTMF 12 14 O In pulse mode, this pin remains in low state at all times. In
tone mode, it will output a dual or single tone. Detailed timing
diagram for tone mode is shown in Figure 2(a, b, c).
OUTPUT FREQUENCY
Specified Actual Error %
R1 697
699 +0.28
R2 770
766 -0.52
R3 852
848 -0.47
R4 941
948 +0.74
C1
1209
1216
+0.57
C2
1336
1332
-0.30
C3
1477
1472
-0.34
HFI, HFO - 10, 11 I, O Handfree control pins. The handfree control state is toggled
by a low pulse on the HFI input pin. The status of the
handfree control state is described in the following table:
CURRENT STATE
Hook SW. HFO
Low
On Hook
High
Off Hook
On Hook
High
Off Hook
Low
Off Hook High
NEXT STATE
Input
HFO Dialing
HFI
HFI
HFI
Off Hook
High
Low
Low
Low
Yes
No
Yes
Yes
On Hook Low
No
On Hook High Yes
H/P MUTE
5
HFI pin is pulled to VDD by an internal resistor.
Detailed timing diagram is shown in Figure 3.
5 O The H/P MUTE is a conventional inverter output. During
pulse dialing, flash break or hold period, this output is active
high; otherwise, it remains in low state.
Publication Release Date: May 1997
- 3 - Revision A2



No Preview Available !

W91360N SERIES
BLOCK DIAGRAM
XT XT
SYSTEM CLOCK
GENERATOR
HKS
HFI
ROW
(R1 to R4, Vx)
COLUMN
(C1 to C4)
KEYBOARD
INTERFACE
DTMF
D/A
CONVERTER
READ/WRITE
COUNTER
CONTROL
LOGIC
LOCATION
LATCH
RAM
PULSE
CONTROL
LOGIC
ROW & COLUMN
PROGRAMMABLE
COUNTER
DATA LATCH
& DECODER
MODE
H/P MUTE
T/P MUTE
DP/C5
HFO
FUNCTIONAL DESCRIPTION
Keyboard Operation
C1 C2 C3 C4 DP / C5
1 23S
M1
4 5 6 F4
M2
7 89
M3
/T 0 # R/P SAVE
F1 F2 F3 H
R1
R2
R3
R4
VX
S: Store function key
H: Hold function key
R/P: Redial and pause function key
SAVE: Save function key
/T: in tone mode and PT in pulse mode
M1, ..., M3: One-touch memory
F1, , F4: Flash keys, F1 = 600 mS, F2 = 300 mS, F3 = 73 mS, F4 = 100 mS
Notes:
D1, ..., Dn, D1', ..., Dn' : 0, ..., 9, */T, #
Mn: M1, ..., M3 ; Fn: F1, ..., F4
-4-




W91360N datasheet pdf
Download PDF
W91360N pdf
View PDF for Mobile


Similiar Datasheets : W91360N

Index :   0   1   2   3   4   5   6   7   8   9   A   B   C   D   E   F   G   H   I   J   K   L   M   N   O   P   Q   R   S   T   U   V   W   X   Y   Z   

This is a individually operated, non profit site. If this site is good enough to show, please introduce this site to others.
Since 2010   ::   HOME   ::   Privacy Policy + Contact