W91354AN Datasheet PDF - Winbond


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W91354AN
Winbond

Part Number W91354AN
Description 13-MEMORY TONE/PULSE DIALER
Page 16 Pages

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W91350N SERIES
13-MEMORY TONE/PULSE DIALER WITH
HANDFREE AND HOLD FUNCTIONS
GENERAL DESCRIPTION
The W91350N series are tone/pluse switchable telephone dialers with thirteen memories, hold
function, and a handfree dialing control circuit. Fabricated using CMOS technology, the W91350N series
offer good performance in low-voltage and low-power applications.
FEATURES
DTMF/pulse switchable dialer
Two by 32-digit redial memory and save memory
Three by 16-digit one-touch direct repertory memory
Ten by 16-digit two-touch direct repertory memory
Cascaded dialing allowed, with unlimited dialing length
Pulse-to-tone (*/T) keypad for long distance call operation
Uses 5 × 5 keyboard
Easy operation with redial, flash, pause, and */T keypads
Pause, PT (pulse-to-tone) can be stored as a digit in memory
Dialing rate (10 ppS or 20 ppS) is selectable by bonding option
On-hook debounce time: 150 msec.
Minimum tone output duration: 93 msec. (W91354AN: 87 mS)
Minimum intertone pause: 93 msec. (W91354AN: 87 mS)
Flash break time (73, 100, 300, 600 msec) selectable by keypad; pause time is 1.0 sec.
Make/break ratio (40:60 or 33.3:66.7) selectable by MODE pin
On-chip power-on reset
Uses 3.579545 MHz crystal or ceramic resonator
Packaged in 18 or 20-pin plastic DIP
The different dialers in the W91350N series are shown in the following table:
TYPE NO.
REPLACEMENT PULSE
TYPE NO.
(ppS)
FLASH
(mS)
M/B HANDFREE PACKAGE
DIALING
(PINS)
W91350N
W91350
10 600/300/73/100 Pin
-
18
W91351
W91352N
W91352
20 600/300/73/100 Pin
-
18
W91350AN
W91350A
10 600/300/73/100 Pin
Yes
20
W91351A
W91352AN
W91352A
20 600/300/73/100 Pin
Yes
20
W91354AN
New type
10 600/300/73/100 Pin
Yes
20
Note: The W91354AN is for use in France only. The pause time is not added in pulse-to-tone function mode.
Publication Release Date: May 1997
- 1 - Revision A2



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W91350N SERIES
PIN CONFIGURATIONS
C1
C2
C3
C4
H/P MUTE
VSS
XT
XT
T/P MUTE
1
2
3
4
5
6
7
8
9
18 R4
17 R3
16 R2
15 R1
14 VDD
13 MODE
12 DTMF
11 DP/C5
10 HKS
W91350N/352N
C1
C2
C3
C4
H/P MUTE
VSS
XT
XT
T/P MUTE
HFI
1
2
3
4
5
6
7
8
9
10
20 R4
19 R3
18 R2
17 R1
16 VDD
15 MODE
14 DTMF
13 DP/C5
12 HKS
11 HFO
W91350AN/352AN/354AN
PIN DESCRIPTION
SYMBOL 18-PIN 20-PIN I/O
FUNCTION
Column-
Row Inputs
XT, XT
14
&
1518
7, 8
14
&
1720
The keyboard inputs may be used with either a standard
I 5 × 5 keyboard or an inexpensive single contact (Form A)
keyboard. Electronic input from a µC can also be used.
A valid key in is defined as a single row being connected to
a single column.
7, 8 I, O A built-in inverter provides oscillation with an inexpensive
3.579545 MHz crystal or ceramic resonator.
T/P MUTE
9
MODE
13
HKS
10
9 O The T/P MUTE is a conventional CMOS N-channel open
drain output.
The output transistor is switched on during dialing sequence
and flash break time. Otherwise, it is switched off.
15 I Pulling mode pin to VSS places the dialer in tone mode.
Pulling mode pin to VDD places the dialer in pulse mode
with M/B ratio of 40:60 (10 ppS, except for
W91352N/352AN = 20 ppS).
Floating mode pin places the dialer in pulse mode with M/B
ratio of 33.3:66.7 (10 ppS, except for W91352N/352AN =
20 ppS).
12 I Hook switch input.
HKS = VDD: On-hook state. Chip in sleeping mode, no
operation.
HKS = VSS: Off-hook state. Chip is enabled for normal
operation.
HKS pin is pulled to VDD by an internal resistor.
-2-



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W91350N SERIES
Pin Description, continued
SYMBOL 18-PIN 20-PIN I/O
FUNCTION
DP / C5
11
13 O N-channel open drain dialing pulse output.
Flash key will cause DP / C5 to be active in either tone
mode or pulse mode.
The timing diagram for pulse mode is shown in Figure 1(a, b, c).
VDD, VSS 14, 6 16, 6 I Power input pins.
DTMF 12 14 O In pulse mode, this pin remains in low state at all times.
In tone mode, it will output a dual or single tone. Detailed
timing diagram for tone mode is shown in Figure 2(a, b, c).
Output Frequency
Specified Actual Error %
R1 697
R2 770
699 +0.28
766 -0.52
R3 852
848 -0.47
R4 941
C1 1209
C2 1336
C3 1477
948
1216
1332
1472
+0.74
+0.57
-0.30
-0.34
HFI, HFO - 10, 11 I, O Handfree control pins. The handfree control state is toggled
on by a low pulse on the HFI input pin. The status of the
handfree control state is described in the following table:
CURRENT STATE
Hook SW.
HFO
Low
On Hook
High
Off Hook
High
On Hook
Off Hook
Off Hook
Low
High
NEXT STATE
Input
HFO
HFI High
HFI Low
HFI Low
Off Hook Low
On Hook Low
On Hook High
Dialing
Yes
No
Yes
Yes
No
Yes
H/P MUTE 5
HFI pin is pulled to VDD by an internal resistor.
Detailed timing diagram is shown in Figure 3.
5 O The H/P MUTE is a conventional inverter output. During
pulse dialing, flash break or hold period, this output is active
high; otherwise, it remains in low state.
Publication Release Date: May 1997
- 3 - Revision A2



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W91350N SERIES
BLOCK DIAGRAM
XT XT
SYSTEM CLOCK
GENERATOR
HKS
HFI
ROW
(R1 to R4, Vx)
COLUMN
(C1 to C4)
KEYBOARD
INTERFACE
DTMF
D/A
CONVERTER
READ / WRITE
COUNTER
CONTROL
LOGIC
LOCATION
LATCH
RAM
PULSE
CONTROL
LOGIC
ROW & COLUMN
PROGRAMMABLE
COUNTER
DATA LATCH
& DECODER
MODE
H/P MUTE
T/P MUTE
DP/C5
HFO
FUNCTIONAL DESCRIPTION
Keyboard Operation
C1 C2
12
45
78
/T 0
F1 F2
C3 C4 DP / C5
3 S M1
6 F4 M2
9 A M3
# R/P SAVE
F3 H
R1
R2
R3
R4
VX
S: Store function key
H: Hold function key
A: Indirect repertory memory dialing function key
R/P: Redial and pause function key
SAVE: Save function key
/T: in tone mode and PT in pulse mode
M1, ..., M3: One-touch memory
F1, ..., F4: Flash keys, F1 = 600 mS, F2 = 300 mS, F3 = 73 mS, F4 = 100 mS
Notes:
D1, ..., Dn, D1', ..., Dn': 0, ..., 9, */T, #
Mn: M1 , ..., M3 ; Ln: 0, ..., 9; Fn: F1, ..., F4
-4-




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