W78C438C Datasheet PDF - nuvoton

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W78C438C
nuvoton

Part Number W78C438C
Description 8-BIT MICROCONTROLLER
Page 20 Pages


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W78C438C Data Sheet
8-BIT MICROCONTROLLER
Table of Contents-
1. GENERAL DESCRIPTION.......................................................................................................... 2
2. FEATURES ................................................................................................................................. 2
3. PIN CONFIGURATIONS............................................................................................................. 3
4. PIN DESCRIPTION..................................................................................................................... 4
5. FUNCTIONAL DESCRIPTION.................................................................................................... 6
5.1 Dedicated Data and Address Port .................................................................................. 6
5.2 Additional I/O Port ........................................................................................................... 8
5.3 Additional External Interrupt............................................................................................ 8
5.4 Newly Added Special Function Registers ..................................................................... 10
5.5 Power Reduction Function ............................................................................................ 10
5.6 Programming Difference............................................................................................... 11
6. ELECRICAL CHARACTERISTICS ........................................................................................... 12
6.1 Absolute Maximum Ratings .......................................................................................... 12
6.2 D.C. Characteristics ...................................................................................................... 12
6.3 A.C. Characteristics ...................................................................................................... 13
6.3.1 Clock Input Waveform....................................................................................................13
6.3.2 Program Fetch Cycle......................................................................................................13
6.3.3 Data Memory Read/Write Cycle.....................................................................................14
7. TIMING WAVEFORMS ............................................................................................................. 15
7.1 Program Fetch Cycle .................................................................................................... 15
7.2 Data Memory Read/Write Cycle ................................................................................... 16
8. TYPICAL APPLICATION CIRCUITS......................................................................................... 17
8.1 Using 128K × 8 bit External EPROM (W27E010)......................................................... 17
9. PACKAGE DIMENSIONS ......................................................................................................... 19
9.1 100-pin QFP.................................................................................................................. 19
10. REVISION HISTORY ................................................................................................................ 20
Publication Release Date: March 10, 2010
- 1 - Revision A7



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W78C438C
1. GENERAL DESCRIPTION
The W78C438C is a high-performance single-chip CMOS 8-bit microcontroller that is a derivative of
the W78C58 microcontroller family. The W78C438C is functionally compatible with the W78C32,
except that it provides either a 64 KB program/1 MB data memory address or memory-mapped chip
select logic, five general I/O ports, and four external interrupts.
In the W78C32, two I/O ports, Port 1 and Port 3, are available for general-purpose use (Port 3 also
supports alternative functions), and Port 2 and Port 0 are used as the address bus and data bus,
respectively. To enable Port 0 and Port 2 to also be used as general purpose I/O ports, the W78C438C
provides two dedicated address ports (AP5 and AP6) that serve as address output for 64 KB of
memory and one address/data port (DP4) that serves as ROM code input and external RAM data
input/output. Unlike the W78C32, this product does not require an external latch device for multiplexing
low byte addresses. The W78C438C also provides four pins (AP7.0AP7.3) to support either 64 KB
program/1 MB data memory space or memory-mapped chip select logic, one parallel I/O port (Port 8)
without bit addressing mode, and two additional external interrupts ( INT2 , INT3 ) .
The W78C438C is programmed in a manner fully compatible with that used to program the W78C32,
except that the external data RAM is accessed by the "MOVX @Ri" instruction. Address paging is
performed by loading page addresses into the HB (high byte) register, which is not a standard register
in the W78C32, before execution of the "MOVX @Ri" instruction.
2. FEATURES
8-bit CMOS microcontroller
Fully static design
DC to 40 MHz operation
ROM-less operation
256-byte on-chip scratchpad RAM
Either 64 KB program/1 MB data memory address space or 4 memory-mapped chip select pins
One 8-bit data/address port
Two 8-bit and one 4-bit (optional) address ports
Five 8-bit bidirectional I/O ports
Four 8-bit bit-addressable I/O ports and one 8-bit parallel I/O port
Eight-source, two-level interrupt capability
Three 16-bit timer/counters
Four external interrupts
One full-duplex serial channel
Built-in power management
Idle mode
Power-down mode
Packages:
Lead Free (RoHS) PQFP 100: W78C438C40FL
-2-



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W78C438C
3. PIN CONFIGURATIONS
NC
NC
NC
NC
P1.5
P1.6
P1.7
RESET
P8.0
P8.1
P8.2
P8.3
P8.4
P8.5
P8.6
P8.7
INT3
INT2
RXD, P3.0
VDD
TXD, P3.1
INT0, P3.2
INT1, P3.3
T0, P3.4
T1, P3.5
WR, P3.6
NC
NC
NC
NC
T
2
ET
X2
,,
DDDDDDDD
P PPP PPPPPPPPP
PPPP
1 1 11 1 4 4 4 4 4 4 4 4 V0 0 0 0
N . . . . . . . . . . . . . D. . . . N
C 4 3 2 1 0 7 6 5 4 3 2 1 0 D0 1 2 3 C
1 9999999999888888888
1
0
0
98
76
54
3
2
10
9
8
76
54
3
2
1
80
2 79
3 78
4 77
5 76
6 75
7 74
8 73
9 72
10 71
11 70
12 69
13 68
14 67
15
W78C438CF
66
16 65
17
100-pin PQFP
64
18 63
19 62
20 61
21 60
22 59
23 58
24 57
25 56
26 55
27 54
28 53
29 52
30
3 3 33 3 3 3 3 34 4 4 4 4 4 4 4 4 4 5
12345 67890 12345 6789 0
51
PX
3.T
7,A
/
R
D
L
2
X
T
A
L
1
V
S
S
N
C
A
P
7
.
3
,
AAA
PPP
777
...
210
,,,
AA
PP
66
..
76
A
P
6
.
5
A
P
6
.
4
A
P
6
.
3
A
P
6
.
2
A
P
6
.
1
AP
P2
6. .
00
PP
22
..
12
/ ///
C CCC
S SSS
3 210
NC
NC
NC
NC
P0.4
P0.5
P0.6
P0.7
EA
AP5.0
AP5.1
AP5.2
AP5.3
AP5.4
AP5.5
AP5.6
AP5.7
V DD
VSS
ALE
PSEN
P2.7
P2.6
P2.5
P2.4
NC
NC
NC
NC
P2.3
Publication Release Date: March 10, 2010
- 3 - Revision A7



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W78C438C
4. PIN DESCRIPTION
P0.0P0.7 I/O Port 0
These pins function the same as those in the W78C32, except that a multiplexed address/data bus is
not provided during accesses to external memory.
P1.0P1.7 I/O Port 1
Functions are the same as in the W78C32.
P2.0P2.7 I/O Port 2
Functions are the same as in the W78C32, except that an upper address bus is not provided during
accesses to external memory.
P3.0P3.7 I/O Port 3
Functions are the same as in the W78C32.
DP4.0DP4.7 Data/Address Bus
DP4 provides multiplexed low-byte address/data during access to external memory.
AP5.0AP5.7 Address Bus
AP5 outputs the <7:0> address of the external ROM multiplexed with the <7:0> address of the external
data RAM.
AP6.0AP6.7 Address Bus
AP6 outputs the <15:8> address of the external ROM multiplexed with the <15:8> address of the
external data RAM. During the execution of "MOVX @Ri," the output of AP6 comes from the HB
register, which is the page register for the high byte address, and its address is 0A1H.
AP7.0AP7.3 Address Bus/Chip Select Pins
Set bit 7 of the EPMA (Extended Program Memory Address) register to determine the functions of port
7. When this bit is "0" (default value), AP7 allows the external memory data to be accessed by
outputting the <19:16> address of the external memory from bits<3:0> of the EPMA register during the
execution of "MOVC A, @A+DPTR" or "MOVX dest, src." At all other times, AP7<3:0> will output 0H.
When this bit is "1," AP7<3:0> (CS30) are the chip select pins, which support memory-mapped
peripheral device select, and only one pin is active low at any one time. These pins are decoded by
AP6<7:6>. For details, see the table below.
AP6.7
0
0
1
1
AP6.6
0
1
0
1
DESCRIPTION
AP70: low; others: high
AP71: low; others: high
AP72: low; others: high
AP73: low; others: high
-4-



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W78C438C pdf

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