TMP91FY22F Datasheet PDF - Toshiba


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TMP91FY22F
Toshiba

Part Number TMP91FY22F
Description CMOS 16-Bit Microcontroller
Page 22 Pages

TMP91FY22F datasheet pdf
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TOSHIBA Original CMOS 16-Bit Microcontroller
TLCS-900/L1 Series
TMP91FY22



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Preface
Thank you very much for making use of Toshiba microcomputer LSIs.
Before use this LSI, refer the section, “Points of Note and Restrictions”.
Especially, take care below cautions.
**CAUTION**
How to release the HALT mode
Usually, interrupts can release all halts status. However, the interrupts (NMI ,
INT0 to 4, INTRTC) which can release the HALT mode may not be able to do so if
they are input during the period CPU is shifting to the HALT mode (for about 5
clocks of fFPH) with IDLE1 or STOP mode (IDLE2 is not applicable to this case).
(In this case, an interrupt request is kept on hold internally.)
If another interrupt is generated after it has shifted to HALT mode completely,
halt status can be released without difficultly. The priority of this interrupt is
compare with that of the interrupt kept on hold internally, and the interrupt with
higher priority is handled first followed by the other interrupt.



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TMP91FY22
CMOS 16-Bit Microcontrollers
TMP91FY22F
1. Outline and Features
TMP91FY22F is a high-speed 16-bit microcontroller designed for the control of various mid- to
large-scale equipment.
TMP91FY22F comes in a 100-pin flat package.
Listed below are the features.
(1) High-speed 16-bit CPU (900/L1 CPU)
x Instruction mnemonics are upward-compatible with TLCS-90/900
x 16 Mbytes of linear address space
x General-purpose registers and register banks
x 16-bit multiplication and division instructions; bit transfer and arithmetic instructions
x Micro DMA: 4-channels (1.0 Ps/2 bytes at 16 MHz)
(2) Minimum instruction execution time: 148 ns (at 27 MHz)
(3) Built-in RAM: 16 Kbytes
Built-in ROM: 256 Kbytes Flash memory
2 Kbytes mask ROM (used for booting)
(4) External memory expansion
x Expandable up to 16 Mbytes (shared program/data area)
x Can simultaneously support 8-/16-bit width external data bus
• • • Dynamic data bus sizing
(5) 8-bit timers: 8 channels
(6) 16-bit timer/event counter: 2 channels
(7) General-purpose serial interface: 2 channels
UART/ Synchronous mode: 2 channels
IrDA ver1.0 (115.2 kbps) supported
030519EBP1
xThe information contained herein is subject to change without notice.
xThe information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its
use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or
others.
xTOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid
situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to
property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most
recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for
Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
xThe TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunctionor
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control
instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made
at the customer’s own risk.
xThe products described in this document are subject to the foreign exchange and foreign trade laws.
xTOSHIBA products should not be embedded to the downstream products which are prohibited to be produced and sold, under any law
and regulations.
xFor a discussion of how the reliability of microcontrollers can be predicted, please refer to Section 1.3 of the chapter entitled Quality
and Reliability Assurance/Handling Precautions.
Purchase of TOSHIBA I2C components conveys a license under the Philips I2C Patent Rights to use
these components in an I2C system, provided that the system conforms to the I2C Standard
Specification as defined by Philips.
91FY22-1
2003-05-21



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TMP91FY22
(8) Serial bus interface: 1 channel
x I2C bus mode/clock synchronous Select mode
(9) 10-bit AD converter: 8 channels
(10) Watchdog timer
(11) Timer for real-time clock (RTC)
(12) Chip Select/Wait controller: 4 channels
(13) Interrupts: 45 interrupts
x 9 CPU interrupts: Software interrupt instruction and illegal instruction
x 26 internal interrupts:
x 10 external interrupts:
Seven selectable priority levels
(14) Input/Output ports: 81 pins
(15) Standby function
Three HALT modes: IDLE2 (programmable), IDLE1, STOP
(16) Triple-clock controller
x Clock Doubler (DFM)
x Clock Gear (fc to fc/16)
x SLOW mode (fs 32.768 kHz)
(17) Operating voltage
x VCC 2.7 V to 3.6 V (fc max 27 MHz)
(18) Package
x 100-pin QFP: P-QFP100-1414-0.50E
91FY22-2
2003-05-21




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