TMP91C016 Datasheet PDF - Toshiba


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TMP91C016
Toshiba

Part Number TMP91C016
Description CMOS 16-Bit Microcontroller
Page 30 Pages

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TOSHIBA Original CMOS 16-Bit Microcontroller
TLCS-900/L1 Series
TMP91C016
Semiconductor Company



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Preface
Thank you very much for making use of Toshiba microcomputer LSIs.
Before use this LSI, refer the section, “Points of Note and Restrictions”.
Especially, take care below cautions.
**CAUTION**
How to release the HALT mode
Usually, interrupts can release all halts status. However, the interrupts = (NMI ,
INT0 to INT3, INTRTC, INTALM0 to INTALM4, INTKEY, INTVLD0 to INTVLD2),
which can release the HALT mode may not be able to do so if they are input
during the period CPU is shifting to the HALT mode (for about 5 clocks of fFPH)
with IDLE1 or STOP mode (IDLE2 is not applicable to this case). (In this case, an
interrupt request is kept on hold internally.)
If another interrupt is generated after it has shifted to HALT mode completely,
halt status can be released without difficultly. The priority of this interrupt is
compare with that of the interrupt kept on hold internally, and the interrupt with
higher priority is handled first followed by the other interrupt.



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TMP91C016
CMOS 16-Bit Microcontrollers
TMP91C016F/JTMP91C016S
1. Outline and Features
TMP91C016 is a high-speed 16-bit microcontroller designed for the control of various mid- to
large-scale equipment.
TMP91C016F comes in a 100-pin flat package. JTMP91C016S is a 100-pad chip product.
Listed below are the features.
(1) High-speed 16-bit CPU (900/L1 CPU)
Instruction mnemonics are upward compatible with TLCS-90/900
16 Mbytes of linear address space
General-purpose registers and register banks
16-bit multiplication and division instructions; bit transfer and arithmetic instructions
Micro DMA: 4 channels (592ns/ 2bytes at 27MHz)
(2) Minimum instruction execution time: 148 ns (at 27 MHz)
(3) Built-in RAM: None
Built-in ROM: None
91C016-1
2005-07-15



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TMP91C016
(4) External memory expansion
Expandable up to 105 Mbytes (Shared program/data area)
Can simultaneously support 8-/16-bit width external data bus: Dynamic data bus sizing
Separate bus system
(5) 8-bit timers: 4 channels
(6) General-purpose serial interface: 2 channels
Channel 0
UART mode
IrDA Ver.1.0 (115.2 kbps) mode selectable
Channel 1
UART mode
Synchronous mode selectable
(7) LCD controller
Adapt to both Shift register type and Built-in RAM type LCD driver
(8) Timer for real time clock (RTC)
Based on TC8521A
(9) Key-on wakeup (Interrupt key input)
(10) Watchdog timer
(11) Melody/alarm generator
Melody: Output of clock 4 to 5461 Hz
Alarm: Output of the 8 kinds of alarm pattern
Output of the 5 kinds of interval interrupt
(12) Chip select/wait controller: 4 channels
(13) MMU
Expandable up to 105 Mbytes (4 local area/8 bank method)
(14) Display data reciprocal conversion function between the vertical and horizontal (8 × 8)
(15) Interrupts: 40 interrupts
9 CPU interrupts: Software interrupt instruction and illegal instruction
25 internal interrupts: 7 priority levels are selectable
9 external interrupts: 7 priority levels are selectable
(among 4 interrupts are selectable edge mode)
(16) Input/output ports: 31 pins (at External 16-bit data bus memory)
(17) Standby function
Three HALT modes: IDLE2 (Programmable), IDLE1 and STOP
(18) DRAM controller
2CAS mode
(19) Voltage compare circuit: 3 channels
(20) Triple-clock controller
Clock doubler (DFM) circuit is inside
Clock gear function: Select a high-frequency clock fc/1 to fc/16
Slow mode (fs = 32.768 kHz)
91C016-2
2005-07-15




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