GreenChip synchronous rectifier controller
7. Functional description
The TEA1892ATS is the controller for synchronous rectification used in discontinuous
conduction mode and quasi-resonant flyback converters.
7.2 Start-up and UnderVoltage LockOut (UVLO)
The IC leaves the undervoltage lockout state and activates the synchronous rectifier
circuitry when the voltage on the VCC pin is above 8.5 V (typical). When the voltage drops
below 8.0 V (typical), the undervoltage lockout state is entered again and the SR driver
output is actively kept low.
7.3 Synchronous rectification
After a negative voltage lower than Vact(drv) (220 mV typical) is sensed on the SRSENSE
pin, the driver output voltage is driven HIGH. Then the external MOSFET is switched on.
When the SRSENSE voltage rises to Vreg(drv) (42 mV/30 mV) the driver output voltage
is regulated to maintain the Vreg(drv) on the SRSENSE pin. When the SRSENSE voltage is
above the Vdeact(drv) level (12 mV typical), the driver output is pulled to ground.
After switch-on of the SR MOSFET, the input signal on the SRSENSE pin is blanked
during the tact(sr)(min) (0.8 s typical). This action eliminates false switch-off due to high
frequency ringing at the start of the secondary stroke.
When the voltage on the SRSENSE pin is Vreg(drv), the driver output voltage is reduced.
This reduction enables the external power switch to be switched off quickly when the
current through the switch reaches zero. The zero current switch-off removes the need for
a separate Standby mode to maintain high efficiency during the no-load operation. The
zero current is detected by sensing a Vdeact(drv) (12 mV typical) level on the SRSENSE
pin (see Figure 3).
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 April 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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