TEA1708T Datasheet PDF - NXP

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TEA1708T
NXP

Part Number TEA1708T
Description GreenChip X capacitor discharge IC
Page 11 Pages


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TEA1708T
GreenChip X capacitor discharge IC
Rev. 1 — 25 September 2013
Product data sheet
1. General description
The TEA1708 is an automatic discharge IC for X capacitors with a low power consumption
(typically 1 mW at 230 V (AC).
A 500 V clamping circuit is integrated, protecting the IC during mains surges. In a typical
application with only two 200 kresistors, the maximum differential mode mains surge
voltage allowed exceeds 6 kV. A metal oxide varistor is not required to protect the IC.
The X capacitor discharge current is internally limited to 2.3 mA. The discharge delay
timer is set externally using a low voltage capacitor.
The very low power consumption in combination with a large discharge current enables
the use of a large value X capacitor to reduce EMI while retaining the low standby power.
2. Features and benefits
1 mW power consumption at 230 V (AC)
Integrated 500 V clamp; no metal oxide varistor required to protect the IC
Self supplied, no external bias required
Discharge current internally limited
Adjustable discharge delay
Very high differential surge: 6 kV with two 200 kresistors
Easier application design, resolving EMI issues while retaining the efficiency level
3. Applications
All AC connected power supplies with X capacitors > 100 nF requiring a low load
standby power.
4. Ordering information
Table 1. Ordering information
Type number
Package
Name
Description
TEA1708T
SO8
plastic small outline package; 8 leads; body width 3.9 mm
Version
SOT96-1



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5. Block diagram
TEA1708T
GreenChip X capacitor discharge IC
+9
9
9
+9
9
Fig 1. TEA1708T block diagram
6. Pinning information
6.1 Pinning
—$
9
705
705
DDD
QF 
705 
QF 
705 
Fig 2. TEA1708T pinning diagram
 +9
 QF
,&
 QF
 +9
DDD
6.2 Pin description
Table 2.
Symbol
n.c.
TMR2
n.c.
TMR1
HV2
n.c.
n.c.
HV1
Pin description
Pin
1
2
3
4
5
6
7
8
Description
not connected
timer pin 2
not connected
timer pin 1
high-voltage mains connection 2
not connected
not connected
high-voltage mains connection 1
TEA1708T
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 25 September 2013
© NXP B.V. 2013. All rights reserved.
2 of 11



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NXP Semiconductors
TEA1708T
GreenChip X capacitor discharge IC
7. Functional description
The TEA1708 incorporates a timer and a zero-crossing mains voltage detector. If a
positive or negative voltage above the threshold zero-crossing mains voltage (20 V) is
applied between the high-voltage pins, the timer charges the external capacitor on the
TMR1 and TMR2 pins. If the voltage between the TMR1 and TMR2 pins reaches 1.2 V, a
discharge current is activated. If the voltage applied between the high-voltage pins, is
below the threshold zero-crossing mains voltage, the external capacitor is discharged and
the discharging stops. The discharge current is internally limited.
When an AC mains voltage is applied, the timer capacitor is charged between the mains
zero crossings and discharged during the mains zero crossings. When the AC mains is
disconnected and a high voltage remains on the X capacitor, the timer charges the
external capacitor above its discharge activation threshold voltage point (1.2 V), switching
on the internally limited discharge current of the external X capacitor.
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$&0DLQV
705YROWDJH
9
Fig 3. Functional behavior
DDD
To protect the IC during mains surges, a high voltage clamping circuit is integrated. The
clamping circuit is activated for > 500 V positive and negative voltages. The high-voltage
pins HV1 and HV2 are fully symmetrical.
TEA1708T
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 25 September 2013
© NXP B.V. 2013. All rights reserved.
3 of 11



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NXP Semiconductors
TEA1708T
GreenChip X capacitor discharge IC
8. Limiting values
Table 3. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Voltages
VTMR1-TMR2 voltage between pin TMR1 0 A > Idch(tmr) < 10 A
and pin TMR2
0.4
VHV1-HV2
voltage between pin HV1 normal operation, so no
and pin HV2
mains surge
410
Currents
IHV current on pin HV on both HV pins;
15
t < 2 ms, during mains
surge
General
Ptot
Tstg
Tj
ESD
total power dissipation
storage temperature
junction temperature
Tamb < 75 C
-
55
40
VESD
electrostatic discharge
voltage
class 1
human body model;
pins HV1 and HV2
[1] -
human body model;
all other pins
-
charged device
model; all pins
[2] -
Max
+3.5
+410
+15
0.5
+150
+150
1000
4000
750
Unit
V
V
mA
W
C
C
V
V
V
[1] Equivalent to discharging a 100 pF capacitor through a 1.5 kseries resistor.
[2] Equivalent to discharging a 200 pF capacitor through a 0.75 H coil and a 10 resistor.
9. Thermal characteristics
Table 4. Thermal characteristics
Symbol Parameter
Conditions
Typ Unit
Rth(j-a)
thermal resistance from junction in free air; JEDEC test
to ambient
board
160
K/W
Rth(j-c)
thermal resistance from junction in free air; JEDEC test
to case
board
72
K/W
TEA1708T
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 25 September 2013
© NXP B.V. 2013. All rights reserved.
4 of 11



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