TDA9917 Datasheet PDF - NXP

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TDA9917
NXP

Part Number TDA9917
Description up to 250 Msample/s Analog-to-Digital Converter (ADC)
Page 20 Pages


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TDA9917
8-bit, up to 250 Msample/s Analog-to-Digital Converter (ADC)
Rev. 01 — 9 June 2006
Objective data sheet
1. General description
www.DataSheet4U.com
The TDA9917 is a differential, high-speed, 8-bit Analog-to-Digital Converter (ADC)
optimized for telecommunication transmission control systems and tape drive
applications.
The TDA9917 offers the selection between Low-Voltage Differential Signals (LVDS) and
1.8 V Complementary Metal Oxide Semiconductor (CMOS) levels interface for the clock.
The output data interface is 1.8 V CMOS levels. It allows to sample the signal up to
250 Msample/s. All static digital inputs (CLKSEL, CCSSEL, CE_N, OTC, DEL0 and
DEL1) are 1.8 V CMOS compatible. The TDA9917 offers the most possible flexible
acquisition control system thanks to its programmable Complete Conversion Signal (CCS)
that allows to adjust the delay of the acquisition clock and its frequency.
The TDA9917 is released in HTQFP48 package.
2. Features
I 8-bit resolution
I High-speed sampling rate up to 250 Msample/s
I Maximum analog input frequency up to 450 MHz
I Programmable acquisition output clock (complete conversion signal)
I Differential analog input
I Integrated voltage regulator or external control for analog input full-scale
I Integrated voltage regulator for input common-mode reference
I Selectable 1.8 V CMOS or LVDS clock input
I 1.8 V CMOS digital outputs
I 1.8 V CMOS compatible static digital inputs
I Binary or two’s complement CMOS outputs
I Only 2 clock cycles latency
I Industrial temperature range from 40 °C to +85 °C
I HTQFP48 package
3. Applications
I 2.5G and 3G cellular base infrastructure radio transceivers
I Wireless access systems
I Fixed telecommunication
I Optical networking
I Wireless Local Area Network (WLAN) infrastructure



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Philips Semiconductors
TDA9917
8-bit, up to 250 Msample/s Analog-to-Digital Converter (ADC)
I Tape drive
4. Ordering information
Table 1. Ordering information
Type number
Sampling
frequency
TDA9917HW/12/C1 125 Msample/s
TDA9917HW/25/C1 250 Msample/s
Package
Name
HTQFP48
Description
plastic thermal enhanced thin quad flat package;
48 leads; body 7 × 7 × 1 mm; exposed die pad
5. Block diagram
www.DataSheet4U.com
Version
SOT545-2
CLKSEL CLK+ CLK
36 37 38
CLOCK DRIVER
TDA9917
LATCH
39
DEL0
40 DEL1
17 CCS
26 CCSSEL
IN 33
INN 32
TRACK
AND
HOLD
RESISTOR
LADDERS
ADC
CORE
88
LATCH
D0 to D7
21
OTC
U/I
LATCH
20
IR
FSREF
REFERENCE
30
FSREF
Fig 1. Block diagram
CMADC
REFERENCE
29
CMADC
OUTPUTS
ENABLE
19
CE_N
001aab890
TDA9917_1
Objective data sheet
Rev. 01 — 9 June 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
2 of 20



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Philips Semiconductors
6. Pinning information
6.1 Pinning
TDA9917
8-bit, up to 250 Msample/s Analog-to-Digital Converter (ADC)
www.DataSheet4U.com
OGND 1
D3 2
i.c. 3
VCCO1(1V8) 4
D4 5
i.c. 6
OGND2 7
D5 8
i.c. 9
VCCO2(1V8) 10
D6 11
i.c. 12
TDA9917HW
DGND
36 CLKSEL
35 i.c.
34 VCCA1(3V3)
33 IN
32 INN
31 AGND2
30 FSREF
29 CMADC
28 AGND1
27 NC1V8
26 CCSSEL
25 n.c.
001aab891
Fig 2. Pin configuration
6.2 Pin description
Table 2. Pin description
Symbol
Pin Type
OGND1
1
G
D3 2 O
i.c. 3 -
VCCO1(1V8)
D4
4
5
P
O
i.c. 6 -
OGND2
7
G
D5 8 O
i.c. 9 -
VCCO2(1V8)
D6
10
11
P
O
i.c. 12 -
VCCO3(1V8)
D7
13
14
P
O
Description
data output ground 1
data output bit 3
internally connected; leave open
data output supply voltage 1 (1.8 V)
data output bit 4
internally connected; leave open
data output ground 2
data output bit 5
internally connected; leave open
data output supply voltage 2 (1.8 V)
data output bit 6
internally connected; leave open
data output supply voltage 3 (1.8 V)
data output bit 7
TDA9917_1
Objective data sheet
Rev. 01 — 9 June 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
3 of 20



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Philips Semiconductors
TDA9917
8-bit, up to 250 Msample/s Analog-to-Digital Converter (ADC)
www.DataSheet4U.com
Table 2. Pin description …continued
Symbol
Pin Type
Description
i.c. 15 -
internally connected; leave open
OGND3
16 G
data output ground 3
CCS
17 O
complete conversion signal output
i.c. 18 -
internally connected; leave open
CE_N
19 I(CMOS) chip enable input (active LOW)
IR 20 O(CMOS) in-range output
OTC
21 I(CMOS) control input for two’s complement output (active HIGH)
DGND1
22 G
digital ground 1
VCCD1(1V8)
n.c.
23
24
P
-
digital supply voltage 1 (1.8 V)
not connected
n.c. 25 -
not connected
CCSSEL 26 I(CMOS) control input for CCS frequency selection
NC1V8
AGND1
27 I
28 G
not connected or connected to VCCD1(1V8)
analog ground 1
CMADC
29 O
regulator common-mode ADC output
FSREF
30 I
full-scale reference voltage input
AGND2
31 G
analog ground 2
INN 32 I
complementary analog input
IN 33 I
analog input
VCCA1(3V3)
i.c.
34
35
P
-
analog supply voltage 1 (3.3 V)
internally connected; leave open
CLKSEL 36 I(CMOS) control input for input clock selection
CLK+
37 I
clock input
CLK
38 I
complementary clock input
DEL0
39 I(CMOS) complete conversion signal delay input 0
DEL1
40 I(CMOS) complete conversion signal delay input 1
D0 41 O
data output bit 0
i.c. 42 -
internally connected; leave open
VCCO4(1V8)
D1
43
44
P
O
data output supply voltage 4 (1.8 V)
data output bit 1
i.c. 45 -
internally connected; leave open
OGND4
46 G
data output ground 4
D2 47 O
data output bit 2
i.c. 48 -
internally connected; leave open
DGND
-G
digital ground; exposed die pad
TDA9917_1
Objective data sheet
Table 3.
Type
I
O
I(CMOS)
Pin type description
Description
input
output
1.8 V CMOS level input
Rev. 01 — 9 June 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
4 of 20



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