SY89854U Datasheet PDF - Micrel Semiconductor

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SY89854U
Micrel Semiconductor

Part Number SY89854U
Description 1:4 LVPECL Fanout Buffer/Translator
Page 13 Pages


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SY89854U
Precision Low Power 1:4 LVPECL Fanout
Buffer/Translator with Internal Termination
General Description
The SY89854U is a 2.5V/3.3V precision, high-
speed, fully differential 1:4 LVPECL fanout buffer.
Optimized to provide four identical output copies
with less than 20ps of skew and less than 10ps(pp)
total jitter, the SY89854U can process clock signals
as fast as 2GHz.
The differential input includes Micrel’s unique, patent
pending 3-pin input termination architecture that
interfaces to any differential signal (AC or DC-
coupled) as small as 100mV (200mVpp) without any
level shifting or termination resistor networks in the
signal path. For AC-coupled input interface
applications, an on-board output reference voltage
(VREF-AC) is provided to bias the center-tap (VT)
pin. The outputs are 800mV LVPECL, with fast
rise/fall times guaranteed to be less than 180ps.
The SY89854U operates from a 2.5V ±5% supply or
a 3.3V ±10% supply and is guaranteed over the full
industrial temperature range of –40°C to +85°C.
The SY89854U is part of Micrel’s high-speed,
Precision Edge® product line.
All support documentation can be found on Micrel’s
web site at: www.micrel.com.
Typical Applications
200MHz (Q - /Q)
Features
Precision Edge®
Precision 1:4, LVPECL fanout buffer
Low power: 137mW (2.5V typ)
Guaranteed AC performance over temperature
and supply voltage:
– DC- to > 2GHz Clock fMAX
– <340ps tpd
– <180ps tr/tf time
– <20ps max. skew
Ultra-low jitter design:
– <1ps(rms) random jitter
– <10ps(pp) deterministic jitter
– <10ps(pp) total jitter (clock)
Unique patent pending input termination and VT
pin accepts DC-coupled and AC-coupled inputs
(CML, PECL, LVDS)
Typical 800mV (100k) LVPECL output swing
Power supply 2.5V ±5% or 3.3V ±10%
Industrial temperature range –40°C to +85°C
Available in ultra-small (3mm x 3mm) 16-pin
MLF™ package
Applications
SONET and All GigE clock distribution
Fibre Channel clock and data distribution
Backplane distribution
TIME (600ps/dvi.)
Precision Edge is a registered trademark of Micrel, Inc.
MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc.
June 2005
M9999-060905
hbwhelp@micrel.com or (408) 955-1690



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Micrel, Inc.
SY89854U
Ordering Information(1)
Part Number
Package Type
SY89854UMG
MLF-16
SY89854UMGTR(2)
MLF-16
Operating
Range
Industrial
Industrial
Package Marking
854U with Pb-free bar-line indicator
854U with Pb-free bar-line indicator
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals Only.
2. Tape and Reel.
Lead
Finish
Pb-Free
NiPdAu
Pb-Free
NiPdAu
Pin Configuration
16-Pin MLF™ (MLF-16)
Pin Description
Pin Number
1, 4
2
8,13
15, 14
12, 11
10, 9
7, 6
5, 16
3
Pin Name
IN, /IN
VT
VCC
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
GND,
Exposed Pad
VREF-AC
Pin Function
Differential Input: This input pair is the signal to be buffered. These inputs accept
AC- or DC-coupled differential signals as small as 100mV (200mVpp). Each pin
of this pair internally terminates to a VT pin through 50. Note that this input will
default to an indeterminate state if left open. Please refer to the “Input Interface
Applications” section for more details.
Input Termination Center-Tap: Each side of the differential input pair terminates
to this pin. The VT pin provides a center-tap to a termination network for
maximum interface flexibility. See “Input Interface Applications” section for more
details.
Positive Power Supply. Bypass with 0.1µF⎪⎪0.01µF low ESR capacitors as close
to the VCC pin as possible.
Differential 100K LVPECL Output: These LVPECL outputs are the precision, low
skew copies of the input signal. Terminate with 50to VCC–2V. Unused output
pairs may be left floating with no impact on jitter. See “Output Interface
Applications” section.
Ground. Ground pin and exposed pad must be connected to the same ground
plane.
Reference Voltage: This output biases to VCC–1.2V. It is used when AC coupling
the inputs (IN, /IN). Connect VREF-AC to the VT pin. Bypass VREF-AF pin with a
0.01µF low ESR capacitor to VCC. Maximum sink/source capability is 1.5mA. See
“Input Interface Applications” section for more details.
June 2005
2 M9999-060905
hbwhelp@micrel.com or (408) 955-1690



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Micrel, Inc.
Functional Block Diagram
SY89854U
June 2005
3 M9999-060905
hbwhelp@micrel.com or (408) 955-1690



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Micrel, Inc.
Absolute Maximum Ratings(1)
Supply Voltage (VCC) ..........................–0.5V to +4.0V
Input Voltage (VIN) ..................................–0.5V to VCC
LVPECL Output Current (IOUT)
Continuous ................................................. 50mA
Surge........................................................ 100mA
Termination Current(3)
Source or sink current on VT .................... ±50mA
Input Current
Source or sink current on IN, /IN.............. ±50mA
VREF-AC Current(3)
Source or sink current ................................ ±2mA
Lead Temperature (soldering, 20sec.) ...........+260°C
Storage Temperature (Ts)..................–65°C to 150°C
SY89854U
Operating Ratings(2)
Supply Voltage (VCC).................. +2.375V to +2.625V
......................................................+3.0V to +3.6V
APmacbkiaegnet TTehmerpmeraal tRureesi(sTtAa)n.c..e..(.4.)......... –40°C to +85°C
MLF™ (θJA)
Still-Air ..................................................... 60°C/W
MLF™ (ψJB)
Junction-to-Board .................................... 38°C/W
DC Electrical Characteristics (5)
TA = –40°C to +85°C, unless otherwise stated.
Symbol
VCC
Parameter
Power Supply
Condition
Min Typ Max Units
2.375 2.5 2.625 V
3.0 3.3 3.6 V
ICC
RDIFF_IN
Power Supply Current
Differential Input Resistance
(IN, /IN)
No load, max. VCC
55 78 mA
90 100 110
RIN Input Resistance
(IN-to-VT)
VIH Input High Voltage
(IN, /IN)
Note 6
45 50 55
VCC –1.6
VCC
V
VIL Input Low Voltage
(IN, /IN)
0
VIH –0.1
V
VIN Input Voltage Swing
(IN, /IN)
See Figure 1a.
0.1
1.7 V
VDIFF_IN
Differential Input Voltage Swing
(IN, /IN)
See Figure 1b.
0.2
V
VT_IN
IN-to-VT
1.28 V
Notes:
1. Permanent device damage may occur if the Absolute Maximum Ratings are exceeded. This is a stress rating only and functional operation
is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to Absolute Maximum Ratings
conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Due to the limited drive capability use for input of the same package only.
4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. θJA and
ψJB are calculated based on a 4-layer board in still air, unless otherwise stated.
5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
6. VIH (min) not lower than 1.2V
June 2005
4 M9999-060905
hbwhelp@micrel.com or (408) 955-1690



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Micrel Semiconductor
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