STB24NM60N Datasheet PDF - STMicroelectronics


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STB24NM60N
STMicroelectronics

Part Number STB24NM60N
Description Power MOSFET
Page 15 Pages

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STB24NM60N
N-channel 600 V, 0.168 Ω, 17 A MDmesh™ II Power MOSFET
D²PAK
Features
Order codes
STB24NM60N
VDSS
(@Tjmax)
650 V
RDS(on)
max.
< 0.19 Ω
ID
17 A
100% avalanche tested
Low input capacitance and gate charge
Low gate input resistance
Application
Switching applications
Description
These N-channel 600 V Power MOSFET devices
are made using the second generation of
MDmesh™ technology. This revolutionary Power
MOSFET associates a new vertical structure to
the company’s strip layout to yield one of the
world’s lowest on-resistance and gate charge. It is
therefore suitable for the most demanding high
efficiency converter.
3
1
D²PAK
Figure 1. Internal schematic diagram
$
'
Table 1. Device summary
Order codes
STB24NM60N
Marking
24NM60N
3
!-V
Package
D²PAK
Packaging
Tape and reel
February 2011
Doc ID 010008 Rev 1
1/15
www.st.com
15
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Contents
Contents
STB24NM60N
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2/15 Doc ID 010008 Rev 1



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STB24NM60N
1 Electrical ratings
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
Parameter
VGS
ID
ID
IDM (1)
PTOT
dv/dt(2)
Gate- source voltage
Drain current (continuous) at TC = 25 °C
Drain current (continuous) at TC = 100 °C
Drain current (pulsed)
Total dissipation at TC = 25 °C
Peak diode recovery voltage slope
TJ Operating junction temperature
Tstg Storage temperature
1. Pulse width limited by safe operating area.
2. ISD 17 A, di/dt 400 A/µs, peak VDS V(BR)DSS, VDD = 80% V(BR)DSS
Value
± 30
17
11
68
125
15
-55 to 150
Table 3. Thermal data
Symbol
Parameter
Rthj-case Thermal resistance junction-case max.
Rthj-pcb (1) Thermal resistance junction-pcb max.
1. When mounted on 1inch² FR-4 board, 2 oz Cu
Value
1
30
Table 4. Avalanche characteristics
Symbol
Parameter
IAS
Avalanche current, repetitive or not-repetitive
(pulse width limited by TJ max)
Single pulse avalanche energy
EAS (starting TJ = 25 °C, ID = IAS, VDD = 50 V)
Value
6
300
Unit
V
A
A
A
W
V/ns
°C
Unit
°C/W
°C/W
Unit
A
mJ
Doc ID 010008 Rev 1
3/15



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Electrical characteristics
2 Electrical characteristics
STB24NM60N
(Tcase = 25 °C unless otherwise specified)
Table 5. On /off states
Symbol
Parameter
Test conditions
V(BR)DSS
Drain-source
breakdown voltage
ID = 1 mA, VGS = 0
IDSS
IGSS
VGS(th)
RDS(on)
Zero gate voltage
VDS = Max rating
drain current (VGS = 0) VDS = Max rating, TC=125 °C
Gate-body leakage
current (VDS = 0)
VGS = ± 25 V
Gate threshold voltage VDS = VGS, ID = 250 µA
Static drain-source on
resistance
VGS = 10 V, ID = 8 A
Min. Typ. Max. Unit
600 V
1 µA
100 µA
100 nA
2 3 4V
0.168 0.19 Ω
Table 6. Dynamic
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 50 V, f = 1 MHz,
VGS = 0
1400
pF
- 44 - pF
7.4 pF
Coss
(1)
eq.
Equivalent output
capacitance
VDS = 0 to 480 V, VGS = 0
- 190 - pF
Rg Gate input resistance f=1 MHz open drain
- 5 -Ω
Qg Total gate charge
VDD = 480 V, ID = 17 A,
Qgs Gate-source charge VGS = 10 V
Qgd Gate-drain charge
(see Figure 15)
46 nC
- 7 - nC
23 nC
1. Co(eff). is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDS.
4/15 Doc ID 010008 Rev 1




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