SAM7S256 Datasheet PDF - Atmel

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SAM7S256
Atmel

Part Number SAM7S256
Description ARM-based Flash MCU
Page 30 Pages


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AT91SAM
ARM-based Flash MCU
SAM7S512 SAM7S256 SAM7S128 SAM7S64
SAM7S321 SAM7S32 SAM7S161 SAM7S16
Features
Incorporates the ARM7TDMI® ARM® Thumb® Processor
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– EmbeddedICEIn-circuit Emulation, Debug Communication Channel Support
Internal High-speed Flash
– 512 Kbytes (SAM7S512) Organized in Two Contiguous Banks of 1024 Pages of 256
Bytes (Dual Plane)
– 256 Kbytes (SAM7S256) Organized in 1024 Pages of 256 Bytes (Single Plane)
– 128 Kbytes (SAM7S128) Organized in 512 Pages of 256 Bytes (Single Plane)
– 64 Kbytes (SAM7S64) Organized in 512 Pages of 128 Bytes (Single Plane)
– 32 Kbytes (SAM7S321/32) Organized in 256 Pages of 128 Bytes (Single Plane)
– 16 Kbytes (SAM7S161/16) Organized in 256 Pages of 64 Bytes (Single Plane)
– Single Cycle Access at Up to 30 MHz in Worst Case Conditions
– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
– Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms
– 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Flash
Security Bit
– Fast Flash Programming Interface for High Volume Production
Internal High-speed SRAM, Single-cycle Access at Maximum Speed
– 64 Kbytes (SAM7S512/256)
– 32 Kbytes (SAM7S128)
– 16 Kbytes (SAM7S64)
– 8 Kbytes (SAM7S321/32)
– 4 Kbytes (SAM7S161/16)
Memory Controller (MC)
– Embedded Flash Controller, Abort Status and Misalignment Detection
Reset Controller (RSTC)
– Based on Power-on Reset and Low-power Factory-calibrated Brown-out Detector
– Provides External Reset Signal Shaping and Reset Source Status
Clock Generator (CKGR)
– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
Power Management Controller (PMC)
– Software Power Optimization Capabilities, Including Slow Clock Mode (Down to 500
Hz) and Idle Mode
– Three Programmable External Clock Signals
Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Two (SAM7S512/256/128/64/321/161) or One (SAM7S32/16) External Interrupt Source(s)
and One Fast Interrupt Source, Spurious Interrupt Protected
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Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention
– Mode for General Purpose 2-wire UART Serial Communication
Periodic Interval Timer (PIT)
– 20-bit Programmable Counter plus 12-bit Interval Counter
Windowed Watchdog (WDT)
– 12-bit key-protected Programmable Counter
– Provides Reset or Interrupt Signals to the System
– Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
Real-time Timer (RTT)
– 32-bit Free-running Counter with Alarm
– Runs Off the Internal RC Oscillator
One Parallel Input/Output Controller (PIOA)
– Thirty-two (SAM7S512/256/128/64/321/161) or twenty-one (SAM7S32/16) Programmable I/O Lines Multiplexed with up to
Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up resistor and Synchronous Output
Eleven (SAM7S512/256/128/64/321/161) or Nine (SAM7S32/16) Peripheral DMA Controller (PDC) Channels
One USB 2.0 Full Speed (12 Mbits per Second) Device Port (Except for the SAM7S32/16).
– On-chip Transceiver, 328-byte Configurable Integrated FIFOs
One Synchronous Serial Controller (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
Two (SAM7S512/256/128/64/321/161) or One (SAM7S32/16) Universal Synchronous/Asynchronous Receiver Transmitters
(USART)
– Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
– Full Modem Line Support on USART1 (SAM7S512/256/128/64/321/161)
One Master/Slave Serial Peripheral Interface (SPI)
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
One Three-channel 16-bit Timer/Counter (TC)
– Three External Clock Input and Two Multi-purpose I/O Pins per Channel (SAM7S512/256/128/64/321/161)
– One External Clock Input and Two Multi-purpose I/O Pins for the first Two Channels Only (SAM7S32/16)
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
One Four-channel 16-bit PWM Controller (PWMC)
One Two-wire Interface (TWI)
– Master Mode Support Only, All Two-wire Atmel EEPROMs and I2C Compatible Devices Supported
(SAM7S512/256/128/64/321/32)
– Master, Multi-Master and Slave Mode Support, All Two-wire Atmel EEPROMs and I2C Compatible Devices Supported
(SAM7S161/16)
One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os
SAM-BABoot Assistant
– Default Boot program
– Interface with SAM-BA Graphic User Interface
IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins
5V-tolerant I/Os, including Four High-current Drive I/O lines, Up to 16 mA Each (SAM7S161/16 I/Os Not 5V-tolerant)
Power Supplies
– Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components
– 3.3V or 1.8V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply
– 1.8V VDDCORE Core Power Supply with Brown-out Detector
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
2



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Fully Static Operation: Up to 55 MHz at 1.65V and 85°C Worst Case Conditions
Available in 64-lead LQFP Green or 64-pad QFN Green Package (SAM7S512/256/128/64/321/161) and 48-lead LQFP Green or
48-pad QFN Green Package (SAM7S32/16)
1. Description
Atmel’s SAM7S is a series of low pincount Flash microcontrollers based on the 32-bit ARM RISC processor. It fea-
tures a high-speed Flash and an SRAM, a large set of peripherals, including a USB 2.0 device (except for the
SAM7S32 and SAM7S16), and a complete set of system functions minimizing the number of external components.
The device is an ideal migration path for 8-bit microcontroller users looking for additional performance and
extended memory.
The embedded Flash memory can be programmed in-system via the JTAG-ICE interface or via a parallel interface
on a production programmer prior to mounting. Built-in lock bits and a security bit protect the firmware from acci-
dental overwrite and preserves its confidentiality.
The SAM7S Series system controller includes a reset controller capable of managing the power-on sequence of
the microcontroller and the complete system. Correct device operation can be monitored by a built-in brownout
detector and a watchdog running off an integrated RC oscillator.
The SAM7S Series are general-purpose microcontrollers. Their integrated USB Device port makes them ideal devices
for peripheral applications requiring connectivity to a PC or cellular phone. Their aggressive price point and high level of
integration pushes their scope of use far into the cost-sensitive, high-volume consumer market.
1.1 Configuration Summary of the SAM7S512, SAM7S256, SAM7S128, SAM7S64, SAM7S321,
SAM7S32, SAM7S161 and SAM7S16
The SAM7S512, SAM7S256, SAM7S128, SAM7S64, SAM7S321, SAM7S32, SAM7S161 and SAM7S16 differ in
memory size, peripheral set and package. Table 1-1 summarizes the configuration of the six devices.
Except for the SAM7S32/16, all other SAM7S devices are package and pinout compatible.
Table 1-1. Configuration Summary
Device
Flash
Flash TWI Organization SRAM
USB
External
Device
Interrupt PDC
TC
I/O 5V I/O
Port USART Source Channels Channels Tolerant Lines
SAM7S512
512 Kbytes Master dual plane 64 Kbytes 1
2(1) (2) 2
11 3
Yes 32
SAM7S256
256 Kbytes Master single plane 64 Kbytes 1
2(1) (2) 2
11 3
Yes 32
SAM7S128
128 Kbytes Master single plane 32 Kbytes 1
2(1) (2) 2
11 3
Yes 32
SAM7S64
64 Kbytes Master single plane 16 Kbytes 1
2(2) 2
11 3
Yes 32
SAM7S321
32 Kbytes Master single plane 8 Kbytes 1
2(2)
SAM7S32
32 Kbytes Master
single plane
8 Kbytes
not
present
1
SAM7S161
16 Kbytes
Master/
Slave
single plane 4 Kbytes 1
2(2)
SAM7S16
16 Kbytes
Master/
Slave
single plane
4 Kbytes
not
present
1
Notes: 1. Fractional Baud Rate.
2. Full modem line support on USART1.
3. Only two TC channels are accessible through the PIO.
2
1
2
1
11 3
Yes 32
9 3(3) Yes 21
11 3
No 32
9 3(3) No 21
Package
LQFP/
QFN 64
LQFP/
QFN 64
LQFP/
QFN 64
LQFP/
QFN 64
LQFP/
QFN 64
LQFP/
QFN 48
LQFP
LQFP/
QFN 48
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
3



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2. Block Diagram
Figure 2-1. SAM7S512/256/128/64/321/161 Block Diagram
TDI
TDO
TMS
TCK
JTAGSEL
TST
FIQ
IRQ0-IRQ1
PCK0-PCK2
PLLRC
XIN
XOUT
VDDCORE
VDDCORE
NRST
DRXD
DTXD
RXD0
TXD0
SCK0
RTS0
CTS0
RXD1
TXD1
SCK1
RTS1
CTS1
DCD1
DSR1
DTR1
RI1
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
ADTRG
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
ADVREF
JTAG
SCAN
ICE
System Controller
ARM7TDMI
Processor
1.8 V
Voltage
Regulator
AIC
PLL
OSC
PMC
RCOSC
BOD
POR
Reset
Controller
PIT
WDT
RTT
PDC
DBGU
PDC
PIOA
Memory Controller
Embedded
Flash
Controller
Address
Decoder
Abort
Status
Misalignment
Detection
Peripheral Bridge
Peripheral Data
Controller
11 Channels
APB
SRAM
64/32/16/8/4 Kbytes
Flash
512/256/
128/64/32/16 Kbytes
ROM
Fast Flash
Programming
Interface
SAM-BA
FIFO
USB Device
PDC
USART0
PDC
PDC
USART1
PDC
PDC
SPI
PDC
PDC
PWMC
PDC
SSC
PDC
Timer Counter
TC0
TC1
TC2
TWI
ADC
VDDIN
GND
VDDOUT
VDDCORE
VDDIO
VDDFLASH
ERASE
PGMRDY
PGMNVALID
PGMNOE
PGMCK
PGMM0-PGMM3
PGMD0-PGMD15
PGMNCMD
PGMEN0-PGMEN2
DDM
DDP
PWM0
PWM1
PWM2
PWM3
TF
TK
TD
RD
RK
RF
TCLK0
TCLK1
TCLK2
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
TWD
TWCK
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
4



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SAM7S256 ARM-based Flash MCU SAM7S256
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