PEMD3 Datasheet PDF - NXP Semiconductors


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PEMD3
NXP Semiconductors

Part Number PEMD3
Description NPN/PNP resistor-equipped transistors
Page 11 Pages

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PEMD3; PIMD3; PUMD3 www.DataSheet4U.com
NPN/PNP resistor-equipped transistors;
R1 = 10 kΩ, R2 = 10 kΩ
Rev. 10 — 15 November 2009
Product data sheet
1. Product profile
1.1 General description
NPN/PNP Resistor-Equipped Transistors (RET).
Table 1. Product overview
Type number
Package
NXP
PEMD3
SOT666
PIMD3
SOT457
PUMD3
SOT363
JEITA
-
SC-74
SC-88
PNP/PNP
complement
PEMB11
-
PUMB11
NPN/NPN
complement
PEMH11
-
PUMH11
1.2 Features
„ Built-in bias resistors
„ Simplifies circuit design
„ Reduces component count
„ Reduces pick and place costs
1.3 Applications
„ Low current peripheral driver
„ Control of IC inputs
„ Replaces general-purpose transistors in digital applications
1.4 Quick reference data
Table 2.
Symbol
VCEO
IO
R1
R2/R1
Quick reference data
Parameter
collector-emitter voltage
output current (DC)
bias resistor 1 (input)
bias resistor ratio
Conditions
open base
Min Typ Max Unit
- - 50 V
- - 100 mA
7 10 13 kΩ
0.8 1
1.2



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NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ
2. Pinning information
Table 3.
Pin
1
2
3
4
5
6
Pinning
Description
GND (emitter) TR1
input (base) TR1
output (collector) TR2
GND (emitter) TR2
input (base) TR2
output (collector) TR1
Simplified outline Symbol
654
65
4
123
001aab555
R1
TR1
R2
R2
TR2
R1
1 23
006aaa143
3. Ordering information
Table 4. Ordering information
Type number Package
Name Description
PEMD3
-
plastic surface mounted package; 6 leads
PIMD3
SC-74 plastic surface mounted package; 6 leads
PUMD3
SC-88 plastic surface mounted package; 6 leads
4. Marking
Table 5. Marking codes
Type number
PEMD3
PIMD3
PUMD3
[1] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
Marking code[1]
D3
M7
D*3
Version
SOT666
SOT457
SOT363
PEMD3_PIMD3_PUMD3_10
Product data sheet
Rev. 10 — 15 November 2009
© NXP B.V. 2009. All rights reserved.
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PEMD3; PIMD3;w PUMD3w w . D a t a S h e e t 4 U . c
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ
5. Limiting values
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Per transistor; for the PNP transistor with negative polarity
VCBO
VCEO
VEBO
VI
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage TR1
positive
open emitter
open base
open collector
-
-
-
-
negative
-
input voltage TR2
positive
-
negative
-
IO output current (DC)
-
ICM peak collector current
-
Ptot
total power dissipation
Tamb 25 °C
SOT363
[1] -
SOT457
[2] -
SOT666
[1][3] -
Tstg
Tj
Tamb
Per device
storage temperature
junction temperature
ambient temperature
65
-
65
Ptot
total power dissipation
Tamb 25 °C
SOT363
[1] -
SOT457
[2] -
SOT666
[1][3] -
Max Unit
50 V
50 V
10 V
+40 V
10 V
+10 V
40 V
100 mA
100 mA
200
300
200
+150
150
+150
mW
mW
mW
°C
°C
°C
300 mW
600 mW
300 mW
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2] Device mounted on an FR4 PCB with 65 μm copper strip line, standard footprint.
[3] Reflow soldering is the only recommended soldering method.
PEMD3_PIMD3_PUMD3_10
Product data sheet
Rev. 10 — 15 November 2009
© NXP B.V. 2009. All rights reserved.
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NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ
6. Thermal characteristics
Table 7. Thermal characteristics
Symbol Parameter
Conditions
Per transistor
Rth(j-a)
thermal resistance from in free air
junction to ambient
SOT363
SOT457
SOT666
Per device
Rth(j-a)
thermal resistance from in free air
junction to ambient
SOT363
SOT457
SOT666
Min Typ Max
[1] - - 625
[2] - - 417
[1][3] - - 625
[1] - - 416
[2] - - 208
[1][3] - - 416
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB with 65 μm copper strip line, standard footprint.
[3] Reflow soldering is the only recommended soldering method.
Unit
K/W
K/W
K/W
K/W
K/W
K/W
7. Characteristics
Table 8. Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min Typ Max Unit
Per transistor; for the PNP transistor with negative polarity
ICBO
collector-base cut-off VCB = 50 V; IE = 0 A
current
- - 100 nA
ICEO
IEBO
collector-emitter
cut-off current
emitter-base cut-off
current
VCE = 30 V; IB = 0 A
VCE = 30 V; IB = 0 A;
Tj = 150 °C
VEB = 5 V; IC = 0 A
- - 1 μA
- - 50 μA
- - 400 μA
hFE
VCEsat
DC current gain
collector-emitter
saturation voltage
VCE = 5 V; IC = 5 mA
IC = 10 mA; IB = 0.5 mA
30 -
--
-
150 mV
VI(off)
VI(on)
R1
off-state input voltage VCE = 5 V; IC = 100 μA
on-state input voltage VCE = 0.3 V; IC = 10 mA
bias resistor 1 (input)
- 1.1 0.8 V
2.5 1.8 -
V
7 10 13 kΩ
R2/R1 bias resistor ratio
0.8 1
1.2
Cc collector capacitance VCB = 10 V; IE = ie = 0 A; - - -
f = 1 MHz
TR1 (NPN)
- - 2.5 pF
TR2 (PNP)
- - 3 pF
PEMD3_PIMD3_PUMD3_10
Product data sheet
Rev. 10 — 15 November 2009
© NXP B.V. 2009. All rights reserved.
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