PCF8564A Datasheet PDF - NXP Semiconductors


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PCF8564A
NXP Semiconductors

Part Number PCF8564A
Description Real time clock and calendar
Page 30 Pages

PCF8564A datasheet pdf
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PCF8564A
Real time clock and calendar
Rev. 3 — 26 August 2013
Product data sheet
1. General description
The PCF8564A is a CMOS1 real-time clock and calendar optimized for low power
consumption. A programmable clock output, interrupt output and voltage low detector are
also provided. All addresses and data are transferred serially via the two-line bidirectional
I2C-bus. Maximum bus speed is 400 kbit/s. The built-in word address register is
incremented automatically after each written or read data byte.
2. Features and benefits
Provides year, month, day, weekday, hours, minutes, and seconds based on a
32.768 kHz quartz crystal
Wide clock operating voltage: 1.0 V to 5.5 V
Low back-up current typical 250 nA at 3.0 V and 25 C
400 kHz two-wire I2C interface (1.8 V to 5.5 V)
Low-voltage detector
Alarm and timer functions
Two integrated oscillator capacitors
Programmable clock output for peripheral devices (32.768 kHz, 1.024 kHz, 32 Hz, and
1 Hz)
Internal Power-On Reset (POR)
I2C slave address: read A3h, write A2h
3. Applications
Timing devices
Time of the day tracking
Process timing
Alarm
Portable instruments
Electronic metering
Battery powered products
1. The definition of the abbreviations and acronyms used in this data sheet can be found in Section 20.



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NXP Semiconductors
PCF8564A
Real time clock and calendar
4. Ordering information
Table 1. Ordering information
Type number
Package
Name
PCF8564AU
bare die
PCF8564AUG
bare die
Description
wire bond die; 9 bonding pads
9 bumps
Version
PCF8564AU
PCF8564AUG
4.1 Ordering options
Table 2. Ordering options
Product type number
Sales item (12NC) Orderable part number
PCF8564AU/10AB/1
PCF8564AU/5BB/1
PCF8564AU/5GB/1
PCF8564AU/5GC/1
PCF8564AUG/12HB/1
935289478005
935289319015
935289477015
935293569015
935301011005
PCF8564AU/10AB/1,0
PCF8564AU/5BB/1,01
PCF8564AU/5GB/1,01
PCF8564AU/5GC/1,01
PCF8564AUG/12HB/1V
IC
revision
1
1
1
1
1
Delivery form
wafer, sawn, on FFC
unsawn wafer
unsawn wafer
unsawn wafer
wafer, sawn, on 8 inch metal
FFC; chips with soft bumps[1]
[1] Bump hardness, see Table 36.
5. Marking
Table 3. Marking codes
Type number
PCF8564AU
PCF8564AUG
Marking code
PC8564A-1
PC8564A-1
PCF8564A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 26 August 2013
© NXP B.V. 2013. All rights reserved.
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6. Block diagram
26&,
26&2
9''
966
6'$
6&/
26&,//$725 ',9,'(5
N+]
021,725
32:(521
5(6(7
:$7&+
'2*
,&
,17(5)$&(
3&)$
&21752/
K &RQWUROB
K &RQWUROB
'K &/.287BFWUO
7,0(
K 6HFRQGV
K 0LQXWHV
K +RXUV
K 'D\V
K :HHNGD\V
K 0RQWKV
K <HDUV
$/$50)81&7,21
K 0LQXWHBDODUP
$K +RXUBDODUP
%K 'D\BDODUP
&K :HHNGD\BDODUP
7,0(5)81&7,21
(K 7LPHUBFWUO
)K 7LPHU
Fig 1. Block diagram of PCF8564A
PCF8564A
Real time clock and calendar
&/2&.287
&/.2(
&/.287
,17(55837
,17
DDK
PCF8564A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 26 August 2013
© NXP B.V. 2013. All rights reserved.
3 of 48



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7. Pinning information
7.1 Pinning
PCF8564A
Real time clock and calendar
26&, 
26&2 
,17 
966 
\

[
3&)$
 &/.2(
 9''
 &/.287
 6&/
 6'$
DDD
Viewed from active side. For mechanical details, see Figure 27 and Figure 28.
Fig 2. Pinning diagram of PCF8564A
7.2 Pin description
Table 4. Pin description
Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified.
Symbol
Pin Description
OSCI
1 oscillator input
OSCO
2 oscillator output
INT 3 interrupt output, open-drain, active LOW
VSS
SDA
4 ground[1]
5 serial data input and output
SCL 6 serial clock input
CLKOUT
7
clock output, push-pull
VDD 8 supply voltage
CLKOE 9 CLKOUT enable input
[1] The substrate (rear side of the die) is at VSS potential and must not be connected.
PCF8564A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 26 August 2013
© NXP B.V. 2013. All rights reserved.
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