PCF2120 Datasheet PDF - NXP Semiconductors


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PCF2120
NXP Semiconductors

Part Number PCF2120
Description Quartz oscillator
Page 14 Pages

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PCF2120
Quartz oscillator
Rev. 01 — 5 February 2008
www.DataSheet4U.com
Product data sheet
1. General description
The PCF2120 is a CMOS quartz oscillator optimized for low power consumption.
The 32 kHz output signal is gated using an enable signal.
2. Features
I Clock operating voltage: 1.5 V to 5.5 V
I Low backup current: typical 0.85 µA at VDD = 3.0 V and Tamb = 25 °C
I 32.768 kHz output for peripheral devices
I Two integrated oscillator capacitors
I Push-pull output
I Internal power-on reset
3. Applications
I Portable instruments
I Industrial products
I Battery powered products
4. Quick reference data
Table 1. Quick reference data
Symbol Parameter
Conditions
Min Typ Max Unit
VDD supply voltage
[1] 1.5 -
5.5 V
IDD supply current
clock output disabled
VDD = 2.0 V; Tamb = 25 °C
- 210 450 nA
VDD = 3.0 V;
Tamb = 40 °C to +85 °C
- 265 650 nA
clock output enabled at 32 kHz
VDD = 2.0 V; Tamb = 25 °C
- 615 900 nA
VDD = 3.0 V;
Tamb = 40 °C to +85 °C
Tstg storage temperature
- 875 1100 nA
65 -
+150 °C
[1] For reliable oscillator start-up at power-up: VDD > VDD(min) + 0.3 V.



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PCF2120
Quartz oscillator
5. Ordering information
Table 2. Ordering information
Type
number
Package
Name
Description
Version
PCF2120TK HVSON10 plastic thermal enhanced very thin small outline
SOT650-1
package; no leads; 10 terminals; body 3 × 3 × 0.85 mm
PCF2120U[1] -
wire bond die; 7 bonding pads; 0.57 × 1.1 × 0.2 mm PCF2120U
[1] Packing method: sawn wafer on Film Frame Carrier (FFC).
6. Block diagram
PCF2120
OSCO 3
OSCI 2
CL(itg)
7
TEST
5
VSS
Pin numbers shown for HSVON10 package.
Fig 1. Block diagram
7. Pinning information
7.1 Pinning
10 CLKOE
8 CLKOUT
1, 4, 6
n.c.
9
VDD
001aaf631
terminal 1
index area
n.c. 1
OSCI 2
OSCO 3
n.c. 4
VSS 5
PCF2120TK
10 CLKOE
9 VDD
8 CLKOUT
7 TEST
6 n.c.
001aaf628
Transparent top view
Fig 2. Pin configuration HVSON10
package
PCF2120U
OSCI 1
OSCO 2
VSS 3
7 CLKOE
6 VDD
5 CLKOUT
4 TEST
001aah559
Fig 3. Pad configuration wire bond die
PCF2120_1
Product data sheet
Rev. 01 — 5 February 2008
© NXP B.V. 2008. All rights reserved.
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PCF2120
Quartz oscillator
7.2 Pin description
Table 3.
Symbol
n.c.
OSCI
OSCO
n.c.
VSS
n.c.
TEST
CLKOUT
VDD
CLKOE
Pin description
Pin Pad
Description
HVSON10 Wire bond die
1-
not connected
21
oscillator input
32
oscillator output
4-
not connected
53
ground
6-
not connected
74
test pin
85
clock output (push-pull)
96
supply voltage
10 7
clock output enable input
8. Functional description
The 32 kHz quartz oscillator is optimized for directly connecting to a 32 kHz tuning fork
quartz crystal. No additional tuning capacitors are required. Laser tuning of the quartz or
quartz selection for matching is used to tune the oscillator if required.
A digital 32 kHz signal is available on pin CLKOUT. The signal on pin CLKOE is used to
gate and synchronize the 32 kHz CLKOUT signal. Pin CLKOUT is a CMOS push-pull
output. If disabled, it goes to LOW level.
(1)
OSCO-
internal
32 kHz
CLKOE
CLKOUT
001aaf633
(1) OSCO-internal 32 kHz signal: internal signal after the Schmitt trigger connected to pin OSCO.
Fig 4. CLKOUT output signal
PCF2120_1
Product data sheet
Rev. 01 — 5 February 2008
© NXP B.V. 2008. All rights reserved.
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9. Internal circuitry
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PCF2120
Quartz oscillator
PCF2120
1
OSCI
2
OSCO
7
CLKOE
6 VDD
5
CLKOUT
VSS 3
Pin numbers shown for HSVON10 package.
Fig 5. Device diode protection diagram
4 TEST
001aaf634
10. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
VDD supply voltage
0.5
IDD supply current
50
VI input voltage
0.5
VO output voltage
0.5
II input current
at any input
10
IO output current
at any output
10
Ptot total power dissipation
-
Tstg storage temperature
65
Vesd electrostatic discharge voltage HBM
[1] -
MM [2] -
CDM
[3] -
Ilu latch-up current
[4] -
[1] Human Body Model (HBM) according to JESD22-A114.
[2] Machine Model (MM) according to JESD22-A115.
[3] Charged-Device Model (CDM) according to JESD22-C101.
[4] Latch-up testing according to JESD78.
Max
+6.5
+50
+6.5
+6.5
+10
+10
300
+150
±2000
±200
±2000
100
Unit
V
mA
V
V
mA
mA
mW
°C
V
V
V
mA
PCF2120_1
Product data sheet
Rev. 01 — 5 February 2008
© NXP B.V. 2008. All rights reserved.
4 of 14




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