N79E855 Datasheet PDF - Nuvoton

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N79E855
Nuvoton

Part Number N79E855
Description 8051-based Microcontroller
Page 30 Pages


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Nuvoton 8051-based Microcontroller
N79E855
N79E854
Data Sheet
Version: A2.5



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N79E855/854 Data Sheet
Table of Contents
1 GENERAL DESCRIPTION................................................................................................................................... 5
2 FEATURES ............................................................................................................................................................ 6
3 PARTS INFORMATION LIST.............................................................................................................................. 8
4 BLOCK DIAGRAM............................................................................................................................................... 9
5 PIN CONFIGURATION ...................................................................................................................................... 10
6 MEMORY ORGANIZATION ............................................................................................................................. 13
6.1 APROM Flash Memory .......................................................................................................................... 13
6.2 LDROM Flash Memory .......................................................................................................................... 14
6.3 CONFIG-bits........................................................................................................................................... 14
6.4 On-chip Non-volatile Data Flash ............................................................................................................ 14
6.5 On-chip XRAM....................................................................................................................................... 16
6.6 On-chip scratch-pad RAM and SFR ....................................................................................................... 16
6.7 Working Registers................................................................................................................................... 17
6.8 Bit-addressable Locations ....................................................................................................................... 17
6.9 Stack........................................................................................................................................................ 18
7 SPECIAL FUNCTION REGISTER (SFR) .......................................................................................................... 19
8 GENERAL 80C51 SYSTEM CONTROL............................................................................................................ 23
9 I/O PORT STRUCTURE AND OPERATION .................................................................................................... 27
9.1 Quasi-Bidirectional Output Configuration .............................................................................................. 27
9.1.1 Read-Modify-Write .................................................................................................................... 28
9.2 Open Drain Output Configuration........................................................................................................... 29
9.3 Push-Pull Output Configuration.............................................................................................................. 29
9.4 Input Only Configuration ........................................................................................................................ 30
10 TIMERS/COUNTERS ......................................................................................................................................... 34
10.1 Timers/Counters 0 and 1 ......................................................................................................................... 34
10.1.1 Mode 0 (13-bit Timer) .............................................................................................................. 38
10.1.2 Mode 1 (16-bit Timer) .............................................................................................................. 38
10.1.3 Mode 2 (8-bit Auto-Reload Timer) .......................................................................................... 39
10.1.4 Mode 3 (Two Separate 8-bit Timers) ....................................................................................... 39
10.2 Timer/Counter 2 ...................................................................................................................................... 41
10.2.1 Input Capture Mode.................................................................................................................. 43
10.2.2 Auto-reload Mode .................................................................................................................... 47
10.2.3 Compare Mode ......................................................................................................................... 48
11 WATCHDOG TIMER (WDT) ............................................................................................................................. 49
11.1 Functional Description ............................................................................................................................ 49
11.2 Applications of Watchdog Timer Reset .................................................................................................. 52
11.3 Applications of Watchdog Timer Interrupt ............................................................................................. 53
12 SERIAL PORT (UART)....................................................................................................................................... 55
12.1 Mode 0 .................................................................................................................................................... 57
12.2 Mode 1 .................................................................................................................................................... 59
12.3 Mode 2 .................................................................................................................................................... 61
12.4 Mode 3 .................................................................................................................................................... 63
12.5 Baud Rates .............................................................................................................................................. 65
12.6 Framing Error Detection ......................................................................................................................... 66
12.7 Multiprocessor Communication .............................................................................................................. 66
12.8 Automatic Address Recognition ............................................................................................................. 67
13 SERIAL PERIPHERAL INTERFACE (SPI) ....................................................................................................... 70
13.1 Features ................................................................................................................................................... 70
April 23, 2014
Page 2 of 180
Revision A2.5



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N79E855/854 Data Sheet
13.2
13.3
13.4
13.5
13.6
13.7
13.8
13.9
13.10
Functional Description ............................................................................................................................ 70
SPI Control Registers .............................................................................................................................. 72
Operating Modes ..................................................................................................................................... 76
13.4.1 Master Mode............................................................................................................................. 76
13.4.2 Slave Mode............................................................................................................................... 76
Clock Formats and Data Transfer ........................................................................................................... 77
Slave Select Pin Configuration................................................................................................................ 79
Mode Fault Detection.............................................................................................................................. 79
Write Collision Error............................................................................................................................... 80
Overrun Error .......................................................................................................................................... 80
SPI Interrupts.......................................................................................................................................... 81
14 KEYBOARD INTERRUPT (KBI)....................................................................................................................... 83
15 ANALOG-TO-DIGITAL CONVERTER (ADC) ................................................................................................ 87
16 INTER-INTEGRATED CIRCUIT (I2C) .............................................................................................................. 93
16.1 Features ................................................................................................................................................... 93
16.2 Functional Description ............................................................................................................................ 93
16.2.1 START and STOP Conditions.................................................................................................. 94
16.2.2 7-bit Address with Data Format ............................................................................................... 95
16.2.3 Acknowledge............................................................................................................................ 96
16.2.4 Arbitration ................................................................................................................................ 97
16.3 Control Registers of I2C .......................................................................................................................... 98
16.4 Operation Modes................................................................................................................................... 101
16.4.1 Master Transmitter Mode ....................................................................................................... 101
16.4.2 Master Receiver Mode............................................................................................................ 102
16.4.3 Slave Receiver Mode.............................................................................................................. 103
16.4.4 Slave Transmitter Mode ......................................................................................................... 104
16.4.5 General Call............................................................................................................................ 105
16.4.6 Miscellaneous States............................................................................................................... 106
16.5 Typical Structure of I2C Interrupt Service Routine ............................................................................... 107
16.6 I2C Time-out.......................................................................................................................................... 110
16.7 I2C Interrupts ......................................................................................................................................... 111
17 PULSE WIDTH MODULATED (PWM) .......................................................................................................... 112
17.1 Features ................................................................................................................................................. 112
17.2 Functional Description .......................................................................................................................... 112
18 TIMED ACCESS PROTECTION(TA) .............................................................................................................. 122
19 INTERRUPT SYSTEM...................................................................................................................................... 124
19.1 Interrupt Sources ................................................................................................................................... 124
19.2 Priority Level Structure......................................................................................................................... 126
19.3 Interrupt Response Time ....................................................................................................................... 129
19.4 SFR of Interrupt .................................................................................................................................... 129
20 IN SYSTEM PROGRAMMING (ISP)............................................................................................................... 135
20.1 ISP Procedure........................................................................................................................................ 135
20.2 ISP Command Table ............................................................................................................................. 139
20.3 Access Table of ISP Programming ....................................................................................................... 140
20.4 ISP User Guide...................................................................................................................................... 140
20.5 ISP Demo Code..................................................................................................................................... 141
21 POWER MANAGEMENT................................................................................................................................. 144
21.1 Idle Mode .............................................................................................................................................. 144
21.2 Power-down Mode ................................................................................................................................ 145
22 CLOCK SYSTEM .............................................................................................................................................. 147
April 23, 2014
Page 3 of 180
Revision A2.5



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N79E855/854 Data Sheet
22.1 On-Chip RC Oscillator.......................................................................................................................... 149
22.2 Crystal/Resonator .................................................................................................................................. 149
23 POWER MONITORING.................................................................................................................................... 150
23.1 Power-on Detection............................................................................................................................... 150
23.2 Brown-out Detection ............................................................................................................................. 150
24 RESET CONDITIONS....................................................................................................................................... 153
24.1 Power-on Reset ..................................................................................................................................... 153
24.2 BOD Reset ............................................................................................................................................ 154
24.3 RST Pin Reset ....................................................................................................................................... 155
24.4 Watchdog Timer Reset.......................................................................................................................... 155
24.5 Software Reset ...................................................................................................................................... 156
24.6 Boot Selection ....................................................................................................................................... 157
24.7 Reset State............................................................................................................................................. 158
25 CONFIG BITS (CONFIG) ................................................................................................................................. 160
25.1 CONFIG0.............................................................................................................................................. 160
25.2 CONFIG1 (N79E855 Only) .................................................................................................................. 161
25.3 CONFIG2.............................................................................................................................................. 162
25.4 CONFIG3.............................................................................................................................................. 163
26 INSTRUCTION SETS ....................................................................................................................................... 165
27 IN-CIRCUIT PROGRAM (ICP) ........................................................................................................................ 169
28 ELECTRICAL CHARACTERISTICS............................................................................................................... 171
28.1 Absolute Maximum Ratings.................................................................................................................. 171
28.2 DC Electrical Characteristics ................................................................................................................ 171
28.3 AC Electrical Characteristics ................................................................................................................ 175
28.3.1 Specification of 10-bits SAR-ADC ........................................................................................ 175
28.3.2 4 ~ 24 MHz XTAL Specifications.......................................................................................... 176
28.3.3 Internal RC Oscillator Specifications 22.1184 MHz/11.0592 MHz .................................. 176
28.3.4 Internal RC Oscillator Specifications 10 kHz.................................................................... 177
29 APPLICATION CIRCUIT FOR EMC IMMUNITY ......................................................................................... 178
30 PACKAGE DIMENSIONS ................................................................................................................................ 179
30.1 28-pin TSSOP - 4.4X9.7 mm ................................................................................................................ 179
31 REVISION HISTORY ....................................................................................................................................... 180
April 23, 2014
Page 4 of 180
Revision A2.5



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