N01L83W2A Datasheet PDF - ON Semiconductor

www.Datasheet-PDF.com

N01L83W2A
ON Semiconductor

Part Number N01L83W2A
Description 1Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 8 bit
Page 10 Pages


N01L83W2A datasheet pdf
Download PDF
N01L83W2A pdf
View PDF for Mobile

No Preview Available !

N01L83W2Awww.DataSheet4U.com
1Mb Ultra-Low Power Asynchronous CMOS SRAM
128K × 8 bit
Overview
The N01L83W2A is an integrated memory device
containing a 1 Mbit Static Random Access Memory
organized as 131,072 words by 8 bits. The device
is designed and fabricated using ON
Semiconductor’s advanced CMOS technology to
provide both high-speed performance and ultra-low
power. The device operates with two chip enable
(CE1 and CE2) controls and output enable (OE) to
allow for easy memory expansion. The
N01L83W2A is optimal for various applications
where low-power is critical such as battery backup
and hand-held devices. The device can operate
over a very wide temperature range of -40oC to
+85oC and is available in JEDEC standard
packages compatible with other standard 128Kb x
8 SRAMs.
Features
• Single Wide Power Supply Range
2.3 to 3.6 Volts
• Very low standby current
2.0µA at 3.0V (Typical)
• Very low operating current
2.0mA at 3.0V and 1µs (Typical)
• Very low Page Mode operating current
0.8mA at 3.0V and 1µs (Typical)
• Simple memory control
Dual Chip Enables (CE1and CE2)
Output Enable (OE) for memory expansion
• Low voltage data retention
Vcc = 1.8V
• Very fast output enable access time
30ns OE access time
• Automatic power down to standby mode
• TTL compatible three-state output driver
Product Family
Part Number
N01L83W2AT
N01L83W2AN
N01L83W2AT2
N01L83W2AN2
Package Type
Operating
Temperature
Power
Supply
(Vcc)
Speed
Standby
Operating
Current (ISB), Current (Icc),
Typical
Typical
32 - TSOP I
32 - STSOP I
32 -TSOP I Green
-40oC to +85oC
2.3V - 3.6V
55ns @ 2.7V
70ns @ 2.3V
2 µA
2 mA @ 1MHz
32 - STSOP I Green
Pin Configuration
Pin Descriptions
A11
A9
A8
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32-Pin
STSOP-I
TSOP-I
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
VSS
I/O2
I/O1
I/O0
A0
A1
A2
A3
Pin Name
A0-A16
WE
CE1, CE2
OE
I/O0-I/O7
VCC
VSS
NC
Pin Function
Address Inputs
Write Enable Input
Chip Enable Input
Output Enable Input
Data Inputs/Outputs
Power
Ground
Not Connected
©2008 SCILLC. All rights reserved.
July 2008 - Rev. 10
Publication Order Number:
N01L83W2A/D



No Preview Available !

N01L83W2A
Functional Block Diagram
Address
IAn0p-utAs3
Word
Address
Decode
Logic
Address
Inputs
A4 - A16
Page
Address
Decode
Logic
8K Page
x 16 word
x 8 bit
RAM Array
CE1
CE2
WE
OE
Control
Logic
www.DataSheet4U.com
Input/
Output
Mux
and
Buffers
I/O0 - I/O7
Functional Description
CE1 CE2 WE
OE
I/O0 - I/O7
MODE
POWER
HXXX
XLXX
L H L X2
High Z
High Z
Data In
Standby1
Standby1
Write2
Standby
Standby
Active
L HH L
L HHH
Data Out
High Z
Read
Active
Active
Active
1. When the device is in standby mode, control inputs (WE and OE), address inputs and data input/outputs are internally isolated
from any external influence and disabled from exerting any influence externally.
2. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
Capacitance1
Item
Symbol
Test Condition
Input Capacitance
I/O Capacitance
CIN VIN = 0V, f = 1 MHz, TA = 25oC
CI/O VIN = 0V, f = 1 MHz, TA = 25oC
1. These parameters are verified in device characterization and are not 100% tested
Min Max Unit
8 pF
8 pF
Rev. 10 | Page 2 of 10 | www.onsemi.com



No Preview Available !

N01L83W2A
www.DataSheet4U.com
Absolute Maximum Ratings1
Item
Symbol
Rating
Unit
Voltage on any pin relative to VSS
Voltage on VCC Supply Relative to VSS
Power Dissipation
Storage Temperature
Operating Temperature
Soldering Temperature and Time
VIN,OUT
VCC
PD
TSTG
TA
TSOLDER
–0.3 to VCC+0.3
–0.3 to 4.5
500
–40 to 125
-40 to +85
260oC, 10sec
V
V
mW
oC
oC
oC
1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operating section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Operating Characteristics (Over Specified Temperature Range)
Item
Symbol
Test Conditions
Min.
Typ1
Max Unit
Supply Voltage
VCC
2.3 3.0 3.6 V
Data Retention Voltage
VDR Chip Disabled3
1.8
V
Input High Voltage
VIH
1.8 VCC+0.3 V
Input Low Voltage
VIL
–0.3 0.6 V
Output High Voltage
VOH
IOH = 0.2mA
VCC–0.2
V
Output Low Voltage
VOL IOL = -0.2mA
0.2 V
Input Leakage Current ILI VIN = 0 to VCC
0.5 µA
Output Leakage Current
ILO OE = VIH or Chip Disabled
0.5 µA
Read/Write Operating Supply Current
@ 1 µS Cycle Time2
ICC1
VCC=3.6 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0
2.0 3.0 mA
Read/Write Operating Supply Current
@ 70 nS Cycle Time2
ICC2
VCC=3.6 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0
9.5 14.0 mA
Page Mode Operating Supply Current
@ 70ns Cycle Time2 (Refer to Power
Savings with Page Mode Operation
ICC3
VCC=3.6 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0,
4
mA
diagram)
Read/Write Quiescent Operating Sup-
ply Current3
ICC4
VCC=3.6 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0,
f=0
3.0 mA
Maximum Standby Current3
VIN = VCC or 0V
ISB1 Chip Disabled
tA= 85oC, VCC = 3.6 V
2.0 20 µA
Maximum Data Retention Current3
IDR
Vcc = 1.8V, VIN = VCC or 0
Chip Disabled, tA= 85oC
10 µA
1. Typical values are measured at Vcc=Vcc Typ., TA=25°C and not 100% tested.
2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive
output capacitance expected in the actual system.
3. This device assumes a standby mode if the chip is disabled (CE1 high or CE2 low). In order to achieve low standby current all
inputs must be within 0.2 volts of either VCC or VSS.
Rev. 10 | Page 3 of 10 | www.onsemi.com



No Preview Available !

N01L83W2A
Power Savings with Page Mode Operation (WE = VIH)
www.DataSheet4U.com
Page Address (A4 - A16)
Word Address (A0 - A3)
CE1
CE2
OE
Word 1
Open page
Word 2
...
Word 16
Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal
organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power
saving feature.
The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open
and 8-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant
bits and addressing the 16 words within the open page, power is reduced to the page mode value which is
considerably lower than standard operating currents for low power SRAMs.
Rev. 10 | Page 4 of 10 | www.onsemi.com



N01L83W2A datasheet pdf
Download PDF
N01L83W2A pdf
View PDF for Mobile


Related : Start with N01L83W2 Part Numbers by
N01L83W2A 1Mb Ultra-Low Power Asynchronous CMOS SRAM 128K x 8 bit N01L83W2A
ON Semiconductor
N01L83W2A pdf

Index :   0   1   2   3   4   5   6   7   8   9   A   B   C   D   E   F   G   H   I   J   K   L   M   N   O   P   Q   R   S   T   U   V   W   X   Y   Z   

This is a individually operated, non profit site. If this site is good enough to show, please introduce this site to others.
Since 2010   ::   HOME   ::   Contact