MX25L8035E Datasheet PDF - MACRONIX

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MX25L8035E
MACRONIX

Part Number MX25L8035E
Description 8M-BIT [x 1/x 2/x 4] CMOS SERIAL FLASH
Page 30 Pages


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MX25L8035E
MX25L8035E
DATASHEET
P/N: PM1551
REV. 1.0, OCT. 06, 2009
1
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MX25L8035E
Contents
FEATURES................................................................................................................................................................... 5
GENERAL........................................................................................................................................................... 5
PERFORMANCE................................................................................................................................................ 5
SOFTWARE FEATURES.................................................................................................................................... 5
HARDWARE FEATURES................................................................................................................................... 6
GENERAL DESCRIPTION.......................................................................................................................................... 7
Table 1. Additional Feature Comparison............................................................................................................. 7
PIN CONFIGURATIONS .............................................................................................................................................. 8
PIN DESCRIPTION....................................................................................................................................................... 8
BLOCK DIAGRAM....................................................................................................................................................... 9
DATA PROTECTION.................................................................................................................................................. 10
Table 2. Protected Area Sizes........................................................................................................................... 11
Table 3. 4K-bit Secured OTP Definition............................................................................................................ 11
Memory Organization............................................................................................................................................... 12
Table 4. Memory Organization (8Mb)............................................................................................................... 12
DEVICE OPERATION................................................................................................................................................. 13
Figure 1. Serial Modes Supported.................................................................................................................... 13
COMMAND DESCRIPTION....................................................................................................................................... 14
Table 5. Command Set..................................................................................................................................... 14
(1) Write Enable (WREN).................................................................................................................................. 15
(2) Write Disable (WRDI).................................................................................................................................. 15
(3) Read Identification (RDID)........................................................................................................................... 15
(4) Read Status Register (RDSR)..................................................................................................................... 16
(5) Write Status Register (WRSR).................................................................................................................... 17
Table 6. Protection Modes................................................................................................................................ 17
(6) Read Data Bytes (READ)............................................................................................................................ 18
(7) Read Data Bytes at Higher Speed (FAST_READ)...................................................................................... 18
(8) 2 x I/O Read Mode (2READ)....................................................................................................................... 18
(9) 4 x I/O Read Mode (4READ)....................................................................................................................... 19
(10) Sector Erase (SE)...................................................................................................................................... 19
(11) Block Erase (BE)....................................................................................................................................... 20
(12) Chip Erase (CE)........................................................................................................................................ 20
(13) Page Program (PP)................................................................................................................................... 20
(14) 4 x I/O Page Program (4PP)...................................................................................................................... 21
(15) Deep Power-down (DP)............................................................................................................................. 21
(16) Release from Deep Power-down (RDP), Read Electronic Signature (RES)............................................. 21
(17) Read Electronic Manufacturer ID & Device ID (REMS), (REMS2), (REMS4)........................................... 22
Table 7. ID Definitions ...................................................................................................................................... 22
(18) Enter Secured OTP (ENSO)...................................................................................................................... 22
(19) Exit Secured OTP (EXSO)........................................................................................................................ 22
P/N: PM1551
REV. 1.0, OCT. 06, 2009
2



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MX25L8035E
(20) Read Security Register (RDSCUR)........................................................................................................... 23
Table 8. Security Register Definition................................................................................................................. 23
(21) Write Security Register (WRSCUR).......................................................................................................... 23
POWER-ON STATE.................................................................................................................................................... 24
ELECTRICAL SPECIFICATIONS.............................................................................................................................. 25
ABSOLUTE MAXIMUM RATINGS.................................................................................................................... 25
Figure 2.Maximum Negative Overshoot Waveform.......................................................................................... 25
CAPACITANCE TA = 25°C, f = 1.0 MHz........................................................................................................... 25
Figure 3. Maximum Positive Overshoot Waveform........................................................................................... 25
Figure 4. INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL............................................................ 26
Figure 5. OUTPUT LOADING.......................................................................................................................... 26
Table 9. DC CHARACTERISTICS (Temperature = -40°C to 85°C for Industrial grade, VCC = 2.7V ~ 3.6V) .. 27
Table 10. AC CHARACTERISTICS (Temperature = -40°C to 85°C for Industrial grade, VCC = 2.7V ~ 3.6V) ...
.......................................................................................................................................................................... 28
Timing Analysis......................................................................................................................................................... 29
Figure 6. Serial Input Timing............................................................................................................................. 29
Figure 7. Output Timing.................................................................................................................................... 29
Figure 8. WP# Setup Timing and Hold Timing during WRSR when SRWD=1................................................. 30
Figure 9. Write Enable (WREN) Sequence (Command 06).............................................................................. 30
Figure 10. Write Disable (WRDI) Sequence (Command 04)............................................................................ 30
Figure 11. Read Identification (RDID) Sequence (Command 9F)..................................................................... 31
Figure 12. Read Status Register (RDSR) Sequence (Command 05)............................................................... 31
Figure 13. Write Status Register (WRSR) Sequence (Command 01)............................................................. 31
Figure 14. Read Data Bytes (READ) Sequence (Command 03)..................................................................... 32
Figure 15. Read at Higher Speed (FAST_READ) Sequence (Command 0B)................................................. 32
Figure 16. 2 x I/O Read Mode Sequence (Command BB)................................................................................ 33
Figure 17. 4 x I/O Read Mode Sequence (Command EB)................................................................................ 33
Figure 18. 4 x I/O Read Enhance Performance Mode Sequence (Command EB)........................................... 34
Figure 19. Sector Erase (SE) Sequence (Command 20)................................................................................. 35
Figure 20. Block Erase (BE) Sequence (Command D8).................................................................................. 35
Figure 21. Chip Erase (CE) Sequence (Command 60 or C7).......................................................................... 35
Figure 22. Page Program (PP) Sequence (Command 02).............................................................................. 36
Figure 23. 4 x I/O Page Program (4PP) Sequence (Command 38)................................................................. 36
Figure 24. Deep Power-down (DP) Sequence (Command B9)....................................................................... 37
Figure 25. Release from Deep Power-down and Read Electronic Signature (RES) Sequence (Command AB).
.......................................................................................................................................................................... 37
Figure 26. Release from Deep Power-down (RDP) Sequence (Command AB).............................................. 38
Figure 27. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90 or EF or DF)........ 38
Figure 28. Power-up Timing.............................................................................................................................. 39
Table 11. Power-Up Timing............................................................................................................................... 39
INITIAL DELIVERY STATE............................................................................................................................... 39
RECOMMENDED OPERATING CONDITIONS......................................................................................................... 40
ERASE AND PROGRAMMING PERFORMANCE..................................................................................................... 41
P/N: PM1551
REV. 1.0, OCT. 06, 2009
3



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MX25L8035E
DATA RETENTION..................................................................................................................................................... 41
LATCH-UP CHARACTERISTICS............................................................................................................................... 41
ORDERING INFORMATION....................................................................................................................................... 42
PART NAME DESCRIPTION..................................................................................................................................... 43
PACKAGE INFORMATION........................................................................................................................................ 44
P/N: PM1551
REV. 1.0, OCT. 06, 2009
4



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