MFEV710 Datasheet PDF - NXP Semiconductors

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MFEV710
NXP Semiconductors

Part Number MFEV710
Description Pegoda EV710 SAM support
Page 12 Pages


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MFEV710
Pegoda EV710
Rev. 3 — 14 February 2011
202630
Product short data sheet
PUBLIC
1. General description
The new Pegoda is NXP’s latest generation of reference designs for secure MIFARE
applications. Built around proven, well-established MIFARE solutions and powerful ARM
Cortex-M3 processors, these design in kits are available in two evaluation kits: the
MFEV710 and the MFEV852.
The MFEV710 design in kit includes the MFRD710 contactless smartcard reader, a
design based on the MFRC523 contactless reader IC. The kit supports the entire MIFARE
portfolio: MIFARE Classic, MIFARE DESFire, MIFARE Plus, and MIFARE Ultralight C,
including SAM AV2 (in x- and non-x modes). The kits also offer full support of MIFARE
discover, with a reader library for all the MIFARE card products.
It uses an open software concept and PC-based tools. The software code and hardware
architecture are reusable, and each kit includes a sample SAM-based, secure reader
architecture that implements multiple protocols. For added flexibility in development, the
flash-based microcontroller supports custom application development based on Pegoda
hardware. The microcontroller is open for customer code implementations, and the
design’s hardware interfaces are open for customer extensions.
The kit include native support for USB. An optional hardware extension board, available
on request, provides additional support for RS232, RS485, and Ethernet. The extension
board also has a JTAG interface, for debugging functionality directly on the
microcontroller, and is accompanied by a free embedded toolchain for firmware
customization.
The GUI supplied with each kit uses the familiar Windows look and feel and offers a range
of features, including history, log, timing profile management, key management, show
cards, and installer.
Minimum system requirements The minimum system requirements for running either
evaluation kit are as follows: Intel Pentium 166 MHz or equivalent, 32 Mbytes RAM,
20 Mbytes free hard disk space, CD-ROM drive, USB support, and Windows 7,
Windows XP, Windows Vista, or Windows Server in 32- or 64-bit version.
2. Features and benefits
2.1 Features
www.DataSheet4U.com
„ Multiprotocol ISO/IEC 14443 and MIFARE operation
„ PC/SC-based architecture on widely deployed hardware solutions
„ Full support for entire MIFARE card portfolio and MIFAREdiscover
„ SAM support in standard or x-mode



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NXP Semiconductors
MFEV710
Pegoda EV710
„ ARM Cortex-M3 microcontroller with integrated flash memory
„ Firmware in source code and binaries
„ USB host interface to PC and Windows-based user interface
„ Optional support for RS232, RS485, JTAG, Ethernet
2.2 Benefits
„ Fast, flexible development of SAM-based, secure reader systems
„ Quick embedded development with portable code
„ Easy customization with flash-based microcontroller
„ Custom firmware and JTAG debugging with optional hardware extension board
3. Applications
„ Public transportation
„ Access management
„ PC peripheral terminal
4. Quick reference data
Table 1.
Symbol
VDD
Tamb
Quick reference data
Parameter
supply voltage
ambient temperature
Conditions
-
-
Min Typ
4.75 5.0
10 +25
Max Unit
5.25 V
70 V
5. Ordering information
Table 2. Ordering information
Type number
Package
Name
MFEV710
-
Description
Package containing:
MFRD710, Pegoda contactless
smartcard reader, based on MFRC523
contactless reader IC
USB cable
MIFARE sample cards
CD with documentation and software
Version
-
www.DataSheet4U.com
MFEV710_SDS
Product short data sheet
PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 14 February 2011
202630
© NXP B.V. 2011. All rights reserved.
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6. Block diagram
CONNECTORS
USB
(type B)
2 × RS232
(10-pin header)
RS485(RS422)
(5-pin header)
ETHERNET
(MEC6)
JTAG
(JTAG)
Fig 1. Block diagram RD710
ANTENNA AN710
OSCILLATOR
12 MHz
USB
RS232
RS485
ETHERNET
EXT
RESET
ACT. ANTENNA
(5-pin header)
ANTENNA AN710
(10-pin header)
SIM connector
T=1
DESFIRE
SAM
LPC1768
I2C
SPI
UART
I2C
I2C
SPI
UART
RC523
JTAG/
SWD
DIPSW
OSCILLATOR
13.56 MHz
RM710
RD710
brb575



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NXP Semiconductors
MFEV710
Pegoda EV710
7. Functional description
7.1 Content
The kit includes the following items:
MFRD710, Pegoda contactless smartcard reader, based on MFRC523 contactless
reader.
1 USB cable
3 MIFARE sample cards
CD with documentation and software.
The following paragraphs describe the Hardware and Software Architecture related to the
MFRD710.
7.2 Hardware architecture CLRD710
The reader CLRD710 is a contactless Reader/Writer compliant to the ISO/IEC 14443
standard and is able to handle contactless data rates of 106 kBit, 212 kBit, 424 kBit and
848 kBit.
It is based on NXP reader-IC MFRC523, see Ref. 1; which is a highly integrated reader IC
solution for contactless communication purposes at 13.56 MHz. The MFRC523 is
connected to a LPC1768 μController that executes the firmware. The LPC1768
implements flash memory and allows to download and debug the firmware by means of a
JTAG interface.
The CLRD710 implements an external amplifier driven by the MFRC523 which is
connected to the antenna to achieve an optimum reader/writer performance for
contactless applications.
The MIFARE SAM AV2 module, see Ref. 2; can be used for key storage and enhanced
crypto operation to increase the security level.
The reader provides several communication interfaces on board such as: USB, RS232,
RS485 (RS422), Ethernet (via LPC_ extension board) and JTAG (a JTAG IEEE 1149.1
compliant interface for debugging).
The Hardware Design is described in more detail in Ref. 4.
7.3 Software architecture
The software of the CLRD710 consist of 3 components.
www.DataSheet4U.com
CLRD710 firmware based on a ARM CortexM3 implementation as well as the driver
Reader library
Graphical User Interface MIFAREdiscover
7.3.1 Firmware and driver
The reader firmware can perform contact and contactless communication.
MFEV710_SDS
Product short data sheet
PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 14 February 2011
202630
© NXP B.V. 2011. All rights reserved.
4 of 12



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