MD1711 Datasheet PDF - Supertex

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MD1711
Supertex

Part Number MD1711
Description HIGH SPEED INTEGRATED ULTRASOUND DRIVER IC
Page 12 Pages


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Supertex inc.
MD1711
High Speed, Integrated Ultrasound Driver IC
Features
Drives two ultrasound transducer channels
Generates 5-level waveform
Drives 12 high voltage MOSFETs
±2.0A source and sink peak current
Up to 20MHz output frequency
12V/ns slew rate
±3ns matched delay times
Second harmonic is less than -40dB
Two separate gate drive voltages
1.8 to 3.3V CMOS logic interface
Applications
Medical ultrasound imaging
Piezoelectric transducer drivers
Non-Destructive Testing (NDT)
Metal flaw detection
Sonar transmitter
General Description
The Supertex MD1711 is an IC for a two-channel, 5-level,
high voltage and high speed transmitter driver. It is designed
for medical ultrasound imaging applications, but can also be
used for metal flaw detection, Non-Destructive Testing (NDT),
and for driving piezoelectric transducers.
The MD1711 is a two-channel logic controller circuit with
low impedance MOSFET gate drivers. There are two sets of
control logic inputs, one for channel A and one for channel B.
Each channel consists of three pairs of MOSFET gate drivers.
These drivers are designed to match the drive requirements of
the Supertex TC6320. The MD1711 drives six TC6320s. Each
pair consists of an N-channel and a P-channel MOSFET. They
are designed to have the same impedance and can provide
peak currents of over 2.0amps.
Typical Application Circuit
+10V
FB
0.1µF
EN
SEL
POSA / POS1A
NEGA / NEG1A
+5.0V +10V -10V
0.22µF 0.22µF
0.22µF
+10V
0.22µF
0.22µF
40 36 35
33 45
43 42 31
6
DVDD2 DVDD2 DGND DVDD1 DVSS
AVDD1
DGND
DVDD1 DVDD1
DGND
DVDD2
30
OUTPA1
47
Control Logic
DVDD2
39 10nF
13 & Level
OUTNA1
1 Translator
37 10nF
2
HVEN1A / POS2A
HVEN2A / NEG2A
ClampA
+3.3V
0.1µF
3
4
5
46 VLL
MD1711
(1/2 of I/O)
DVDD1
DVDD1
OUTPA2
41 10nF
OUTNA2
34 10nF
0.1µF
48 AVSS
0.1µF
-10V
14 AVSS
15
AVSS
SUB
VSS
DVDD1
OUTPA3
44
OUTNA3
32
AGND DGND
7 18
0
DVDD1 DVSS DVDD2 DVDD1 DGND DVDD2
19 16 21 28 26 25
0.22µF
+10V
-10V
+10V
+5.0V
0
+100V
-100V
+50V
-50V
0V
0V
TC6320
VPP1
1µF
VNN1
1µF
VPP2
1µF
VNN2
1µF
Doc.# DSFP-MD1711
E031714
Transducer
Supertex inc.
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MD1711
Ordering Information
Pin Configuration
Part Number
MD1711FG-G
Package Options
48-Lead LQFP
Packing
250/Tray
48
1
48
1
MD1711FG-G M931 48-Lead LQFP
3000/Reel
MD1711K6-G
48-Lead (7x7mm) QFN 250/Tray
MD1711K6-G M933 48-Lead (7x7mm) QFN 2000/Reel
-G denotes a lead (Pb)-free / RoHS compliant package
Absolute Maximum Ratings
48-Lead LQFP
(top view)
48-Lead QFN
(top view)
Parameter
Value
VLL logic supply voltage
AVDD1, DVDD1, positive gate drive supply
DVDD2, positive gate drive supply
AVSS, DVSS, negative gate drive supply
Operating temperature range
-0.5V to +5.5V
-0.5V to +15V
-0.5V to +15V
-15V to +0.5V
0°C to +125°C
Storage temperature range
-65°C to +150°C
Power dissipation
1.2W
Absolute Maximum Ratings are those values beyond which damage to
the device may occur. Functional operation under these conditions is not
implied. Continuous operation of the device at the absolute rating level may
affect device reliability. All voltages are referenced to device ground.
Package Marking
Top Marking
YYWW
MD1711FG
LLLLLLLLL
YY = Year Sealed
WW = Week Sealed
L = Lot Number
Bottom Marking C = Country of Origin*
A = Assembler ID*
CCCCCCCC
AAA
= “Green” Packaging
*May be part of top marking
Package may or may not include the following marks: Si or
48-Lead LQFP
Typical Thermal Resistance
Package
48-Lead LQFP
θja
52°C/W
48-Lead QFN
18°C/W
MD1711K6
LLLLLLLLL
YYWW
AAA CCC
L = Lot Number
YY = Year Sealed
WW = Week Sealed
A = Assembler ID
C = Country of Origin
= “Green” Packaging
Package may or may not include the following marks: Si or
48-Lead QFN
Operating Supply Voltages and Currents
(Over operating conditions unless otherwise specified, AVDD1 = DVDD1 = DVDD2 = 10V, AVSS = DVSS = -10V, VLL = 3.3V, TA = 25°C)
Sym Parameter
Min Typ Max Units Conditions
VLL
AVDD1
DVDD1
DVDD2
AVSS, DVSS
IVLL
IAVDD1
I IAVSS & DVSS
IDVDD1
Logic supply
Positive drive bias supply
Positive gate drive supply
Positive gate drive supply
Negative gate drive and bias supply
Logic supply current
Positive bias current
Negative drive and bias supply current
Positive drive current 1
IDVDD2 Positive drive current 2
+1.8
+8.0
+4.75
+4.75
-12.0
-
-
-
-
+3.3
+10.0
-
-
-10.0
2.0
5.0
20
55
+5.0
+12.6
+12.60
+12.60
-8.0
-
-
-
-
- 13 -
V ---
V ---
V ---
V ---
V ---
mA
All channels on at 5.0Mhz,
no load
mA
All channels on at 5.0Mhz,
DVDD2 = 5.0, no load
Doc.# DSFP-MD1711
E031714
Supertex inc.
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MD1711
Operating Supply Voltages and Currents (cont.)
(Over operating conditions unless otherwise specified, AVDD1 = DVDD1 = DVDD2 = 10V, AVSS = DVSS = -10V, VLL = 3.3V, TA = 25°C)
Sym Parameter
Min Typ Max Units
IAVDD1Q
IAVSSQ
IDVDD1Q
IDVDD2Q
IVLLQ
VAVDD1 quiescent current
VAVSS quiescent current
VDVDD1 quiescent current
VDVDD2 quiescent current
Logic supply current
- 2.0 - mA
- 0.75 - mA
-
-
10
µA
EN = low, All inputs low or
high.
- - 10 µA
- 1.0 - mA
DC Electrical Characteristics
(Over operating conditions unless otherwise specified, AVDD1 = DVDD1 = DVDD2 = 10V, AVSS = DVSS = -10V, VLL = 3.3V, TA = 0 to 70°C)
P-Channel Gate Driver Outputs
RSINK
RSOURCE
ISINK
ISOURCE
Output sink resistance
Output source resistance
Peak output sink current
Peak output source current
- - 6.0 Ω ISINK = 100mA
- - 6.0 Ω ISOURCE = 100mA
- 2.0 - A ---
- 2.0 - A ---
N-Channel Gate Driver Outputs
RSINK
RSOURCE
ISINK
ISOURCE
Output sink resistance
Output source resistance
Peak output sink current
Peak output source current
- - 10 Ω ISINK = 100mA
- - 10 Ω ISOURCE = 100mA
- 1.5 - A ---
- 1.5 - A ---
Logic Inputs
VIH Input logic high voltage
VIL Input logic low voltage
IIH Input logic high current
IIL Input logic low current
0.8VLL
-
VLL V ---
0 - 0.2VLL V ---
- - 1.0 µA ---
-1.0 -
- µA ---
AC Electrical Characteristics
(Over operating conditions unless otherwise specified, AVDD1 = DVDD1 = DVDD2 = 10V, AVSS = DVSS = -10V, VLL = 3.3V, TA = 0 to 70°C)
fOUT Output frequency range
- - 20 MHz ---
tPH
Propagation delay when
output is from low to high
- 19 - ns No load, See timing diagram
tPL
tr
tf
ΔtDM
ΔtDLAY
Propagation delay when
output is from high to low
Output rise time
Output fall time
Delay time matching
Output jitter
- 19 - ns No load, See timing diagram
-
8.0
-
ns
1000pF load, see timing
diagram
-
8.0
-
ns
1000pF load, see timing
diagram
- - ±3.0 ns No load, from device to device
-
30
-
ps
Standard deviation of tD
samples (1k)
Doc.# DSFP-MD1711
E031714
Supertex inc.
3 www.supertex.com



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MD1711
AC Electrical Characteristics (cont.)
(Over operating conditions unless otherwise specified, AVDD1 = DVDD1 = DVDD2 = 10V, AVSS = DVSS = -10V, VLL = 3.3V, TA = 0 to 70°C)
Sym Parameter
Min Typ Max Min Comments
SR
HD2
Output slew rate
2nd harmonic distortion
- 12 - V/ns Measured at TC6320 output
- -40 - dB with 100Ω load
Power-Up Sequence
Step Connection
1 AVSS , DVSS
2 VLL, AVDD1, DVDD1 & DVDD2
Description
Negative gate drive supply and substrate bias
Logic supply, positive gate drive supply and bias
Test Circuit for Channel A
1/2 of MD1711
+10V AVDD1
+10V DVDD1
+10VDVDD2
+3.3V VLL
EN
POSA/POS1A
NEGA/NEG1A
HVEN1A/POS2A
HVEN2A/NEG2A
CLAMPA
SEL
AGND
DGND
AVSS
DVSS
-10V
Channel A
Control
Logic and
Level
Translation
DVDD2
DVDD2
OUT-PA1
10nF
3x TC6320
GPA1
VPP1
HVOUTPA1
+100V
OUT-NA1 10nF GNA1
HVOUTNA1
VNN1 -100V
DVDD1
OUT-PA2
10nF
GPA2
DVDD1
OUT-NA2 10nF
GNA2
+50V
VPP2
HVOUTPA2
HVOUTNA2
VNN2
-50V
HVOUTA
RLOAD
100
OUT-PA3
DVSS
DVDD1
OUT-NA3
GPA3
GNA3
VPP3
HVOUTPA3
HVOUTNA3
VNN3
Doc.# DSFP-MD1711
E031714
Supertex inc.
4 www.supertex.com



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