MC9S08JE128 Datasheet PDF - Freescale Semiconductor


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MC9S08JE128
Freescale Semiconductor

Part Number MC9S08JE128
Description Covers: MC9S08JE128 and MC9S08JE64
Page 30 Pages

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Freescale Semiconductor
Data Sheet: Advanced Information
An Energy-Efficient Solution from Freescale
Document Number: MwwCw9.DSat0aS8heJetE4U1.c2om8
Rev. 3, 04/2010
MC9S08JE128 series
Covers: MC9S08JE128 and MC9S08JE64
8-Bit HCS08 Central Processor Unit (CPU)
– Up to 48-MHz CPU above 2.4 V, 40 MHz CPU above 2.1 V, and
20 MHz CPU above 1.8 V across temperature of -40°C to 105°C
– HCS08 instruction set with added BGND instruction
– Support for up to 32 interrupt/reset sources
On-Chip Memory
– 128 K Dual Array Flash read/program/erase over full operating
voltage and temperature
– 12 KB Random-access memory (RAM)
– Security circuitry to prevent unauthorized access to RAM and
Flash
Power-Saving Modes
– Two ultra-low power stop modes. Peripheral clock enable register
can disable clocks to unused modules to reduce currents
– Time of Day (TOD) — Ultra-low power 1/4 sec counter with up to
64s timeout.
– Ultra-low power external oscillator that can be used in stop modes
to provide accurate clock source to the TOD. 6 usec typical wake
up time from stop3 mode
Clock Source Options
– Oscillator (XOSC1) — Loop-control Pierce oscillator; 32.768 kHz
crystal or ceramic resonator dedicated for TOD operation.
– Oscillator (XOSC2) — for high frequency crystal input for MCG
reference to be used for system clock and USB operations.
– Multipurpose Clock Generator (MCG) — PLL and FLL; precision
trimming of internal reference allows 0.2% resolution and 2%
deviation over temperature and voltage; supports CPU
frequencies from 4 kHz to 48 MHz.
System Protection
– Watchdog computer operating properly (COP) reset Watchdog
computer operating properly (COP) reset with option to run from
dedicated 1-kHz internal clock source or bus clock
– Low-voltage detection with reset or interrupt; selectable trip points;
separate low-voltage warning with optional interrupt; selectable
trip points
– Illegal opcode and illegal address detection with reset
– Flash block protection for each array to prevent accidental
write/erasure
– Hardware CRC to support fast cyclic redundancy checks
Development Support
– Single-wire background debug interface
– Real-time debug with 6 hardware breakpoints (4 PC, 1 address
and 1 data) Breakpoint capability to allow single breakpoint setting
during in-circuit debugging
– On-chip in-circuit emulator (ICE) debug module containing 3
comparators and 9 trigger modes
Peripherals
CMT— Carrier Modulator timer for remote control
communications. Carrier generator, modulator and driver for
dedicated infrared out. Can be used as an output compare timer.
IIC— Up to 100 kbps with maximum bus loading; Multi-master
operation; Programmable slave address; Interrupt driven
64-LQFP 10mm x 10mm
80-LQFP 12mm x 12mm
81-MapBGA 10mm x10mm
byte-by-byte data transfer; supports broadcast mode and 11-bit
addressing
PRACMP — Analog comparator with selectable interrupt;
compare option to programmable internal reference voltage;
operation in stop3
SCI — Two serial communications interfaces with optional 13-bit
break; option to connect Rx input to PRACMP output on SCI1 and
SCI2; High current drive on Tx on SCI1 and SCI2; wake-up from
stop3 on Rx edge
SPI1— Serial peripheral interface (SPI) with 64-bit FIFO buffer;
16-bit or 8-bit data transfers; full-duplex or single-wire
bidirectional; double-buffered transmit and receive; master or
slave mode; MSB-first or LSB-first shifting
SPI2— Serial peripheral interface with full-duplex or single-wire
bidirectional; Double-buffered transmit and receive; Master or
Slave mode; MSB-first or LSB-first shifting
TPM — Two 4-channel Timer/PWM Module; Selectable input
capture, output compare, or buffered edge- or center-aligned
PWM on each channel; external clock input/pulse accumulator
USB — Supports USB in full-speed device configuration. On-chip
transceiver and 3.3V regulator help save system cost, fully
compliant with USB Specification 2.0. Allows control, bulk,
interrupt and isochronous transfers.
ADC12 — 12-bit Successive approximation ADC with up to 4
dedicated differential channels and 8 single-ended channels;
range compare function; 1.7 mV/°C temperature sensor; internal
bandgap reference channel; operation in stop3; fully functional
from 3.6V to 1.8V, Configurable hardware trigger for 8 Channel
select and result registers
PDB — Programmable delay block with 16-bit counter and
modulus and prescale to set reference clock to bus divided by 1 to
bus divided by 2048; 8 trigger outputs for ADC12 module provides
periodic coordination of ADC sampling sequence with sequence
completion interrupt; Back-to-Back mode and Timed mode
DAC — 12-bit resolution; 16-word data buffers with configurable
watermark.
Input/Output
– Up to 47 GPIOs and 2 output-only pin and 1 input-only pin.
– Voltage Reference output (VREFO).
– Dedicated infrared output pin (IRO) with high current sink
capability.
– Up to 16 KBI pins with selectable polarity.
Package Options
– 81-MBGA 10x10 mm
– 80-LQFP 12x12 mm
– 64-LQFP 10x10 mm
This document contains information on a new product. Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2009-2010. All rights reserved.
Non-Disclosure Agreement Required
Preliminary — Subject to Change



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Contents
www.DataSheet4U.com
1 Devices in the MC9S08JE128 series.................. 3
2 Preliminary Electrical Characteristics............. 12
2.1 Parameter Classification ......................................................... 12
2.2 Absolute Maximum Ratings .................................................... 13
2.3 Thermal Characteristics .......................................................... 14
2.4 Electrostatic Discharge (ESD) Protection Characteristics ...... 15
2.5 DC Characteristics .................................................................. 16
2.6 Supply Current Characteristics ............................................... 19
2.7 Comparator (PRACMP) Electricals......................................... 21
2.8 12-Bit Digital-to-Analog Converter (DAC12LV) Electricals ...... 22
2.9 ADC Characteristics................................................................ 23
2.10 MCG and External Oscillator (XOSC) Characteristics .......... 28
2.11 AC Characteristics ................................................................ 31
2.12 SPI Characteristics ............................................................... 32
2.13 Flash Specifications .............................................................. 35
2.14 USB Electricals ..................................................................... 36
2.15 VREF Specifications............................................................. 35
3 Ordering Information......................................... 41
3.1 Device Numbering System..................................................... 42
3.2 Package Information............................................................... 42
3.3 Mechanical Drawings ............................................................. 42
4 Revision History ................................................ 43
Related Documentation
Find the most current versions of all documents at: http://www.freescale.com.
Reference Manual
—MC9S08JE128RM
Contains extensive product information including modes of operation, memory,
resets and interrupts, register definition, port pins, CPU, and all module
information.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2009-2010. All rights reserved.
Non-Disclosure Agreement Required
Preliminary — Subject to Change



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Devices in the MCw9wSw0.8DJaEta1Sh2e8et4sUe.rcioems
1 Devices in the MC9S08JE128 series
The following table summarizes the feature set available in the MC9S08JE128 series of MCUs.
Table 1. MC9S08JE128 series Features by MCU and Package
Feature
MC9S08JE128 MC9S08JE64
Pin quantity
81 80 64
64
FLASH size (bytes)
131072
65535
RAM size (bytes)
12K 12K
Programmable Analog Comparator (PRACMP)
yes
yes
Debug Module (DBG)
yes yes
Multipurpose Clock Generator (MCG)
yes yes
Inter-Integrated Communication (IIC)
yes yes
Interrupt Request Pin (IRQ)
yes yes
Keyboard Interrupt (KBI)
Port I/O1
16 16
7
47 46 33
7
33
Dedicated Analog Input Pins
12 12
Power and Ground Pins
88
Time Of Day (TOD)
yes yes
Serial Communications (SCI1)
yes yes
Serial Communications (SCI2)
yes yes
Serial Peripheral Interface 1 (SPI1 (FIFO))
yes
yes
Serial Peripheral Interface 2 (SPI2)
yes yes
Carrier Modulator Timer pin (IRO)
yes yes
TPM input clock pin (TPMCLK)
yes yes
TPM1 channels
44
TPM2 channels
442
2
XOSC1
yes yes
XOSC2
yes yes
USB
yes yes
Programmable Delay Block (PDB)
SAR ADC differential channels2
yes
443
yes
3
SAR ADC single-ended channels
886
6
Voltage reference output pin (VREFO)
yes yes
1 Port I/O count does not include two (2) output-only and one (1) input-only pins.
2 Each differential channel is comprised of 2 pin inputs.
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Devices in the MC9S08JE128 series
A complete description of the modules included on each device is provided in the following table.
www.DataSheet4U.com
Table 2. Versions of On-Chip Modules
Module
Analog-to-Digital Converter (ADC12)
Digital to Analog Converter (DAC)
Programmable Delay Block
Inter-Integrated Circuit (IIC)
Central Processing Unit (CPU)
On-Chip In-Circuit Debug/Emulator (DBG)
Multi-Purpose Clock Generator (MCG)
Low Power Oscillator (XOSCVLP)
Carrier Modulator Timer (CMT)
Programable Analog Comparator (PRACMP)
Serial Communications Interface (SCI)
Serial Peripheral Interface (SPI)
Time of Day (TOD)
Universal Serial Bus (USB)
Timer Pulse-Width Modulator (TPM)
System Integration Module (SIM)
Cyclic Redundancy Check (CRC)
Keyboard Interrupt (KBI)
Voltage Reference (VREF)
Voltage Regulator (VREG)
Interrupt Request (IRQ)
Flash Wrapper
GPIO
Port Control
Version
1
1
1
3
5
3
3
1
1
1
4
5
1
1
3
1
3
2
1
1
3
1
2
1
The block diagram in Figure 1 shows the structure of the MC9S08JE128 series MCU.
4 Freescale Semiconductor
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