MB90346CS Datasheet PDF - Fujitsu Media Devices

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MB90346CS
Fujitsu Media Devices

Part Number MB90346CS
Description 16-bit Proprietary Microcontroller
Page 30 Pages


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FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-13730-1E
16-bit Proprietary Microcontroller
CMOS
F2MC-16LX MB90340 Series
MB90F342/C(S), MB90F343/C(S), MB90F345/C(S), MB90F346/C(S), MB90F347/C(S),
MB90F349/C(S), MB90341/C(S), MB90342/C(S), MB90346/C(S), MB90347/C(S),
MB90348/C(S), MB90349/C(S), MB90V340(S)
s DESCRIPTION
The MB90340-series with up to 2 FULL-CAN* interfaces and FLASH ROM is especially designed for automotive
and industrial applications. Its main feature are the on-board CAN Interfaces, which conform to V2.0 Part A and
Part B, while supporting a very flexible message buffer scheme and so offering more functions than a normal full
CAN approach. With the new 0.35 µm CMOS technology, Fujitsu now offers on-chip FLASH-ROM program
memory up to 512 Kbytes. An internal voltage booster removes the necessity for a second programming voltage.
An on board voltage regulator provides 3 V to the internal MCU core. This creates a major advantage in terms
of EMI and power consumption.
The internal PLL clock frequency multiplier provides an internal 42 ns instruction cycle time from an external
4 MHz clock.
The unit features an 8 channel Output Compare Unit and 8 channel Input Capture Unit with 2 separate 16-bit free
running timers. 4 UARTs constitute additional functionality for communication purposes.
* : Controller Area Network (CAN) - License of Robert Bosch GmbH
Note : F2MC stands for FUJITSU Flexible Microcontroller, a registered trademark of FUJITSU LIMITED.
s PACKAGES
100-pin Plastic QFP
100-pin Plastic LQFP
(FPT-100P-M06)
(FPT-100P-M05)



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MB90340 Series
s FEATURES
Clock
• Built-in PLL clock frequency multiplication circuit
• Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and
multiplication of 1 to 6 times of oscillation clock (for 4 MHz oscillation clock, 4 MHz to 24 MHz).
• Operation by sub-clock (up to 50 kHz : 100 kHz oscillation clock divided two) is allowed. (devices without S-
suffix only)
• Minimum execution time of instruction : 42 ns (when operating with 4-MHz oscillation clock, and 6-time multi-
plied PLL clock).
16 Mbyte CPU memory space
• 24-bit internal addressing
Instruction system best suited to controller
• Wide choice of data types (bit, byte, word, and long word)
• Wide choice of addressing modes(23 types)
• Enhanced multiply-divide instructions and RETI instructions
• Enhanced high-precision computing with 32-bit accumulator
Instruction system compatible with high-level language (C language) and multitask
• Employing system stack pointer
• Enhanced various pointer indirect instructions
• Barrel shift instructions
Increased processing speed
• 4-byte instruction queue
Powerful interrupt function
• Powerful 8-level, 34-condition interrupt feature
• Up to 16 external interrupts are supported
Automatic data transfer function independent of CPU
• Expanded intelligent I/O service function (EI2OS) : up to 16 channels
• DMA : up to 16 channels
Low power consumption (standby) mode
• Sleep mode (a mode that halts CPU operating clock)
• Time-base timer mode (a mode that operates oscillation clock, sub clock, time-base timer and clock timer only)
• Watch mode (a mode that operates sub clock and clock timer only)
• Stop mode (a mode that stops oscillation clock and sub clock)
• CPU blocking operation mode
Process
• CMOS technology
I/O port
• General-purpose input/output port (CMOS output)
- 80 ports (devices without S-suffix)
- 82 ports (devices with S-suffix)
Timer
• Time-base timer, clock timer, watchdog timer : 1 channel
• 8/16-bit PPG timer : 8-bit X 16 channels, or 16-bit X 8 channels
• 16-bit reload timer : 4 channels
• 16- bit input/output timer
- 16-bit free run timer : 2 channel (FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7)
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MB90340 Series
- 16- bit input capture: (ICU) : 8 channels
- 16-bit output compare : (OCU) : 8 channels
Full-CAN interface : up to 2 channels
• Compliant with Ver2.0A and Ver2.0B CAN specifications
• Flexible message buffering (mailbox and FIFO buffering can be mixed)
• CAN wake-up function
UART (LIN/SCI) : up to 4 channels
• Equipped with full-duplex double buffer
• Clock-asynchronous or clock-synchronous serial transmission is available
I2C interface* : up to 2 channels (devices with C-suffix only)
• Up to 400 kbit/s transfer rate
DTP/External interrupt : up to 16 channels, CAN wakeup : up to 2 channels
• Module for activation of expanded intelligent I/O service (EI2OS), DMA, and generation of external interrupt.
Delay interrupt generator module
• Generates interrupt request for task switching.
8/10-bit A/D converter : 16/24 channels
• Resolution is selectable between 8-bit and 10-bit.
• Activation by external trigger input is allowed.
• Conversion time : 3 µs (at 24-MHz machine clock, including sampling time)
Program patch function
• Address matching detection for 6 address pointers.
Internal voltage regulator
• Supports 3 V MCU core, offering low EMI and low power consumption figures
Programmable input levels
• Automotive/CMOS-Schmitt (initial level is Automotive in Single chip mode)
• TTL level (initial level for External bus mode)
ROM security function
• Protects the content of ROM (MASK ROM device only)
External bus interface
Clock monitor function
* : I2C license :
This product includes licensing of Phillips I2C patents if used by the customer in an I2C system subject to the I2C
standard specifications established by Phillips.
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MB90340 Series
s PRODUCT LINEUP
Part Number
MB90F342/C(S),MB90F343/C(S)*1, MB90F345/C(S),
MB90F346/C(S), MB90F347/C(S), MB90F349/C(S),
Parameter
MB90341/C(S)*1, MB90342/C(S)*1, MB90346/C(S) ,
MB90347/C(S), MB90348/C(S)*1, MB90349/C(S)*1
MB90V340(S)
CPU
F2MC-16LX CPU
System clock
On-chip PLL clock multiplier (×1, ×2, ×3, ×4, ×6, 1/2 when PLL stops)
Minimum instruction execution time : 42 ns (4 MHz osc. PLL × 6)
ROM
Boot-block, Flash memory
512 Kbytes : MB90F345/C (S)
384 Kbytes : MB90F343/C (S)
256 Kbytes : MB90F342/C (S) , MB90F349/C (S) , MB90342/C (S) ,
MB90349/C (S)
128 Kbytes : MB90F347/C (S) , MB90341/C (S) , MB90348/C (S) ,
MB90347/C (S)
64 Kbytes : MB90F346/C (S) , MB90346/C (S)
External
RAM
20 Kbytes : MB90F343/C (S) , MB90F345/C (S)
16 Kbytes : MB90F342/C (S) , MB90F349/C (S) , MB90341/C (S) ,
MB90342/C (S) , MB90348/C (S) , MB90349/C (S)
6 Kbytes : MB90F347/C (S) , MB90347/C (S)
2 Kbytes : MB90F346/C (S) , MB90346/C (S)
30 Kbytes
Emulator-specific
power supply*2
Yes
Technology
0.35 µm CMOS with on-chip voltage regulator for internal
power supply + Flash memory with
On-chip charge pump for programming voltage
0.35 µm CMOS with
on-chip voltage regulator
for internal power supply
Operating
voltage range
3.5 V - 5.5 V : at normal operating (not using A/D converter)
4.0 V - 5.5 V : at using A/D converter/Flash programming
4.5 V - 5.5 V : at using external bus
5 V ± 10%
Temperature range
40 °C to +105 °C
Package
QFP-100, LQFP-100
PGA-299
4 channels
5 channels
UART
Wide range of baud rate settings using a dedicated reload timer
Special synchronous options for adapting to different synchronous serial protocols
LIN functionality working either as master or slave LIN device
I2C (400 kbit/s)
devices with ‘C’-suffix : 2ch
devices without ‘C’-suffix :
2 channel
A/D
Converter
devices with ‘C’-suffix : 24ch
devices without ‘C’-suffix : 16ch
24 input channels
10-bit or 8-bit resolution
Conversion time : Min 3 µs include sample time (per one channel)
16-bit Reload Timer Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys = Machine clock frequency)
(4 channels)
Supports External Event Count function
16-bit
I/O Timer
(2 channels)
Signals an interrupt when overflowing
Supports Timer Clear when a match with Output Compare (Channel 0, 4)
Operation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24, fsys/25, fsys/26, fsys/27
(fsys = Machine clock freq.)
I/O Timer 0 (clock input FRCK0) corresponds to ICU 0/1/2/3, OCU 0/1/2/3
I/O Timer 1 (clock input FRCK1) corresponds to ICU 4/5/6/7, OCU 4/5/6/7
(Continued)
4



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