LS6525 Datasheet PDF - LSI

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LS6525
LSI

Part Number LS6525
Description BATTERY POWERED LOW-POWER PIR SENSOR INTERFACE
Page 5 Pages


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LS6525
LS6526
Mar 2013
BATTERY POWERED LOW-POWER PIR SENSOR INTERFACE
FEATURES:
Power derived from 3.0V Lithium battery
VDD operating range 2.3V to 3.6V
25μA maximum quiescent current (LS6525)
30μA maximum quiescent current (LS6526)
Direct interface with PIR sensor
Analog signal and digital interrupt signal outputs for interfacing
with a MCU
2.175V regulated output
Low battery indicator output (LS6526)
LS6525 (DIP), LS6525-S (SOIC)
LS6526 (DIP), LS6526-S (SOIC)
APPLICATIONS:
The low operating voltage and low current drain make the LS65 25 /
LS6526 ideal for microcontroller based portable applications such as
battery operate d motion detectors and photographic equipment,
automatic doors, intrusion detecti on, and anywhere electric outlets
are not available.
DESCRIPTION:
The LS6525 / LS6526 is a CMOS integrated circuit designe d fo r
detecting motion from a PIR sen sor and is micro controller interface
ready. It uses a 3.0V Li battery as a source of energy fo
r its
operation. The detailed de scription of the functional b locks is as
follows (refer to Figure 2).
AMPLIFIERS
The input PIR p reamplifier, AMP1, has a nominal gain set at 29V/V
using internal resistors. An int ernal bias is u sed so that AMP1O
output has a q uiescent voltage of 1.1V. The output of the PIR
amplifier is AC coupled to a second amplifier (AMP2) which uses
external components to set the gain. This secon d stage is internally
biased and applied to a window comparator which has lower and
higher trip levels set with respe ct to that bias. External components
are used to set a typical gain of 22V/V. Amplifie d signals greater in
magnitude than the trip levels will cause an in terrupt signal to be
generated at the INT open drain output, pin 12. The INT output can
be pulled to a voltage higher than VDD (pin 13).
The output of the PIR amplifier i s also AC coupled to an additional
amplifier (MCU amplifier) which uses external components to set the
gain. An internal bias set the MCO output a t 0.5V and external
resistors set a typical ga in = 10V/V, the MCO o utput signal can be
applied to a microcontroller input for processing.
PIN ASSIGNMENT
Figure 1
INPUT / OUTPUT DESCRIPTION
PIN1 – PYRO Input – Non-inverting input of PIR amplifier AC
coupled to source of PIR signal.
PIN2 – VREG Output – This output provides power to the PIR
Sensor circuit and for all the internal amplifier circuitry.
PIN3 – AMP1O Output – Output terminal of the PIR amplifier
PIN4 – MCP – 0.5V internal bias. (Internal use only. No external
components.)
PIN5 – MCN Input – Inverting input to the MCU amplifier.
PIN6 – MCO Output – Output of the MCU amplifier.
6525-030713-1
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PIN7 – V1P1 – Internally biased to 1.1V and applied to non-inverting input of AMP2. Requires an external bypass capacitor.
PIN8 – AMP2N – Inverting input of AMP2 amplifier.
PIN9 – AMP2O – Output of the AMP2 amplifier.
PIN10 – NC – For LS6525.
PIN10 – LOBAT Output – For LS6526 only. Open drain output requiring an external pull-up resistor to a power-supply that can be higher than VDD.
An active low at the output signifies that a low battery condition exists.
PIN11 – TEST – This pin is not used and must be tied to ground.
PIN12 – INT Output – Open drain output requiring an external pull-up resistor to a power supply that can be higher than V DD. A recognized Interrupt
signal will be an active low at this output.
PIN13 – VDD – Power Supply Voltage
PIN14 – VSS – Power Supply Ground
6525-030713-2



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ABSOLUTE MAXIMUM RATINGS:
PARAMETER
DC Supply Voltage
Input Voltage
Operating Temperature
Storage Temperature
SYMBOL
VDD
VIN
TA
TSTG
VALUE
+7
VSS - 0.3 to VDD + 0.3
-40 to +70
-65 to +150
UNIT
V
V
°C
°C
ELECTRICAL CHARACTERISTICS:
(All voltages referenced to VSS, TA = 25°C, VDD = 2.3V - 3.6V, unless otherwise specified.)
PARAMETER
SYMBOL
MIN
TYP
MAX
SUPPLY CURRENT:
VDD = 2.3V – 3.6V
IDD - - 25
IDD 30
REGULATOR:
Voltage V
R 2.13
2.175
2.22
Source Current Capability IR - - 25
AMPLIFIERS:
PIR Amplifier
Gain G
Input Impedance
MCU amplifier / AMP2
Open Loop Gain
MCO Output Quiescent Voltage
AMP2 Internal Reference
Window -Comparator amplifier
Input Sensitivity to INT Output
P 28
RP
GM 70
VQ
VIR
VS 120
29.5
2
0.48 0.5
1.1
32
0.52
Comparator
INT Output
Lobat
Trip Voltage
Hysteresis
VLO, THRESHOLD
VHI, THRESHOLD
VOL, INT
VPULL-UP
VTRIP
Hys
VOL, LOBAT
VPULL-UP
1.02
1.18
2.45
0.1
0.1
5.5
0.1
5.5
UNIT CONDITIONS
μA LS6525, No Load@VREG
μA LS6526, No Load@VREG
V
μA
Vi/p 1mVP-P, 10Hz
V/V RL = No Load to 3MΩ
MΩ
dB
V
V
μVP
AMP1 and AMP2 cascaded for
net gain = 675V/V
V
V
V RPULL-UP = 2MΩ, VPULL-UP = 3.6V
V
V
V
V RPULL-UP = 2MΩ, VPULL-UP = 3.6V
V
6525-030713-3



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6525-030713-4
Figure 2 Block Diagram



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