LN3C69 Datasheet PDF - Lii Semiconductor

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LN3C69
Lii Semiconductor

Part Number LN3C69
Description HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER
Page 13 Pages


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澎湃動力 源於力
LN3C69
HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER
FEATURES
uLiiSemi Proprietary Cycle Turning Technology for
Improved EMI Performance.
uExtended Burst Mode Control For Improved
Efficiency and Minimum Standby Power Design
uAudio Noise Free Operation
uExternal Programmable PWM Switching Frequency
and Over Temperature Protection (OTP)
uInternal Synchronized Slope Compensation
uLow VDD Startup Current and Low Operating
Current
uLeading Edge Blanking on Current Sense Input
uVDD Over Voltage Clamp and Under Voltage
Lockout with Hysteresis (UVLO)
uGate Output Maximum Voltage Clamp (18V)
uLine Input Compensated Over Universal Input
Voltage Range.
uCycle-by-Cycle Over-current Threshold Setting For
Constant Output Power Limiting Over Universal
Input Voltage Range.
uOverload Protection (OLP)
APPLICATIONS
² Offline AC/DC flyback converter
² Battery Charger
² Power Adaptor
² NoteBook Power Supplies
² Open-frame SMPS
GENERAL DESCRIPTION
LN3C69 is is a highly integrated current mode PWM
control IC optimized for high performance, low standby
power and cost effective offline flyback converter
applications in less than 70W range. PWM switching
frequency at normal operation is externally
programmable and trimmed to tight range. At no load
or light load condition, the IC operates in extended
burst modeto minimize switching loss. Lower
standby power and higher conversion efficiency is
thus achieved. VDD low startup current and low
operating current contribute to a reliable power on
startup design with LN3C69. A large value resistor
could thus be used in the startup circuit to minimize
the standby power. The internal slope compensation
improves system large signal stability and reduces the
possible sub-harmonic oscillation at high PWM duty
cycle output. Leading-edge blanking on current sense
input removes the signal glitch due to snubber circuit
diode reverse recovery and thus greatly reduces the
external component count and system cost in the
design. LN3C69 offers complete protection coverage
with automatic self-recovery feature including
Cycle-by-Cycle current limiting (OCP), over load
protection (OLP), over temperature protection (OTP),
VDD over voltage clamp and under voltage lockout
(UVLO). The Gate-drive output is clamped to
maximum 18V to protect the power MOSFET.
Excellent EMI performance is achieved with LiiSemi
proprietary Cycle Turning technique together with soft
switching control at the totem pole gate drive output.
Tone energy at below 22kHz is minimized in the
design and audio noise is eliminated during operation.
LN3C69 is offered in SOP8 and DIP8 packages.
Fig1. 典型
Copyright(C) 2010 Lii Semiconductor
-1-
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1
BLOCK DIAGRAM
LN3C69
Pin Configuration
Fig2. 内部框图
PIN ASSIGNMENTS
Pin No. Name Function
1 GND
P
2 FB
I
3 VIN
I
4 RI
I
5 RT
I
6 SENSE
I
7 VDD
P
8 GATE
O
Fig3.
Description
Ground
Feedback input pin. The PWM duty cycle is determined by voltage level into
this pin and SENSE pin input.
Connected through a large value resistor to rectified line input for Startup IC
supply and line voltage sensing.
Internal Oscillator frequency setting pin. A resistor connected between RI
and GND sets the PWM frequency.
Temperature sensing input pin. Connected through a NTC resistor to GND.
Current sense input pin. Connected to current sensing resistor node.
Chip DC power supply pin
Totem-pole drive output for the power MOSFET.
Copyright(C) 2010 Lii Semiconductor
-2-
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澎湃驅動力 源於力生美
LN3C69
ABSOLUTE MAXIMUM RATINGS *
Item
VDD DC Supply Voltage
VDD Clamp Voltage
Parameter
28
28
UNIT
V
V
VDD DC Clamp Current
VFB Input Voltage
VSENSE Input Voltage to Sense Pin
10
-0.3 to 7
-0.3 to 7
mA
V
V
VRI Input Voltage to RI Pin
Min/Max Operating Junction Temperature TJ
Min/Max Storage Temperature Tstg
ESD INFORMATION:
HBM Human Body Model
-0.3 to 7
-20 to 150
-55 to 160
3.0
V
KV
MM Machine Model
250 V
Note: Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the
device. These are stress ratings only, functional operat ion of the device at these or any other conditions beyond
those indicated under recommended operating conditionsis not im plied. Exposure to absolute maximum-rated
conditions for ex tended periods may affect device reliability.
RECOMMENDED OPERATING CONDITION
Symbol
Parameter
VDD
VDD Supply Voltage
RI RI Resistor Value
TA Operating Ambient Temperature
Min
Type
Max
Unit
12 25 V
24 31 KΩ
-20 85
ELECTRICAL CHARACTERISTICS (TA = 25, VDD=15V, RI=24KΩ if not otherwise noted)
Supply Voltage (VDD)
Symbol
Parameter
Test Conditions
Min Typ Max Unit
VDD Start up
VDD=15V,RI=24K,Measure
IQS
Current
Leakage current into VDD
6 20 uA
IQ Operation Current VDD=15V,RI=24KΩ,VFB=3V
2.0 mA
VSTART
VSTOP
OVP(ON)*
OVP(OFF)*
OVP_Hys*
UVLO Threshold
Voltage
VDD Over Voltage
Protection on
VDD Over Voltage
Protection off
OVP Hysteresis
FB=0
OVP(ON)-OVP(OFF)
15.5 16.5 17.5
9.5 10.5 11.5
23.5 25 26.5
V
V
V
21.5 23 24.5 V
2V
VDD_CL VDD Zener Voltage
IVDD=10mA
28 V
Copyright(C) 2010 Lii Semiconductor
-3-
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Feedback Input Section(FB Pin)
Symbol
Parameter
AVCS
PWM Input Gain
VFB VFB Open Loop Voltage
IFB_S
VTHMIN
VTH_BM
VTHMAX
TDMAX
FB short current
Zero Duty FB
Threshold Voltage
Burst Mode FB
Threshold Voltage
Power Limiting FB
Threshold Voltage
Power limiting
Debounce Time
ZFB FB Input Impedance
Test Conditions
VFB / Vcs
VFB=Open
FB=0 , FB short to GND
LN3C69
Min Typ Max Unit
2.8 V/V
5.9 V
0.8 mA
0.95 V
1.7 V
4.4 V
80 mS
7.2 KΩ
Current Sense Input(Sense Pin)
Symbol
Parameter
TLEB Leading edge blanking
ZCS CS Input Impedance
TOCP
OCP Delay
VTHOCP1 OCP Threshold Voltage
VTHOCP2 OCP Threshold Voltage
Test Conditions
CL=1nF at Gate
I_vin=0
I_vin=150uA
Min Typ Max Unit
250 nS
30 KΩ
120 nS
0.85 0.90 0.95 V
0.81 V
Oscillator
Symbol
Parameter
FOSC
ΔFOSC_T
Normal Oscillation
Frequency
Frequency
Temperature Stability
Test Conditions
TA=-20to 100
Min Typ Max Unit
60 65 70 kHz
2%
Copyright(C) 2010 Lii Semiconductor
-4-
www.liisemi.com



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